Searched +full:0 +full:x020c4000 (Results 1 – 11 of 11) sorted by relevance
45 reg = <0x020c4000 0x4000>;46 interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,47 <0 88 IRQ_TYPE_LEVEL_HIGH>;
61 reg = <0x020c4000 0x4000>;
69 reg = <0x020c4000 0x4000>;70 interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,71 <0 88 IRQ_TYPE_LEVEL_HIGH>;
65 reg = <0x020c4000 0x4000>;
21 (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)35 * whole address space to [0xf4000000, 0xf5ffffff]. So [0xf6000000,0xfeffffff]41 * IO 0x00200000+0x100000 -> 0xf4000000+0x10000043 * AIPI 0x10000000+0x100000 -> 0xf4400000+0x10000044 * SAHB1 0x80000000+0x100000 -> 0xf5000000+0x10000045 * X_MEMC 0xdf000000+0x004000 -> 0xf5f00000+0x00400047 * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x10000048 * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x10000049 * AVIC 0x68000000+0x100000 -> 0xf5800000+0x10000051 * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000[all …]
45 #size-cells = <0>;47 cpu0: cpu@0 {50 reg = <0>;82 #clock-cells = <0>;89 #clock-cells = <0>;96 #clock-cells = <0>;97 clock-frequency = <0>;103 #clock-cells = <0>;104 clock-frequency = <0>;117 reg = <0x00900000 0x20000>;[all …]
48 #size-cells = <0>;50 cpu@0 {53 reg = <0x0>;85 #clock-cells = <0>;91 #clock-cells = <0>;99 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;104 #phy-cells = <0>;116 reg = <0x00900000 0x20000>;124 reg = <0x00a01000 0x1000>,125 <0x00a00100 0x100>;[all …]
56 #size-cells = <0>;58 cpu0: cpu@0 {61 reg = <0>;108 #clock-cells = <0>;115 #clock-cells = <0>;122 #clock-cells = <0>;123 clock-frequency = <0>;129 #clock-cells = <0>;130 clock-frequency = <0>;149 reg = <0x00900000 0x20000>;[all …]
55 #clock-cells = <0>;61 #clock-cells = <0>;62 clock-frequency = <0>;67 #clock-cells = <0>;74 #size-cells = <0>;79 lvds-channel@0 {81 #size-cells = <0>;82 reg = <0>;85 port@0 {86 reg = <0>;[all …]
58 #size-cells = <0>;60 cpu0: cpu@0 {63 reg = <0>;97 #clock-cells = <0>;104 #clock-cells = <0>;111 #clock-cells = <0>;112 clock-frequency = <0>;118 #clock-cells = <0>;119 clock-frequency = <0>;125 #clock-cells = <0>;[all …]
