Lines Matching +full:0 +full:x020c4000
45 #size-cells = <0>;
47 cpu0: cpu@0 {
50 reg = <0>;
82 #clock-cells = <0>;
89 #clock-cells = <0>;
96 #clock-cells = <0>;
97 clock-frequency = <0>;
103 #clock-cells = <0>;
104 clock-frequency = <0>;
117 reg = <0x00900000 0x20000>;
124 reg = <0x00a01000 0x1000>,
125 <0x00a00100 0x100>;
131 reg = <0x00a02000 0x1000>;
143 reg = <0x02000000 0x100000>;
150 reg = <0x02000000 0x40000>;
155 reg = <0x02004000 0x4000>;
157 dmas = <&sdma 14 18 0>, <&sdma 15 18 0>;
179 reg = <0x02008000 0x4000>;
191 reg = <0x0200c000 0x4000>;
203 reg = <0x02010000 0x4000>;
215 reg = <0x02014000 0x4000>;
228 reg = <0x02018000 0x4000>;
230 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
241 reg = <0x02020000 0x4000>;
243 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
254 reg = <0x02024000 0x4000>;
256 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
266 reg = <0x02028000 0x4000>;
268 dmas = <&sdma 37 22 0>, <&sdma 38 22 0>;
279 reg = <0x0202c000 0x4000>;
281 dmas = <&sdma 41 22 0>, <&sdma 42 22 0>;
292 reg = <0x02030000 0x4000>;
294 dmas = <&sdma 45 22 0>, <&sdma 46 22 0>;
306 reg = <0x02034000 0x4000>;
308 dmas = <&sdma 29 4 0>, <&sdma 30 4 0>;
319 reg = <0x02080000 0x4000>;
329 reg = <0x02084000 0x4000>;
339 reg = <0x02088000 0x4000>;
349 reg = <0x0208c000 0x4000>;
359 reg = <0x02098000 0x4000>;
368 reg = <0x0209c000 0x4000>;
376 gpio-ranges = <&iomuxc 0 94 7>, <&iomuxc 7 25 25>;
381 reg = <0x020a0000 0x4000>;
389 gpio-ranges = <&iomuxc 0 50 32>;
394 reg = <0x020a4000 0x4000>;
402 gpio-ranges = <&iomuxc 0 82 12>, <&iomuxc 12 103 4>,
409 reg = <0x020a8000 0x4000>;
417 gpio-ranges = <&iomuxc 0 17 8>, <&iomuxc 8 107 8>,
430 reg = <0x020ac000 0x4000>;
438 gpio-ranges = <&iomuxc 0 135 1>, <&iomuxc 1 128 1>,
453 reg = <0x020b0000 0x4000>;
465 reg = <0x020b8000 0x4000>;
473 reg = <0x020bc000 0x4000>;
480 reg = <0x020c0000 0x4000>;
488 reg = <0x020c4000 0x4000>;
503 reg = <0x020c8000 0x4000>;
508 #size-cells = <0>;
512 reg = <0x20c8120>;
516 anatop-reg-offset = <0x120>;
519 anatop-min-bit-val = <0>;
522 anatop-enable-bit = <0>;
539 reg = <0x020c9000 0x1000>;
549 reg = <0x020ca000 0x1000>;
557 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
558 reg = <0x020cc000 0x4000>;
561 compatible = "fsl,sec-v4.0-mon-rtc-lp";
563 offset = <0x34>;
571 offset = <0x38>;
572 mask = <0x61>;
577 compatible = "fsl,sec-v4.0-pwrkey";
588 reg = <0x020d8000 0x4000>;
596 reg = <0x020dc000 0x4000>;
605 reg = <0x020e0000 0x4000>;
611 reg = <0x020e4000 0x4000>;
616 reg = <0x020e8000 0x4000>;
627 reg = <0x020ec000 0x4000>;
639 reg = <0x20f0000 0x4000>;
648 reg = <0x020f8000 0x4000>;
659 reg = <0x020fc000 0x4000>;
672 reg = <0x02100000 0x100000>;
678 reg = <0x02184000 0x200>;
682 fsl,usbmisc = <&usbmisc 0>;
684 ahb-burst-config = <0x0>;
685 tx-burst-size-dword = <0x10>;
686 rx-burst-size-dword = <0x10>;
693 reg = <0x02184200 0x200>;
698 ahb-burst-config = <0x0>;
699 tx-burst-size-dword = <0x10>;
700 rx-burst-size-dword = <0x10>;
708 reg = <0x02184800 0x200>;
713 reg = <0x02190000 0x4000>;
727 reg = <0x02194000 0x4000>;
741 reg = <0x02198000 0x4000>;
755 #size-cells = <0>;
757 reg = <0x021a0000 0x4000>;
765 #size-cells = <0>;
767 reg = <0x021a4000 0x4000>;
775 #size-cells = <0>;
777 reg = <0x021a8000 0x4000>;
785 reg = <0x021b0000 0x4000>;
791 reg = <0x021b4000 0x4000>;
800 reg = <0x021bc000 0x4000>;
804 reg = <0x10 4>;
808 reg = <0x38 4>;
812 reg = <0x20 4>;
818 reg = <0x021d8000 0x4000>;
825 reg = <0x021f4000 0x4000>;
827 dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;