Lines Matching +full:0 +full:x020c4000
48 #size-cells = <0>;
50 cpu@0 {
53 reg = <0x0>;
85 #clock-cells = <0>;
91 #clock-cells = <0>;
99 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
104 #phy-cells = <0>;
116 reg = <0x00900000 0x20000>;
124 reg = <0x00a01000 0x1000>,
125 <0x00a00100 0x100>;
131 reg = <0x00a02000 0x1000>;
132 interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
143 reg = <0x02000000 0x100000>;
150 reg = <0x02000000 0x40000>;
156 reg = <0x02004000 0x4000>;
157 interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
158 dmas = <&sdma 14 18 0>,
159 <&sdma 15 18 0>;
176 #size-cells = <0>;
178 reg = <0x02008000 0x4000>;
179 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
188 #size-cells = <0>;
190 reg = <0x0200c000 0x4000>;
191 interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
200 #size-cells = <0>;
202 reg = <0x02010000 0x4000>;
203 interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>;
212 #size-cells = <0>;
214 reg = <0x02014000 0x4000>;
215 interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
225 reg = <0x02018000 0x4000>;
226 interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
230 dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
238 reg = <0x02020000 0x4000>;
239 interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
243 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
251 reg = <0x02024000 0x4000>;
252 interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;
256 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
262 #sound-dai-cells = <0>;
265 reg = <0x02028000 0x4000>;
266 interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
270 dmas = <&sdma 37 1 0>,
271 <&sdma 38 1 0>;
278 #sound-dai-cells = <0>;
281 reg = <0x0202c000 0x4000>;
282 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
286 dmas = <&sdma 41 1 0>,
287 <&sdma 42 1 0>;
294 #sound-dai-cells = <0>;
297 reg = <0x02030000 0x4000>;
298 interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
302 dmas = <&sdma 45 1 0>,
303 <&sdma 46 1 0>;
312 reg = <0x02034000 0x4000>;
313 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
317 dmas = <&sdma 29 4 0>, <&sdma 30 4 0>;
325 reg = <0x02038000 0x4000>;
326 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
330 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
339 reg = <0x02080000 0x4000>;
340 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
349 reg = <0x02084000 0x4000>;
350 interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
359 reg = <0x02088000 0x4000>;
360 interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
369 reg = <0x0208c000 0x4000>;
370 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
378 reg = <0x02098000 0x4000>;
379 interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
387 reg = <0x0209c000 0x4000>;
388 interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>,
389 <0 67 IRQ_TYPE_LEVEL_HIGH>;
394 gpio-ranges = <&iomuxc 0 22 1>, <&iomuxc 1 20 2>,
404 reg = <0x020a0000 0x4000>;
405 interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>,
406 <0 69 IRQ_TYPE_LEVEL_HIGH>;
411 gpio-ranges = <&iomuxc 0 53 3>, <&iomuxc 3 72 2>,
422 reg = <0x020a4000 0x4000>;
423 interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>,
424 <0 71 IRQ_TYPE_LEVEL_HIGH>;
429 gpio-ranges = <&iomuxc 0 112 8>, <&iomuxc 8 121 4>,
441 reg = <0x020a8000 0x4000>;
442 interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>,
443 <0 73 IRQ_TYPE_LEVEL_HIGH>;
448 gpio-ranges = <&iomuxc 0 95 1>, <&iomuxc 1 103 1>,
467 reg = <0x020ac000 0x4000>;
468 interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>,
469 <0 75 IRQ_TYPE_LEVEL_HIGH>;
474 gpio-ranges = <&iomuxc 0 158 1>, <&iomuxc 1 151 1>,
489 reg = <0x020b8000 0x4000>;
490 interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
497 reg = <0x020bc000 0x4000>;
498 interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
504 reg = <0x020c0000 0x4000>;
505 interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
512 reg = <0x020c4000 0x4000>;
513 interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
514 <0 88 IRQ_TYPE_LEVEL_HIGH>;
522 reg = <0x020c8000 0x1000>;
523 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
524 <0 54 IRQ_TYPE_LEVEL_HIGH>,
525 <0 127 IRQ_TYPE_LEVEL_HIGH>;
533 anatop-reg-offset = <0x110>;
539 anatop-enable-bit = <0>;
548 anatop-reg-offset = <0x120>;
551 anatop-min-bit-val = <0>;
554 anatop-enable-bit = <0>;
563 anatop-reg-offset = <0x130>;
566 anatop-min-bit-val = <0>;
569 anatop-enable-bit = <0>;
578 anatop-reg-offset = <0x140>;
579 anatop-vol-bit-shift = <0>;
581 anatop-delay-reg-offset = <0x170>;
594 anatop-reg-offset = <0x140>;
597 anatop-delay-reg-offset = <0x170>;
611 anatop-reg-offset = <0x140>;
614 anatop-delay-reg-offset = <0x170>;
624 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
635 reg = <0x020c9000 0x1000>;
636 interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
643 reg = <0x020ca000 0x1000>;
644 interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
650 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
651 reg = <0x020cc000 0x4000>;
654 compatible = "fsl,sec-v4.0-mon-rtc-lp";
656 offset = <0x34>;
657 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
658 <0 20 IRQ_TYPE_LEVEL_HIGH>;
664 offset = <0x38>;
665 value = <0x60>;
666 mask = <0x60>;
672 reg = <0x020d0000 0x4000>;
673 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
677 reg = <0x020d4000 0x4000>;
678 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
683 reg = <0x020d8000 0x4000>;
684 interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,
685 <0 96 IRQ_TYPE_LEVEL_HIGH>;
691 reg = <0x020dc000 0x4000>;
694 interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
701 #size-cells = <0>;
703 power-domain@0 {
704 reg = <0>;
705 #power-domain-cells = <0>;
710 #power-domain-cells = <0>;
718 #power-domain-cells = <0>;
731 reg = <0x020e0000 0x38>;
736 reg = <0x020e0000 0x4000>;
740 reg = <0x020e4000 0x4000>;
741 interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
745 reg = <0x020e8000 0x4000>;
746 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
751 reg = <0x020ec000 0x4000>;
752 interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
762 reg = <0x020f0000 0x4000>;
763 interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
767 reg = <0x020f4000 0x4000>;
768 interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
773 reg = <0x020f8000 0x4000>;
774 interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
785 reg = <0x020fc000 0x4000>;
786 interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>,
787 <0 100 IRQ_TYPE_LEVEL_HIGH>,
788 <0 101 IRQ_TYPE_LEVEL_HIGH>;
796 reg = <0x02100000 0x100000>;
801 reg = <0x02184000 0x200>;
802 interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>;
805 fsl,usbmisc = <&usbmisc 0>;
806 ahb-burst-config = <0x0>;
807 tx-burst-size-dword = <0x10>;
808 rx-burst-size-dword = <0x10>;
814 reg = <0x02184200 0x200>;
815 interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
819 ahb-burst-config = <0x0>;
820 tx-burst-size-dword = <0x10>;
821 rx-burst-size-dword = <0x10>;
827 reg = <0x02184400 0x200>;
828 interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
834 ahb-burst-config = <0x0>;
835 tx-burst-size-dword = <0x10>;
836 rx-burst-size-dword = <0x10>;
843 reg = <0x02184800 0x200>;
849 reg = <0x02188000 0x4000>;
850 interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
859 reg = <0x02190000 0x4000>;
860 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
871 reg = <0x02194000 0x4000>;
872 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
883 reg = <0x02198000 0x4000>;
884 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
895 reg = <0x0219c000 0x4000>;
896 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
907 #size-cells = <0>;
909 reg = <0x021a0000 0x4000>;
910 interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
917 #size-cells = <0>;
919 reg = <0x021a4000 0x4000>;
920 interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
927 #size-cells = <0>;
929 reg = <0x021a8000 0x4000>;
930 interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>;
937 reg = <0x021b0000 0x4000>;
943 reg = <0x021b4000 0x4000>;
944 interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
951 reg = <0x021b8000 0x4000>;
952 interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
959 reg = <0x021bc000 0x4000>;
965 reg = <0x10 4>;
969 reg = <0x38 4>;
973 reg = <0x20 4>;
979 reg = <0x021d8000 0x4000>;
986 reg = <0x02200000 0x4000>;
987 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
996 reg = <0x02204000 0x4000>;
997 interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;