| /Linux-v6.1/drivers/gpu/drm/radeon/ |
| D | radeon_audio.c | 46 (0x5e00 - 0x5e00),
47 (0x5e18 - 0x5e00),
48 (0x5e30 - 0x5e00),
49 (0x5e48 - 0x5e00),
50 (0x5e60 - 0x5e00),
51 (0x5e78 - 0x5e00),
52 (0x5e90 - 0x5e00),
188 struct radeon_encoder_atom_dig *dig; in radeon_audio_enable() local
194 if (rdev->mode_info.mode_config_initialized) { in radeon_audio_enable()
195 list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) { in radeon_audio_enable()
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| D | dce6_afmt.c | 39 spin_lock_irqsave(&rdev->end_idx_lock, flags); in dce6_endpoint_rreg()
42 spin_unlock_irqrestore(&rdev->end_idx_lock, flags); in dce6_endpoint_rreg()
52 spin_lock_irqsave(&rdev->end_idx_lock, flags); in dce6_endpoint_wreg()
59 spin_unlock_irqrestore(&rdev->end_idx_lock, flags); in dce6_endpoint_wreg()
67 for (i = 0; i < rdev->audio.num_pins; i++) { in dce6_afmt_get_connected_pins()
68 offset = rdev->audio.pin[i].offset; in dce6_afmt_get_connected_pins()
72 rdev->audio.pin[i].connected = false; in dce6_afmt_get_connected_pins()
74 rdev->audio.pin[i].connected = true; in dce6_afmt_get_connected_pins()
82 struct radeon_encoder_atom_dig *dig; in dce6_audio_get_pin() local
88 for (i = 0; i < rdev->audio.num_pins; i++) { in dce6_audio_get_pin()
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| D | evergreen_hdmi.c | 71 struct drm_device *dev = encoder->dev; in evergreen_hdmi_update_acr()
72 struct radeon_device *rdev = dev->dev_private; in evergreen_hdmi_update_acr()
75 if (encoder->crtc) { in evergreen_hdmi_update_acr()
76 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in evergreen_hdmi_update_acr()
77 bpc = radeon_crtc->bpc; in evergreen_hdmi_update_acr()
88 WREG32(HDMI_ACR_32_0 + offset, HDMI_ACR_CTS_32(acr->cts_32khz)); in evergreen_hdmi_update_acr()
89 WREG32(HDMI_ACR_32_1 + offset, acr->n_32khz); in evergreen_hdmi_update_acr()
91 WREG32(HDMI_ACR_44_0 + offset, HDMI_ACR_CTS_44(acr->cts_44_1khz)); in evergreen_hdmi_update_acr()
92 WREG32(HDMI_ACR_44_1 + offset, acr->n_44_1khz); in evergreen_hdmi_update_acr()
94 WREG32(HDMI_ACR_48_0 + offset, HDMI_ACR_CTS_48(acr->cts_48khz)); in evergreen_hdmi_update_acr()
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| D | atombios_crtc.c | 2 * Copyright 2007-8 Advanced Micro Devices, Inc.
37 #include "atom-bits.h"
43 struct drm_device *dev = crtc->dev; in atombios_overscan_setup()
44 struct radeon_device *rdev = dev->dev_private; in atombios_overscan_setup()
52 args.ucCRTC = radeon_crtc->crtc_id; in atombios_overscan_setup()
54 switch (radeon_crtc->rmx_type) { in atombios_overscan_setup()
56 args.usOverscanTop = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); in atombios_overscan_setup()
57 args.usOverscanBottom = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); in atombios_overscan_setup()
58 args.usOverscanLeft = cpu_to_le16((adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2); in atombios_overscan_setup()
59 args.usOverscanRight = cpu_to_le16((adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2); in atombios_overscan_setup()
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| D | atombios.h | 2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
214 UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios,
397 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
403 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
410 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
422 UCHAR ucPostDiv; //return post div to be written to register
504 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
536 #define ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN 1 // 1-StrobeMode, 0-PerformanceMode
544 …bDiv; //Output:UPPER_WORD=FB_DIV_INTEGER, LOWER_WORD=FB_DIV_FRAC shl (16-FB_FRACTION_BITS)
549 … //Input : ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN: 1-StrobeMode, 0-PerformanceMode
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| /Linux-v6.1/Documentation/devicetree/bindings/phy/ |
| D | ti,phy-j721e-wiz.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Kishon Vijay Abraham I <kishon@ti.com>
16 - ti,j721e-wiz-16g
17 - ti,j721e-wiz-10g
18 - ti,am64-wiz-10g
19 - ti,j7200-wiz-10g
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| /Linux-v6.1/drivers/phy/ti/ |
| D | phy-j721e-wiz.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/phy/phy-ti.h>
13 #include <linux/clk-provider.h>
25 #include <linux/reset-controller.h>
111 [TI_WIZ_PLL0_REFCLK] = "pll0-refclk",
112 [TI_WIZ_PLL1_REFCLK] = "pll1-refclk",
113 [TI_WIZ_REFCLK_DIG] = "refclk-dig",
114 [TI_WIZ_PHY_EN_REFCLK] = "phy-en-refclk",
[all …]
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| /Linux-v6.1/arch/arm64/boot/dts/ti/ |
| D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/phy/phy-ti.h>
9 #include <dt-bindings/mux/mux.h>
10 #include <dt-bindings/mux/ti-serdes.h>
13 cmn_refclk: clock-cmnrefclk {
14 #clock-cells = <0>;
15 compatible = "fixed-clock";
16 clock-frequency = <0>;
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| D | k3-j7200-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
9 serdes_refclk: serdes-refclk {
10 #clock-cells = <0>;
11 compatible = "fixed-clock";
17 compatible = "mmio-sram";
19 #address-cells = <1>;
20 #size-cells = <1>;
23 atf-sram@0 {
28 scm_conf: scm-conf@100000 {
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| /Linux-v6.1/drivers/clk/sunxi-ng/ |
| D | ccu-sun50i-a64.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
24 #include "ccu-sun50i-a64.h"
35 .hw.init = CLK_HW_INIT("pll-cpux",
47 * With sigma-delta modulation for fractional-N on the audio PLL,
61 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
71 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX(pll_video0_clk, "pll-video0",
85 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
97 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr0_clk, "pll-ddr0",
115 .hw.init = CLK_HW_INIT("pll-periph0", "osc24M",
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| D | ccu-sun8i-a33.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
24 #include "ccu-sun8i-a23-a33.h"
37 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M",
48 * With sigma-delta modulation for fractional-N on the audio PLL,
62 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
72 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video",
84 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
96 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr0_clk, "pll-ddr0",
105 static SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(pll_periph_clk, "pll-periph",
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| D | ccu-sun8i-v3s.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on ccu-sun8i-h3.c, which is:
9 #include <linux/clk-provider.h>
28 #include "ccu-sun8i-v3s.h"
30 static SUNXI_CCU_NKMP_WITH_GATE_LOCK(pll_cpu_clk, "pll-cpu",
45 * With sigma-delta modulation for fractional-N on the audio PLL,
59 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
69 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video",
81 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
93 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr0_clk, "pll-ddr0",
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| D | ccu-sun8i-a23.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
25 #include "ccu-sun8i-a23-a33.h"
39 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M",
50 * With sigma-delta modulation for fractional-N on the audio PLL,
64 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
74 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video",
86 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
98 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr_clk, "pll-ddr",
107 static SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(pll_periph_clk, "pll-periph",
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| D | ccu-sun8i-h3.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
26 #include "ccu-sun8i-h3.h"
28 static SUNXI_CCU_NKMP_WITH_GATE_LOCK(pll_cpux_clk, "pll-cpux",
43 * With sigma-delta modulation for fractional-N on the audio PLL,
57 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
67 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX(pll_video_clk, "pll-video",
81 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
93 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr_clk, "pll-ddr",
102 static SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(pll_periph0_clk, "pll-periph0",
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| /Linux-v6.1/drivers/gpu/drm/amd/include/ |
| D | atombios.h | 2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
107 #define ATOM_SCALER_DISABLE 0 //For Fudo, it's bypass and auto-cengter & no replication
108 #define ATOM_SCALER_CENTER 1 //For Fudo, it's bypass and auto-center & auto replication
110 #define ATOM_SCALER_MULTI_EX 3 //For Fudo only, it's multi-tap mode only used to drive TV or CV,…
222 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
245 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
427 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
433 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
440 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
452 UCHAR ucPostDiv; //return post div to be written to register
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| D | atomfirmware.h | 6 * Description header file of general definitions for OS and pre-OS video drivers
31 * If a change in VBIOS/Driver/Tool's interface is only needed for pre-SoC15 products, then the chan…
115 ATOM_SCALER_DISABLE =0, /*scaler bypass mode, auto-center & no replication*/
116 ATOM_SCALER_CENTER =1, //For Fudo, it's bypass and auto-center & auto replication
201 #define BIOS_VERSION_PREFIX "ATOMBIOSBK-AMD"
244 …tom_string_def atom_bios_string; //Signature to distinguish between Atombios and non-atombios,
603 uint32_t maco_pwrlimit_mw; // bomaco mode power limit in unit of m-watt
604 uint32_t usb_pwrlimit_mw; // power limit when USB is enable in unit of m-watt
655 eDP_TO_LVDS_RX_DISABLE = 0x00, // no eDP->LVDS translator chip
656 …eDP_TO_LVDS_COMMON_ID = 0x01, // common eDP->LVDS translator chip without A…
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| /Linux-v6.1/drivers/net/wireless/broadcom/b43/ |
| D | phy_lp.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* Definitions for the LP-PHY */
685 #define B2063_LOGEN_DIV1 B43_LP_RADIO(0x0A7) /* LOGEN DIV 1 */
686 #define B2063_LOGEN_DIV2 B43_LP_RADIO(0x0A8) /* LOGEN DIV 2 */
687 #define B2063_LOGEN_DIV3 B43_LP_RADIO(0x0A9) /* LOGEN DIV 3 */
887 /* Used for "Save/Restore Dig Filt State" */
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| /Linux-v6.1/net/packet/ |
| D | af_packet.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * PACKET - implements raw packet sockets.
22 * Alan Cox : Re-commented the code.
30 * Alan Cox : New buffers. Use sk->mac.raw.
101 - If the device has no dev->header_ops->create, there is no LL header
108 needed_headroom to be (the real WiFi header length - the fake Ethernet
110 - packet socket receives packets with pulled ll header,
114 -----------
117 mac_header -> ll header
118 data -> data
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| /Linux-v6.1/drivers/media/tuners/ |
| D | mxl5005s.c | 201 * MaxLinear source code - Common_MXL.h (?)
254 u8 CAPSELECT; /* 0: disable On-Chip pulling cap; 1: enable */
258 /* 0 - Default; 1 - DVB-T; 2 - ATSC; 3 - QAM; 4 - Analog Cable */
262 /* 0 - Default; 1 - Off; 2 - Type C; 3 - Type C-H */
325 /* ----------------------------------------------------------------
334 * Revision: 080314 - original version
339 struct mxl5005s_state *state = fe->tuner_priv; in mxl5005s_SetRfFreqHz()
354 ByteTable[0] |= state->config->AgcMasterByte; in mxl5005s_SetRfFreqHz()
371 state->config->AgcMasterByte; in mxl5005s_SetRfFreqHz()
387 state->config->AgcMasterByte ; in mxl5005s_SetRfFreqHz()
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| /Linux-v6.1/drivers/scsi/ |
| D | ncr53c8xx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 ** Device driver for the PCI-SCSI NCR538XX controller family.
8 **-----------------------------------------------------------------------------
22 ** Stefan Esser <se@mi.Uni-Koeln.de>
27 **-----------------------------------------------------------------------------
38 ** Support for Fast-20 scsi.
42 ** Support for Fast-40 scsi.
43 ** Support for on-Board RAM.
46 ** Full support for scsi scripts instructions pre-fetching.
57 ** Low PCI traffic for command handling when on-chip RAM is present.
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