71 	struct drm_device *dev = encoder->dev;  in evergreen_hdmi_update_acr()
72 	struct radeon_device *rdev = dev->dev_private;  in evergreen_hdmi_update_acr()
75 	if (encoder->crtc) {  in evergreen_hdmi_update_acr()
76 		struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);  in evergreen_hdmi_update_acr()
77 		bpc = radeon_crtc->bpc;  in evergreen_hdmi_update_acr()
88 	WREG32(HDMI_ACR_32_0 + offset, HDMI_ACR_CTS_32(acr->cts_32khz));  in evergreen_hdmi_update_acr()
89 	WREG32(HDMI_ACR_32_1 + offset, acr->n_32khz);  in evergreen_hdmi_update_acr()
91 	WREG32(HDMI_ACR_44_0 + offset, HDMI_ACR_CTS_44(acr->cts_44_1khz));  in evergreen_hdmi_update_acr()
92 	WREG32(HDMI_ACR_44_1 + offset, acr->n_44_1khz);  in evergreen_hdmi_update_acr()
94 	WREG32(HDMI_ACR_48_0 + offset, HDMI_ACR_CTS_48(acr->cts_48khz));  in evergreen_hdmi_update_acr()
95 	WREG32(HDMI_ACR_48_1 + offset, acr->n_48khz);  in evergreen_hdmi_update_acr()
101 	struct radeon_device *rdev = encoder->dev->dev_private;  in dce4_afmt_write_latency_fields()
104 	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {  in dce4_afmt_write_latency_fields()
105 		if (connector->latency_present[1])  in dce4_afmt_write_latency_fields()
106 			tmp = VIDEO_LIPSYNC(connector->video_latency[1]) |  in dce4_afmt_write_latency_fields()
107 				AUDIO_LIPSYNC(connector->audio_latency[1]);  in dce4_afmt_write_latency_fields()
111 		if (connector->latency_present[0])  in dce4_afmt_write_latency_fields()
112 			tmp = VIDEO_LIPSYNC(connector->video_latency[0]) |  in dce4_afmt_write_latency_fields()
113 				AUDIO_LIPSYNC(connector->audio_latency[0]);  in dce4_afmt_write_latency_fields()
123 	struct radeon_device *rdev = encoder->dev->dev_private;  in dce4_afmt_hdmi_write_speaker_allocation()
141 	struct radeon_device *rdev = encoder->dev->dev_private;  in dce4_afmt_dp_write_speaker_allocation()
160 	struct radeon_device *rdev = encoder->dev->dev_private;  in evergreen_hdmi_write_sad_regs()
179 		int max_channels = -1;  in evergreen_hdmi_write_sad_regs()
185 			if (sad->format == eld_reg_to_type[i][1]) {  in evergreen_hdmi_write_sad_regs()
186 				if (sad->channels > max_channels) {  in evergreen_hdmi_write_sad_regs()
187 					value = MAX_CHANNELS(sad->channels) |  in evergreen_hdmi_write_sad_regs()
188 						DESCRIPTOR_BYTE_2(sad->byte2) |  in evergreen_hdmi_write_sad_regs()
189 						SUPPORTED_FREQUENCIES(sad->freq);  in evergreen_hdmi_write_sad_regs()
190 					max_channels = sad->channels;  in evergreen_hdmi_write_sad_regs()
193 				if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM)  in evergreen_hdmi_write_sad_regs()
194 					stereo_freqs |= sad->freq;  in evergreen_hdmi_write_sad_regs()
259 		value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);  in dce4_hdmi_audio_set_dto()
285 		value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);  in dce4_dp_audio_set_dto()
294 		unsigned int div = (RREG32(DCE41_DENTIST_DISPCLK_CNTL) &  in dce4_dp_audio_set_dto()  local
297 		div = radeon_audio_decode_dfs_div(div);  in dce4_dp_audio_set_dto()
299 		if (div)  in dce4_dp_audio_set_dto()
300 			clock = 100 * clock / div;  in dce4_dp_audio_set_dto()
309 	struct drm_device *dev = encoder->dev;  in dce4_set_vbi_packet()
310 	struct radeon_device *rdev = dev->dev_private;  in dce4_set_vbi_packet()
320 	struct drm_device *dev = encoder->dev;  in dce4_hdmi_set_color_depth()
321 	struct radeon_device *rdev = dev->dev_private;  in dce4_hdmi_set_color_depth()
336 					 connector->name, bpc);  in dce4_hdmi_set_color_depth()
342 					 connector->name);  in dce4_hdmi_set_color_depth()
348 					 connector->name);  in dce4_hdmi_set_color_depth()
357 	struct drm_device *dev = encoder->dev;  in dce4_set_audio_packet()
358 	struct radeon_device *rdev = dev->dev_private;  in dce4_set_audio_packet()
392 	struct drm_device *dev = encoder->dev;  in dce4_set_mute()
393 	struct radeon_device *rdev = dev->dev_private;  in dce4_set_mute()
403 	struct drm_device *dev = encoder->dev;  in evergreen_hdmi_enable()
404 	struct radeon_device *rdev = dev->dev_private;  in evergreen_hdmi_enable()
406 	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;  in evergreen_hdmi_enable()  local
408 	if (!dig || !dig->afmt)  in evergreen_hdmi_enable()
415 			WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset,  in evergreen_hdmi_enable()
420 			WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,  in evergreen_hdmi_enable()
423 			WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset,  in evergreen_hdmi_enable()
426 			WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,  in evergreen_hdmi_enable()
430 		WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,  in evergreen_hdmi_enable()
432 		WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, 0);  in evergreen_hdmi_enable()
435 	dig->afmt->enabled = enable;  in evergreen_hdmi_enable()
438 		  enable ? "En" : "Dis", dig->afmt->offset, radeon_encoder->encoder_id);  in evergreen_hdmi_enable()
443 	struct drm_device *dev = encoder->dev;  in evergreen_dp_enable()
444 	struct radeon_device *rdev = dev->dev_private;  in evergreen_dp_enable()
446 	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;  in evergreen_dp_enable()  local
449 	if (!dig || !dig->afmt)  in evergreen_dp_enable()
459 		WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,  in evergreen_dp_enable()
462 		WREG32(EVERGREEN_DP_SEC_TIMESTAMP + dig->afmt->offset,  in evergreen_dp_enable()
465 		if (!ASIC_IS_DCE6(rdev) && radeon_connector->con_priv) {  in evergreen_dp_enable()
466 			dig_connector = radeon_connector->con_priv;  in evergreen_dp_enable()
467 			val = RREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset);  in evergreen_dp_enable()
470 			if (dig_connector->dp_clock == 162000)  in evergreen_dp_enable()
475 			WREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset, val);  in evergreen_dp_enable()
478 		WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset,  in evergreen_dp_enable()
484 		WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset, 0);  in evergreen_dp_enable()
485 		WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,  in evergreen_dp_enable()
489 	dig->afmt->enabled = enable;  in evergreen_dp_enable()