1 /* 2 * Copyright (c) 2019-2022 Arm Limited. All rights reserved. 3 * Copyright (c) 2020 Cypress Semiconductor Corporation. All rights reserved. 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 */ 17 18 #ifndef __FLASH_LAYOUT_H__ 19 #define __FLASH_LAYOUT_H__ 20 21 /* Use the QSPI as boot flash 22 * 23 * QSPI MPC BLK_CFG register value is 0xD. 24 * Thus QSPI MPC Block size is 256 KB = 2 ^ (0xD + 5). 25 */ 26 27 /* The addresses used in the following layout are all NS alias 28 * Flash layout on MPS3 AN524 with BL2 (single image boot): 29 * 30 * 0x0000_0000 BL2 - MCUBoot (256 KB) 31 * Primary image area: 32 * 0x0004_0000 Secure image (512 KB) 33 * 0x000C_0000 Non-secure image (256 KB) 34 * Secondary image area: 35 * 0x0010_0000 Secure image (512 KB) 36 * 0x0018_0000 Non-secure image (256 KB) 37 * 0x001C_0000 PS area (20 KB) 38 * 0x001C_5000 ITS area (16 KB) 39 * 0x001C_9000 OTP / NV counters area (8 KB) 40 * 0x001C_B000 Unused 41 * 42 * Flash layout without BL2 43 * 44 * 0x0000_0000 Secure image (512 KB) 45 * 0x000C_0000 Non-secure image (256 KB) 46 * 0x001C_0000 PS area (20 KB) 47 * 0x001C_5000 ITS area (16 KB) 48 * 0x001C_9000 OTP / NV counters area (8 KB) 49 * 0x001C_B000 Unused 50 */ 51 52 /* Size of a Secure and of a Non-secure image */ 53 #define FLASH_S_PARTITION_SIZE (0x80000) /* S partition: 512 KB */ 54 #define FLASH_NS_PARTITION_SIZE (0x40000) /* NS partition: 256 KB */ 55 56 #if (FLASH_S_PARTITION_SIZE > FLASH_NS_PARTITION_SIZE) 57 #define FLASH_MAX_PARTITION_SIZE FLASH_S_PARTITION_SIZE 58 #else 59 #define FLASH_MAX_PARTITION_SIZE FLASH_NS_PARTITION_SIZE 60 #endif 61 /* Sector size of the flash hardware; same as FLASH0_SECTOR_SIZE */ 62 #define FLASH_AREA_IMAGE_SECTOR_SIZE (0x1000) /* 4 KB */ 63 /* Same as FLASH0_SIZE */ 64 #define FLASH_TOTAL_SIZE (0x800000) /* 8 MB */ 65 66 /* Flash base info for BL2 bootloader */ 67 #define FLASH_BASE_ADDRESS (0x10000000) 68 69 /* Offset to QSPI base */ 70 #define FLASH_AREA_BL2_OFFSET (0x0) 71 #define FLASH_AREA_BL2_SIZE (0x40000) /* 256 KB */ 72 73 #if !defined(MCUBOOT_IMAGE_NUMBER) || (MCUBOOT_IMAGE_NUMBER == 1) 74 /* Secure + Non-secure image primary slot */ 75 #define FLASH_AREA_0_ID (1) 76 #define FLASH_AREA_0_OFFSET (FLASH_AREA_BL2_OFFSET + FLASH_AREA_BL2_SIZE) 77 #define FLASH_AREA_0_SIZE (FLASH_S_PARTITION_SIZE + \ 78 FLASH_NS_PARTITION_SIZE) 79 /* Secure + Non-secure secondary slot */ 80 #define FLASH_AREA_2_ID (FLASH_AREA_0_ID + 1) 81 #define FLASH_AREA_2_OFFSET (FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE) 82 #define FLASH_AREA_2_SIZE (FLASH_S_PARTITION_SIZE + \ 83 FLASH_NS_PARTITION_SIZE) 84 /* Not used, only the Non-swapping firmware upgrade operation 85 * is supported on AN524. 86 */ 87 #define FLASH_AREA_SCRATCH_ID (FLASH_AREA_2_ID + 1) 88 #define FLASH_AREA_SCRATCH_OFFSET (FLASH_AREA_2_OFFSET + FLASH_AREA_2_SIZE) 89 #define FLASH_AREA_SCRATCH_SIZE (0) 90 /* Maximum number of image sectors supported by the bootloader. */ 91 #define MCUBOOT_MAX_IMG_SECTORS ((FLASH_S_PARTITION_SIZE + \ 92 FLASH_NS_PARTITION_SIZE) / \ 93 FLASH_AREA_IMAGE_SECTOR_SIZE) 94 #elif (MCUBOOT_IMAGE_NUMBER == 2) 95 /* Secure image primary slot */ 96 #define FLASH_AREA_0_ID (1) 97 #define FLASH_AREA_0_OFFSET (FLASH_AREA_BL2_OFFSET + FLASH_AREA_BL2_SIZE) 98 #define FLASH_AREA_0_SIZE (FLASH_S_PARTITION_SIZE) 99 /* Non-secure image primary slot */ 100 #define FLASH_AREA_1_ID (FLASH_AREA_0_ID + 1) 101 #define FLASH_AREA_1_OFFSET (FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE) 102 #define FLASH_AREA_1_SIZE (FLASH_NS_PARTITION_SIZE) 103 /* Secure image secondary slot */ 104 #define FLASH_AREA_2_ID (FLASH_AREA_1_ID + 1) 105 #define FLASH_AREA_2_OFFSET (FLASH_AREA_1_OFFSET + FLASH_AREA_1_SIZE) 106 #define FLASH_AREA_2_SIZE (FLASH_S_PARTITION_SIZE) 107 /* Non-secure image secondary slot */ 108 #define FLASH_AREA_3_ID (FLASH_AREA_2_ID + 1) 109 #define FLASH_AREA_3_OFFSET (FLASH_AREA_2_OFFSET + FLASH_AREA_2_SIZE) 110 #define FLASH_AREA_3_SIZE (FLASH_NS_PARTITION_SIZE) 111 /* Not used, only the Non-swapping firmware upgrade operation 112 * is supported on AN524. 113 */ 114 #define FLASH_AREA_SCRATCH_ID (FLASH_AREA_3_ID + 1) 115 #define FLASH_AREA_SCRATCH_OFFSET (FLASH_AREA_3_OFFSET + FLASH_AREA_3_SIZE) 116 #define FLASH_AREA_SCRATCH_SIZE (0) 117 /* Maximum number of image sectors supported by the bootloader. */ 118 #define MCUBOOT_MAX_IMG_SECTORS (FLASH_MAX_PARTITION_SIZE / \ 119 FLASH_AREA_IMAGE_SECTOR_SIZE) 120 #else /* MCUBOOT_IMAGE_NUMBER > 2 */ 121 #error "Only MCUBOOT_IMAGE_NUMBER 1 and 2 are supported!" 122 #endif /* MCUBOOT_IMAGE_NUMBER */ 123 124 /* Not used, only the Non-swapping firmware upgrade operation 125 * is supported on AN524. The maximum number of status entries 126 * supported by the bootloader. 127 */ 128 #define MCUBOOT_STATUS_MAX_ENTRIES (0) 129 130 /* Protected Storage (PS) Service definitions */ 131 #define FLASH_PS_AREA_OFFSET (FLASH_AREA_SCRATCH_OFFSET + \ 132 FLASH_AREA_SCRATCH_SIZE) 133 #define FLASH_PS_AREA_SIZE (0x5000) /* 20 KB */ 134 135 /* Internal Trusted Storage (ITS) Service definitions */ 136 #define FLASH_ITS_AREA_OFFSET (FLASH_PS_AREA_OFFSET + \ 137 FLASH_PS_AREA_SIZE) 138 #define FLASH_ITS_AREA_SIZE (0x4000) /* 16 KB */ 139 140 /* OTP_definitions */ 141 #define FLASH_OTP_NV_COUNTERS_AREA_OFFSET (FLASH_ITS_AREA_OFFSET + \ 142 FLASH_ITS_AREA_SIZE) 143 #define FLASH_OTP_NV_COUNTERS_AREA_SIZE (FLASH_AREA_IMAGE_SECTOR_SIZE * 2) 144 #define FLASH_OTP_NV_COUNTERS_SECTOR_SIZE FLASH_AREA_IMAGE_SECTOR_SIZE 145 146 /* Offset and size definition in flash area used by assemble.py */ 147 #define SECURE_IMAGE_OFFSET (0x0) 148 #define SECURE_IMAGE_MAX_SIZE FLASH_S_PARTITION_SIZE 149 150 #define NON_SECURE_IMAGE_OFFSET (SECURE_IMAGE_OFFSET + \ 151 SECURE_IMAGE_MAX_SIZE) 152 #define NON_SECURE_IMAGE_MAX_SIZE FLASH_NS_PARTITION_SIZE 153 154 /* Flash device name used by BL2 155 * Name is defined in flash driver file: Driver_Flash.c 156 */ 157 #define FLASH_DEV_NAME Driver_FLASH0 158 /* Smallest flash programmable unit in bytes */ 159 #define TFM_HAL_FLASH_PROGRAM_UNIT (0x4) 160 161 /* Protected Storage (PS) Service definitions 162 * Note: Further documentation of these definitions can be found in the 163 * TF-M PS Integration Guide. 164 */ 165 #define TFM_HAL_PS_FLASH_DRIVER Driver_FLASH0 166 167 /* In this target the CMSIS driver requires only the offset from the base 168 * address instead of the full memory address. 169 */ 170 /* Base address of dedicated flash area for PS */ 171 #define TFM_HAL_PS_FLASH_AREA_ADDR FLASH_PS_AREA_OFFSET 172 /* Size of dedicated flash area for PS */ 173 #define TFM_HAL_PS_FLASH_AREA_SIZE FLASH_PS_AREA_SIZE 174 #define PS_RAM_FS_SIZE TFM_HAL_PS_FLASH_AREA_SIZE 175 /* Number of physical erase sectors per logical FS block */ 176 #define TFM_HAL_PS_SECTORS_PER_BLOCK (1) 177 /* Smallest flash programmable unit in bytes */ 178 #define TFM_HAL_PS_PROGRAM_UNIT (0x1) 179 180 /* Internal Trusted Storage (ITS) Service definitions 181 * Note: Further documentation of these definitions can be found in the 182 * TF-M ITS Integration Guide. The ITS should be in the internal flash, but is 183 * allocated in the external flash just for development platforms that don't 184 * have internal flash available. 185 */ 186 #define TFM_HAL_ITS_FLASH_DRIVER Driver_FLASH0 187 188 /* In this target the CMSIS driver requires only the offset from the base 189 * address instead of the full memory address. 190 */ 191 /* Base address of dedicated flash area for ITS */ 192 #define TFM_HAL_ITS_FLASH_AREA_ADDR FLASH_ITS_AREA_OFFSET 193 /* Size of dedicated flash area for ITS */ 194 #define TFM_HAL_ITS_FLASH_AREA_SIZE FLASH_ITS_AREA_SIZE 195 #define ITS_RAM_FS_SIZE TFM_HAL_ITS_FLASH_AREA_SIZE 196 /* Number of physical erase sectors per logical FS block */ 197 #define TFM_HAL_ITS_SECTORS_PER_BLOCK (1) 198 /* Smallest flash programmable unit in bytes */ 199 #define TFM_HAL_ITS_PROGRAM_UNIT (0x1) 200 201 /* OTP / NV counter definitions */ 202 #define TFM_OTP_NV_COUNTERS_AREA_SIZE (FLASH_OTP_NV_COUNTERS_AREA_SIZE / 2) 203 #define TFM_OTP_NV_COUNTERS_AREA_ADDR FLASH_OTP_NV_COUNTERS_AREA_OFFSET 204 #define TFM_OTP_NV_COUNTERS_SECTOR_SIZE FLASH_OTP_NV_COUNTERS_SECTOR_SIZE 205 #define TFM_OTP_NV_COUNTERS_BACKUP_AREA_ADDR (TFM_OTP_NV_COUNTERS_AREA_ADDR + \ 206 TFM_OTP_NV_COUNTERS_AREA_SIZE) 207 208 /* Use Internal SRAM0~3 to store RW data 209 * ISRAM0 and ISRAM1 for Secure Data 210 * ISRAM2 and ISRAM3 for Non-Secure Data 211 */ 212 #define S_ROM_ALIAS_BASE (0x10000000) 213 #define NS_ROM_ALIAS_BASE (0x00000000) 214 215 #define S_RAM_ALIAS_BASE (0x30000000) 216 #define NS_RAM_ALIAS_BASE (0x20000000) 217 218 #define TOTAL_RAM_SIZE (0x20000) /* 128 KB */ 219 220 #endif /* __FLASH_LAYOUT_H__ */ 221
