1 /******************************************************************************
2 *  Filename:       aux_tdc.h
3 *
4 *  Description:    Defines and prototypes for the AUX Time-to-Digital Converter
5 *
6 *  Copyright (c) 2015 - 2022, Texas Instruments Incorporated
7 *  All rights reserved.
8 *
9 *  Redistribution and use in source and binary forms, with or without
10 *  modification, are permitted provided that the following conditions are met:
11 *
12 *  1) Redistributions of source code must retain the above copyright notice,
13 *     this list of conditions and the following disclaimer.
14 *
15 *  2) Redistributions in binary form must reproduce the above copyright notice,
16 *     this list of conditions and the following disclaimer in the documentation
17 *     and/or other materials provided with the distribution.
18 *
19 *  3) Neither the name of the ORGANIZATION nor the names of its contributors may
20 *     be used to endorse or promote products derived from this software without
21 *     specific prior written permission.
22 *
23 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
27 *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 *  POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************/
36 
37 //*****************************************************************************
38 //
39 //! \addtogroup aux_group
40 //! @{
41 //! \addtogroup auxtdc_api
42 //! @{
43 //
44 //*****************************************************************************
45 
46 #ifndef __AUX_TDC_H__
47 #define __AUX_TDC_H__
48 
49 //*****************************************************************************
50 //
51 // If building with a C++ compiler, make all of the definitions in this header
52 // have a C binding.
53 //
54 //*****************************************************************************
55 #ifdef __cplusplus
56 extern "C"
57 {
58 #endif
59 
60 #include <stdbool.h>
61 #include <stdint.h>
62 #include "../inc/hw_types.h"
63 #include "../inc/hw_memmap.h"
64 #include "../inc/hw_ints.h"
65 #include "../inc/hw_aux_tdc.h"
66 #include "debug.h"
67 
68 //*****************************************************************************
69 //
70 // Support for DriverLib in ROM:
71 // This section renames all functions that are not "static inline", so that
72 // calling these functions will default to implementation in flash. At the end
73 // of this file a second renaming will change the defaults to implementation in
74 // ROM for available functions.
75 //
76 // To force use of the implementation in flash, e.g. for debugging:
77 // - Globally: Define DRIVERLIB_NOROM at project level
78 // - Per function: Use prefix "NOROM_" when calling the function
79 //
80 //*****************************************************************************
81 #if !defined(DOXYGEN)
82     #define AUXTDCConfigSet                 NOROM_AUXTDCConfigSet
83     #define AUXTDCMeasurementDone           NOROM_AUXTDCMeasurementDone
84 #endif
85 
86 //*****************************************************************************
87 //
88 // Defines for the status of a AUX TDC measurement.
89 //
90 //*****************************************************************************
91 #define AUX_TDC_BUSY            0x00000001
92 #define AUX_TDC_TIMEOUT         0x00000002
93 #define AUX_TDC_DONE            0x00000004
94 
95 //*****************************************************************************
96 //
97 // Defines for the control of a AUX TDC.
98 //
99 //*****************************************************************************
100 #define AUX_TDC_RUNSYNC         0x00000001
101 #define AUX_TDC_RUN             0x00000002
102 #define AUX_TDC_ABORT           0x00000003
103 
104 //*****************************************************************************
105 //
106 // Defines for possible states of the TDC internal state machine.
107 //
108 //*****************************************************************************
109 #define AUXTDC_WAIT_START         (AUX_TDC_STAT_STATE_WAIT_START)
110 #define AUXTDC_WAIT_START_CNTEN   (AUX_TDC_STAT_STATE_WAIT_START_STOP_CNT_EN)
111 #define AUXTDC_IDLE               (AUX_TDC_STAT_STATE_IDLE)
112 #define AUXTDC_CLRCNT             (AUX_TDC_STAT_STATE_CLR_CNT)
113 #define AUXTDC_WAIT_STOP          (AUX_TDC_STAT_STATE_WAIT_STOP)
114 #define AUXTDC_WAIT_STOP_CNTDOWN  (AUX_TDC_STAT_STATE_WAIT_STOP_CNTDWN)
115 #define AUXTDC_GETRESULTS         (AUX_TDC_STAT_STATE_GET_RESULT)
116 #define AUXTDC_POR                (AUX_TDC_STAT_STATE_POR)
117 #define AUXTDC_WAIT_CLRCNT_DONE   (AUX_TDC_STAT_STATE_WAIT_CLR_CNT_DONE)
118 #define AUXTDC_START_FALL         (AUX_TDC_STAT_STATE_START_FALL)
119 #define AUXTDC_FORCE_STOP         (AUX_TDC_STAT_STATE_FORCE_STOP)
120 
121 //*****************************************************************************
122 //
123 // Defines for controlling the AUX TDC. Values can be passed to AUXTDCConfigSet().
124 //
125 //*****************************************************************************
126 #define AUXTDC_STOPPOL_RIS                (AUX_TDC_TRIGSRC_STOP_POL_HIGH) // Rising edge polarity for stop event
127 #define AUXTDC_STOPPOL_FALL               (AUX_TDC_TRIGSRC_STOP_POL_LOW)  // Falling edge polarity for stop event
128 
129 #define AUXTDC_STOP_AUXIO0                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO0)
130 #define AUXTDC_STOP_AUXIO1                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO1)
131 #define AUXTDC_STOP_AUXIO2                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO2)
132 #define AUXTDC_STOP_AUXIO3                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO3)
133 #define AUXTDC_STOP_AUXIO4                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO4)
134 #define AUXTDC_STOP_AUXIO5                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO5)
135 #define AUXTDC_STOP_AUXIO6                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO6)
136 #define AUXTDC_STOP_AUXIO7                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO7)
137 #define AUXTDC_STOP_AUXIO8                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO8)
138 #define AUXTDC_STOP_AUXIO9                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO9)
139 #define AUXTDC_STOP_AUXIO10               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO10)
140 #define AUXTDC_STOP_AUXIO11               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO11)
141 #define AUXTDC_STOP_AUXIO12               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO12)
142 #define AUXTDC_STOP_AUXIO13               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO13)
143 #define AUXTDC_STOP_AUXIO14               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO14)
144 #define AUXTDC_STOP_AUXIO15               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO15)
145 #define AUXTDC_STOP_AUXIO16               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO16)
146 #define AUXTDC_STOP_AUXIO17               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO17)
147 #define AUXTDC_STOP_AUXIO18               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO18)
148 #define AUXTDC_STOP_AUXIO19               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO19)
149 #define AUXTDC_STOP_AUXIO20               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO20)
150 #define AUXTDC_STOP_AUXIO21               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO21)
151 #define AUXTDC_STOP_AUXIO22               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO22)
152 #define AUXTDC_STOP_AUXIO23               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO23)
153 #define AUXTDC_STOP_AUXIO24               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO24)
154 #define AUXTDC_STOP_AUXIO25               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO25)
155 #define AUXTDC_STOP_AUXIO26               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO26)
156 #define AUXTDC_STOP_AUXIO27               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO27)
157 #define AUXTDC_STOP_AUXIO28               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO28)
158 #define AUXTDC_STOP_AUXIO29               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO29)
159 #define AUXTDC_STOP_AUXIO30               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO30)
160 #define AUXTDC_STOP_AUXIO31               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO31)
161 #define AUXTDC_STOP_MANUAL_EV             (AUX_TDC_TRIGSRC_STOP_SRC_MANUAL_EV)
162 #define AUXTDC_STOP_AON_RTC_CH2_DLY       (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2_DLY)
163 #define AUXTDC_STOP_AON_RTC_4KHZ          (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_4KHZ)
164 #define AUXTDC_STOP_AON_BATMON_BAT_UPD    (AUX_TDC_TRIGSRC_STOP_SRC_AON_BATMON_BAT_UPD)
165 #define AUXTDC_STOP_AON_BATMON_TEMP_UPD   (AUX_TDC_TRIGSRC_STOP_SRC_AON_BATMON_TEMP_UPD)
166 #define AUXTDC_STOP_SCLK_LF               (AUX_TDC_TRIGSRC_STOP_SRC_SCLK_LF)
167 #define AUXTDC_STOP_PWR_DWN               (AUX_TDC_TRIGSRC_STOP_SRC_PWR_DWN)
168 #define AUXTDC_STOP_MCU_ACTIVE            (AUX_TDC_TRIGSRC_STOP_SRC_MCU_ACTIVE)
169 #define AUXTDC_STOP_VDDR_RECHARGE         (AUX_TDC_TRIGSRC_STOP_SRC_VDDR_RECHARGE)
170 #define AUXTDC_STOP_TIMER2_EV0            (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV0)
171 #define AUXTDC_STOP_TIMER2_EV1            (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV1)
172 #define AUXTDC_STOP_TIMER2_EV2            (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV2)
173 #define AUXTDC_STOP_TIMER2_EV3            (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV3)
174 #define AUXTDC_STOP_TIMER2_PULSE          (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_PULSE)
175 #define AUXTDC_STOP_TDC_DONE              (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TDC_DONE)
176 #define AUXTDC_STOP_ADC_IRQ               (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_IRQ)
177 #define AUXTDC_STOP_ADC_FIFO_NOT_EMPTY    (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_FIFO_NOT_EMPTY)
178 #define AUXTDC_STOP_NO_EVENT              (AUX_TDC_TRIGSRC_STOP_SRC_NO_EVENT)
179 #define AUXTDC_STOP_ADC_DONE              (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_DONE)
180 #define AUXTDC_STOP_ADC_FIFO_ALMOST_FULL  (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_FIFO_ALMOST_FULL)
181 #define AUXTDC_STOP_ISRC_RESET            (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ISRC_RESET_N)
182 #define AUXTDC_STOP_OBSMUX0               (AUX_TDC_TRIGSRC_STOP_SRC_MCU_OBSMUX0)
183 #define AUXTDC_STOP_OBSMUX1               (AUX_TDC_TRIGSRC_STOP_SRC_MCU_OBSMUX1)
184 #define AUXTDC_STOP_SMPH_AUTOTAKE_DONE    (AUX_TDC_TRIGSRC_STOP_SRC_AUX_SMPH_AUTOTAKE_DONE)
185 #define AUXTDC_STOP_TDC_PRE               (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TDC_PRE)
186 #define AUXTDC_STOP_TIMER0_EV             (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER0_EV)
187 #define AUXTDC_STOP_TIMER1_EV             (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER1_EV)
188 #define AUXTDC_STOP_AON_RTC_CH2           (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2)
189 #define AUXTDC_STOP_AUX_COMPA             (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPA)
190 #define AUXTDC_STOP_AUX_COMPB             (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPB)
191 #define AUXTDC_STOP_ACLK_REF              (AUX_TDC_TRIGSRC_STOP_SRC_ACLK_REF)
192 #define AUXTDC_STOP_MCU_EV                (AUX_TDC_TRIGSRC_STOP_SRC_MCU_EV)
193 
194 #define AUXTDC_STARTPOL_RIS               (AUX_TDC_TRIGSRC_START_POL_HIGH) // Rising edge polarity for start event
195 #define AUXTDC_STARTPOL_FALL              (AUX_TDC_TRIGSRC_START_POL_LOW)  // Falling edge polarity for start event
196 
197 #define AUXTDC_START_AUXIO0               (AUX_TDC_TRIGSRC_START_SRC_AUXIO0)
198 #define AUXTDC_START_AUXIO1               (AUX_TDC_TRIGSRC_START_SRC_AUXIO1)
199 #define AUXTDC_START_AUXIO2               (AUX_TDC_TRIGSRC_START_SRC_AUXIO2)
200 #define AUXTDC_START_AUXIO3               (AUX_TDC_TRIGSRC_START_SRC_AUXIO3)
201 #define AUXTDC_START_AUXIO4               (AUX_TDC_TRIGSRC_START_SRC_AUXIO4)
202 #define AUXTDC_START_AUXIO5               (AUX_TDC_TRIGSRC_START_SRC_AUXIO5)
203 #define AUXTDC_START_AUXIO6               (AUX_TDC_TRIGSRC_START_SRC_AUXIO6)
204 #define AUXTDC_START_AUXIO7               (AUX_TDC_TRIGSRC_START_SRC_AUXIO7)
205 #define AUXTDC_START_AUXIO8               (AUX_TDC_TRIGSRC_START_SRC_AUXIO8)
206 #define AUXTDC_START_AUXIO9               (AUX_TDC_TRIGSRC_START_SRC_AUXIO9)
207 #define AUXTDC_START_AUXIO10              (AUX_TDC_TRIGSRC_START_SRC_AUXIO10)
208 #define AUXTDC_START_AUXIO11              (AUX_TDC_TRIGSRC_START_SRC_AUXIO11)
209 #define AUXTDC_START_AUXIO12              (AUX_TDC_TRIGSRC_START_SRC_AUXIO12)
210 #define AUXTDC_START_AUXIO13              (AUX_TDC_TRIGSRC_START_SRC_AUXIO13)
211 #define AUXTDC_START_AUXIO14              (AUX_TDC_TRIGSRC_START_SRC_AUXIO14)
212 #define AUXTDC_START_AUXIO15              (AUX_TDC_TRIGSRC_START_SRC_AUXIO15)
213 #define AUXTDC_START_AUXIO16              (AUX_TDC_TRIGSRC_START_SRC_AUXIO16)
214 #define AUXTDC_START_AUXIO17              (AUX_TDC_TRIGSRC_START_SRC_AUXIO17)
215 #define AUXTDC_START_AUXIO18              (AUX_TDC_TRIGSRC_START_SRC_AUXIO18)
216 #define AUXTDC_START_AUXIO19              (AUX_TDC_TRIGSRC_START_SRC_AUXIO19)
217 #define AUXTDC_START_AUXIO20              (AUX_TDC_TRIGSRC_START_SRC_AUXIO20)
218 #define AUXTDC_START_AUXIO21              (AUX_TDC_TRIGSRC_START_SRC_AUXIO21)
219 #define AUXTDC_START_AUXIO22              (AUX_TDC_TRIGSRC_START_SRC_AUXIO22)
220 #define AUXTDC_START_AUXIO23              (AUX_TDC_TRIGSRC_START_SRC_AUXIO23)
221 #define AUXTDC_START_AUXIO24              (AUX_TDC_TRIGSRC_START_SRC_AUXIO24)
222 #define AUXTDC_START_AUXIO25              (AUX_TDC_TRIGSRC_START_SRC_AUXIO25)
223 #define AUXTDC_START_AUXIO26              (AUX_TDC_TRIGSRC_START_SRC_AUXIO26)
224 #define AUXTDC_START_AUXIO27              (AUX_TDC_TRIGSRC_START_SRC_AUXIO27)
225 #define AUXTDC_START_AUXIO28              (AUX_TDC_TRIGSRC_START_SRC_AUXIO28)
226 #define AUXTDC_START_AUXIO29              (AUX_TDC_TRIGSRC_START_SRC_AUXIO29)
227 #define AUXTDC_START_AUXIO30              (AUX_TDC_TRIGSRC_START_SRC_AUXIO30)
228 #define AUXTDC_START_AUXIO31              (AUX_TDC_TRIGSRC_START_SRC_AUXIO31)
229 #define AUXTDC_START_MANUAL_EV            (AUX_TDC_TRIGSRC_START_SRC_MANUAL_EV)
230 #define AUXTDC_START_AON_RTC_CH2_DLY      (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2_DLY)
231 #define AUXTDC_START_AON_RTC_4KHZ         (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_4KHZ)
232 #define AUXTDC_START_AON_BATMON_BAT_UPD   (AUX_TDC_TRIGSRC_START_SRC_AON_BATMON_BAT_UPD)
233 #define AUXTDC_START_AON_BATMON_TEMP_UPD  (AUX_TDC_TRIGSRC_START_SRC_AON_BATMON_TEMP_UPD)
234 #define AUXTDC_START_SCLK_LF              (AUX_TDC_TRIGSRC_START_SRC_SCLK_LF)
235 #define AUXTDC_START_PWR_DWN              (AUX_TDC_TRIGSRC_START_SRC_PWR_DWN)
236 #define AUXTDC_START_MCU_ACTIVE           (AUX_TDC_TRIGSRC_START_SRC_MCU_ACTIVE)
237 #define AUXTDC_START_VDDR_RECHARGE        (AUX_TDC_TRIGSRC_START_SRC_VDDR_RECHARGE)
238 #define AUXTDC_START_TIMER2_EV0           (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV0)
239 #define AUXTDC_START_TIMER2_EV1           (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV1)
240 #define AUXTDC_START_TIMER2_EV2           (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV2)
241 #define AUXTDC_START_TIMER2_EV3           (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV3)
242 #define AUXTDC_START_TIMER2_PULSE         (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_PULSE)
243 #define AUXTDC_START_TDC_DONE             (AUX_TDC_TRIGSRC_START_SRC_AUX_TDC_DONE)
244 #define AUXTDC_START_ADC_IRQ              (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_IRQ)
245 #define AUXTDC_START_ADC_FIFO_NOT_EMPTY   (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_FIFO_NOT_EMPTY)
246 #define AUXTDC_START_NO_EVENT             (AUX_TDC_TRIGSRC_START_SRC_NO_EVENT)
247 #define AUXTDC_START_ADC_DONE             (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_DONE)
248 #define AUXTDC_START_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_FIFO_ALMOST_FULL)
249 #define AUXTDC_START_ISRC_RESET           (AUX_TDC_TRIGSRC_START_SRC_AUX_ISRC_RESET_N)
250 #define AUXTDC_START_OBSMUX0              (AUX_TDC_TRIGSRC_START_SRC_MCU_OBSMUX0)
251 #define AUXTDC_START_OBSMUX1              (AUX_TDC_TRIGSRC_START_SRC_MCU_OBSMUX1)
252 #define AUXTDC_START_SMPH_AUTOTAKE_DONE   (AUX_TDC_TRIGSRC_START_SRC_AUX_SMPH_AUTOTAKE_DONE)
253 #define AUXTDC_START_TDC_PRE              (AUX_TDC_TRIGSRC_START_SRC_AUX_TDC_PRE)
254 #define AUXTDC_START_TIMER0_EV            (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER0_EV)
255 #define AUXTDC_START_TIMER1_EV            (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER1_EV)
256 #define AUXTDC_START_AON_RTC_CH2          (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2)
257 #define AUXTDC_START_AUX_COMPA            (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPA)
258 #define AUXTDC_START_AUX_COMPB            (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPB)
259 #define AUXTDC_START_ACLK_REF             (AUX_TDC_TRIGSRC_START_SRC_ACLK_REF)
260 #define AUXTDC_START_MCU_EV               (AUX_TDC_TRIGSRC_START_SRC_MCU_EV)
261 
262 //*****************************************************************************
263 //
264 // Defines for the possible saturation values set using AUXTDCLimitSet().
265 //
266 //*****************************************************************************
267 #define AUXTDC_SAT_4096         (AUX_TDC_SATCFG_LIMIT_R12)
268 #define AUXTDC_SAT_8192         (AUX_TDC_SATCFG_LIMIT_R13)
269 #define AUXTDC_SAT_16384        (AUX_TDC_SATCFG_LIMIT_R14)
270 #define AUXTDC_SAT_32768        (AUX_TDC_SATCFG_LIMIT_R15)
271 #define AUXTDC_SAT_65536        (AUX_TDC_SATCFG_LIMIT_R16)
272 #define AUXTDC_SAT_131072       (AUX_TDC_SATCFG_LIMIT_R17)
273 #define AUXTDC_SAT_262144       (AUX_TDC_SATCFG_LIMIT_R18)
274 #define AUXTDC_SAT_524288       (AUX_TDC_SATCFG_LIMIT_R19)
275 #define AUXTDC_SAT_1048576      (AUX_TDC_SATCFG_LIMIT_R20)
276 #define AUXTDC_SAT_2097152      (AUX_TDC_SATCFG_LIMIT_R21)
277 #define AUXTDC_SAT_4194304      (AUX_TDC_SATCFG_LIMIT_R22)
278 #define AUXTDC_SAT_8388608      (AUX_TDC_SATCFG_LIMIT_R23)
279 #define AUXTDC_SAT_16777216     (AUX_TDC_SATCFG_LIMIT_R24)
280 #define AUXTDC_NUM_SAT_VALS     16
281 
282 //*****************************************************************************
283 //
284 // API Functions and prototypes
285 //
286 //*****************************************************************************
287 
288 #ifdef DRIVERLIB_DEBUG
289 //*****************************************************************************
290 //
291 //! \internal
292 //! \brief Checks an AUX TDC base address.
293 //!
294 //! This function determines if a AUX TDC port base address is valid.
295 //!
296 //! \param ui32Base is the base address of the AUX TDC port.
297 //!
298 //! \return Returns \c true if the base address is valid and \c false
299 //! otherwise.
300 //
301 //*****************************************************************************
302 static bool
AUXTDCBaseValid(uint32_t ui32Base)303 AUXTDCBaseValid(uint32_t ui32Base)
304 {
305     return(ui32Base == AUX_TDC_BASE);
306 }
307 #endif
308 
309 //*****************************************************************************
310 //
311 //! \brief Get the status of the AUX TDC internal state machine.
312 //!
313 //! This function will return the current state of the AUX TDC internal state
314 //! machine.
315 //! \param ui32Base is base address of the AUX TDC
316 //!
317 //! \return Returns the current state of the state machine.
318 //! Possible states for the state machine are:
319 //! - \ref AUXTDC_WAIT_START
320 //! - \ref AUXTDC_WAIT_START_CNTEN
321 //! - \ref AUXTDC_IDLE
322 //! - \ref AUXTDC_CLRCNT
323 //! - \ref AUXTDC_WAIT_STOP
324 //! - \ref AUXTDC_WAIT_STOP_CNTDOWN
325 //! - \ref AUXTDC_GETRESULTS
326 //! - \ref AUXTDC_POR
327 //! - \ref AUXTDC_WAIT_CLRCNT_DONE
328 //! - \ref AUXTDC_START_FALL
329 //! - \ref AUXTDC_FORCE_STOP.
330 //
331 //*****************************************************************************
332 __STATIC_INLINE uint32_t
AUXTDCStatusGet(uint32_t ui32Base)333 AUXTDCStatusGet(uint32_t ui32Base)
334 {
335     // Check the arguments.
336     ASSERT(AUXTDCBaseValid(ui32Base));
337 
338     // Return the status value for the correct ADI Slave.
339     return((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) >>
340            AUX_TDC_STAT_STATE_S);
341 }
342 
343 //*****************************************************************************
344 //
345 //! \brief Configure the operation of the AUX TDC.
346 //!
347 //! Use this function to configure the start and stop event for the AUX TDC.
348 //!
349 //! The \c ui32StartCondition must be a bitwise OR of the start event and the
350 //! polarity of the start event. The start events are:
351 //! - \ref AUXTDC_START_AUXIO0
352 //! - \ref AUXTDC_START_AUXIO1
353 //! - \ref AUXTDC_START_AUXIO2
354 //! - \ref AUXTDC_START_AUXIO3
355 //! - \ref AUXTDC_START_AUXIO4
356 //! - \ref AUXTDC_START_AUXIO5
357 //! - \ref AUXTDC_START_AUXIO6
358 //! - \ref AUXTDC_START_AUXIO7
359 //! - \ref AUXTDC_START_AUXIO8
360 //! - \ref AUXTDC_START_AUXIO9
361 //! - \ref AUXTDC_START_AUXIO10
362 //! - \ref AUXTDC_START_AUXIO11
363 //! - \ref AUXTDC_START_AUXIO12
364 //! - \ref AUXTDC_START_AUXIO13
365 //! - \ref AUXTDC_START_AUXIO14
366 //! - \ref AUXTDC_START_AUXIO15
367 //! - \ref AUXTDC_START_AUXIO16
368 //! - \ref AUXTDC_START_AUXIO17
369 //! - \ref AUXTDC_START_AUXIO18
370 //! - \ref AUXTDC_START_AUXIO19
371 //! - \ref AUXTDC_START_AUXIO20
372 //! - \ref AUXTDC_START_AUXIO21
373 //! - \ref AUXTDC_START_AUXIO22
374 //! - \ref AUXTDC_START_AUXIO23
375 //! - \ref AUXTDC_START_AUXIO24
376 //! - \ref AUXTDC_START_AUXIO25
377 //! - \ref AUXTDC_START_AUXIO26
378 //! - \ref AUXTDC_START_AUXIO27
379 //! - \ref AUXTDC_START_AUXIO28
380 //! - \ref AUXTDC_START_AUXIO29
381 //! - \ref AUXTDC_START_AUXIO30
382 //! - \ref AUXTDC_START_AUXIO31
383 //! - \ref AUXTDC_START_MANUAL_EV
384 //! - \ref AUXTDC_START_AON_RTC_CH2_DLY
385 //! - \ref AUXTDC_START_AON_RTC_4KHZ
386 //! - \ref AUXTDC_START_AON_BATMON_BAT_UPD
387 //! - \ref AUXTDC_START_AON_BATMON_TEMP_UPD
388 //! - \ref AUXTDC_START_SCLK_LF
389 //! - \ref AUXTDC_START_PWR_DWN
390 //! - \ref AUXTDC_START_MCU_ACTIVE
391 //! - \ref AUXTDC_START_VDDR_RECHARGE
392 //! - \ref AUXTDC_START_TIMER2_EV0
393 //! - \ref AUXTDC_START_TIMER2_EV1
394 //! - \ref AUXTDC_START_TIMER2_EV2
395 //! - \ref AUXTDC_START_TIMER2_EV3
396 //! - \ref AUXTDC_START_TIMER2_PULSE
397 //! - \ref AUXTDC_START_TDC_DONE
398 //! - \ref AUXTDC_START_ADC_IRQ
399 //! - \ref AUXTDC_START_ADC_FIFO_NOT_EMPTY
400 //! - \ref AUXTDC_START_NO_EVENT
401 //! - \ref AUXTDC_START_ADC_DONE
402 //! - \ref AUXTDC_START_ADC_FIFO_ALMOST_FULL
403 //! - \ref AUXTDC_START_ISRC_RESET
404 //! - \ref AUXTDC_START_OBSMUX0
405 //! - \ref AUXTDC_START_OBSMUX1
406 //! - \ref AUXTDC_START_SMPH_AUTOTAKE_DONE
407 //! - \ref AUXTDC_START_TDC_PRE
408 //! - \ref AUXTDC_START_TIMER0_EV
409 //! - \ref AUXTDC_START_TIMER1_EV
410 //! - \ref AUXTDC_START_AON_RTC_CH2
411 //! - \ref AUXTDC_START_AUX_COMPA
412 //! - \ref AUXTDC_START_AUX_COMPB
413 //! - \ref AUXTDC_START_ACLK_REF
414 //! - \ref AUXTDC_START_MCU_EV
415 //!
416 //! The polarity of the start event is either rising \ref AUXTDC_STARTPOL_RIS
417 //! or falling \ref AUXTDC_STARTPOL_FALL.
418 //!
419 //! The \c ui32StopCondition must be a bitwise OR of the stop event and the
420 //! polarity of the stop event. The stop events are:
421 //! - \ref AUXTDC_STOP_AUXIO0
422 //! - \ref AUXTDC_STOP_AUXIO1
423 //! - \ref AUXTDC_STOP_AUXIO2
424 //! - \ref AUXTDC_STOP_AUXIO3
425 //! - \ref AUXTDC_STOP_AUXIO4
426 //! - \ref AUXTDC_STOP_AUXIO5
427 //! - \ref AUXTDC_STOP_AUXIO6
428 //! - \ref AUXTDC_STOP_AUXIO7
429 //! - \ref AUXTDC_STOP_AUXIO8
430 //! - \ref AUXTDC_STOP_AUXIO9
431 //! - \ref AUXTDC_STOP_AUXIO10
432 //! - \ref AUXTDC_STOP_AUXIO11
433 //! - \ref AUXTDC_STOP_AUXIO12
434 //! - \ref AUXTDC_STOP_AUXIO13
435 //! - \ref AUXTDC_STOP_AUXIO14
436 //! - \ref AUXTDC_STOP_AUXIO15
437 //! - \ref AUXTDC_STOP_AUXIO16
438 //! - \ref AUXTDC_STOP_AUXIO17
439 //! - \ref AUXTDC_STOP_AUXIO18
440 //! - \ref AUXTDC_STOP_AUXIO19
441 //! - \ref AUXTDC_STOP_AUXIO20
442 //! - \ref AUXTDC_STOP_AUXIO21
443 //! - \ref AUXTDC_STOP_AUXIO22
444 //! - \ref AUXTDC_STOP_AUXIO23
445 //! - \ref AUXTDC_STOP_AUXIO24
446 //! - \ref AUXTDC_STOP_AUXIO25
447 //! - \ref AUXTDC_STOP_AUXIO26
448 //! - \ref AUXTDC_STOP_AUXIO27
449 //! - \ref AUXTDC_STOP_AUXIO28
450 //! - \ref AUXTDC_STOP_AUXIO29
451 //! - \ref AUXTDC_STOP_AUXIO30
452 //! - \ref AUXTDC_STOP_AUXIO31
453 //! - \ref AUXTDC_STOP_MANUAL_EV
454 //! - \ref AUXTDC_STOP_AON_RTC_CH2_DLY
455 //! - \ref AUXTDC_STOP_AON_RTC_4KHZ
456 //! - \ref AUXTDC_STOP_AON_BATMON_BAT_UPD
457 //! - \ref AUXTDC_STOP_AON_BATMON_TEMP_UPD
458 //! - \ref AUXTDC_STOP_SCLK_LF
459 //! - \ref AUXTDC_STOP_PWR_DWN
460 //! - \ref AUXTDC_STOP_MCU_ACTIVE
461 //! - \ref AUXTDC_STOP_VDDR_RECHARGE
462 //! - \ref AUXTDC_STOP_TIMER2_EV0
463 //! - \ref AUXTDC_STOP_TIMER2_EV1
464 //! - \ref AUXTDC_STOP_TIMER2_EV2
465 //! - \ref AUXTDC_STOP_TIMER2_EV3
466 //! - \ref AUXTDC_STOP_TIMER2_PULSE
467 //! - \ref AUXTDC_STOP_TDC_DONE
468 //! - \ref AUXTDC_STOP_ADC_IRQ
469 //! - \ref AUXTDC_STOP_ADC_FIFO_NOT_EMPTY
470 //! - \ref AUXTDC_STOP_NO_EVENT
471 //! - \ref AUXTDC_STOP_ADC_DONE
472 //! - \ref AUXTDC_STOP_ADC_FIFO_ALMOST_FULL
473 //! - \ref AUXTDC_STOP_ISRC_RESET
474 //! - \ref AUXTDC_STOP_OBSMUX0
475 //! - \ref AUXTDC_STOP_OBSMUX1
476 //! - \ref AUXTDC_STOP_SMPH_AUTOTAKE_DONE
477 //! - \ref AUXTDC_STOP_TDC_PRE
478 //! - \ref AUXTDC_STOP_TIMER0_EV
479 //! - \ref AUXTDC_STOP_TIMER1_EV
480 //! - \ref AUXTDC_STOP_AON_RTC_CH2
481 //! - \ref AUXTDC_STOP_AUX_COMPA
482 //! - \ref AUXTDC_STOP_AUX_COMPB
483 //! - \ref AUXTDC_STOP_ACLK_REF
484 //! - \ref AUXTDC_STOP_MCU_EV
485 //!
486 //! The polarity of the stop event is either rising \ref AUXTDC_STOPPOL_RIS
487 //! or falling \ref AUXTDC_STOPPOL_FALL.
488 //!
489 //! \note The AUX TDC should only be configured when the AUX TDC is in the Idle
490 //! state. To ensure that software does not lock up, it is recommended to
491 //! ensure that the AUX TDC is actually in idle when calling \ref AUXTDCConfigSet().
492 //! This can be tested using \ref AUXTDCIdle().
493 //!
494 //! \param ui32Base is base address of the AUX TDC.
495 //! \param ui32StartCondition is AUX TDC a bitwise OR of a start event and polarity.
496 //! \param ui32StopCondition is AUX TDC a bitwise OR of a stop event and polarity.
497 //!
498 //! \return None
499 //!
500 //! \sa \ref AUXTDCConfigSet(), \ref AUXTDCIdle()
501 //
502 //*****************************************************************************
503 extern void AUXTDCConfigSet(uint32_t ui32Base, uint32_t ui32StartCondition,
504                             uint32_t ui32StopCondition);
505 
506 //*****************************************************************************
507 //
508 //! \brief Check if the AUX TDC is in idle mode.
509 //!
510 //! This function can be used to check whether the AUX TDC internal state
511 //! machine is in idle mode. This is required before setting the polarity
512 //! of the start and stop event.
513 //!
514 //! \param ui32Base is the base address of the AUX TDC.
515 //!
516 //! \return Returns \c true if state machine is in idle and returns \c false
517 //! if the state machine is in any other state.
518 //
519 //*****************************************************************************
520 __STATIC_INLINE bool
AUXTDCIdle(uint32_t ui32Base)521 AUXTDCIdle(uint32_t ui32Base)
522 {
523     // Check the arguments.
524     ASSERT(AUXTDCBaseValid(ui32Base));
525 
526     // Check if the AUX TDC is in the Idle state.
527     return (((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
528              AUX_TDC_STAT_STATE_IDLE) ? true : false);
529 }
530 
531 //*****************************************************************************
532 //
533 //! \brief Enable the AUX TDC for a measurement.
534 //!
535 //! This function is used for arming the AUX TDC to begin a measurement as
536 //! soon as the start condition is met. There are two run modes:
537 //! - \ref AUX_TDC_RUNSYNC will wait for a falling event of the start pulse before
538 //!   starting measurement on next rising edge of start. This guarantees an edge
539 //!   triggered start and is recommended for frequency measurements. If the
540 //!   first falling edge is close to the start command it may be missed, but
541 //!   the TDC shall catch later falling edges and in any case guarantee a
542 //!   measurement start synchronous to the rising edge of the start event.
543 //! - The \ref AUX_TDC_RUN is asynchronous start and asynchronous stop mode. Using
544 //!   this a TDC measurement may start immediately if start is high and hence it
545 //!   may not give precise edge to edge measurements. This mode is only
546 //!   recommended when start pulse is guaranteed to arrive at least 7 clock
547 //!   periods after command.
548 //!
549 //! \note The AUX TDC should be configured and in Idle mode before calling this
550 //! function.
551 //!
552 //! \param ui32Base is the base address of the AUX TDC.
553 //! \param ui32RunMode is the run mode for the AUX TDC.
554 //! - \ref AUX_TDC_RUNSYNC : Synchronous run mode.
555 //! - \ref AUX_TDC_RUN : Asynchronous run mode.
556 //!
557 //! \return None
558 //
559 //*****************************************************************************
560 __STATIC_INLINE void
AUXTDCEnable(uint32_t ui32Base,uint32_t ui32RunMode)561 AUXTDCEnable(uint32_t ui32Base, uint32_t ui32RunMode)
562 {
563     // Check the arguments.
564     ASSERT(AUXTDCBaseValid(ui32Base));
565     ASSERT((ui32RunMode == AUX_TDC_RUN) ||
566            (ui32RunMode == AUX_TDC_RUNSYNC));
567 
568     // Enable the AUX TDC.
569     HWREG(ui32Base + AUX_TDC_O_CTL) = ui32RunMode;
570 }
571 
572 //*****************************************************************************
573 //
574 //! \brief Force the AUX TDC back to Idle mode.
575 //!
576 //! This function will force the AUX TDC in Idle mode. The internal state
577 //! machine will not go directly to Idle mode, so it is left to the programmer to
578 //! ensure that the state machine is in Idle mode before doing any new
579 //! configuration. This can be checked using \ref AUXTDCIdle().
580 //!
581 //! \param ui32Base is the base address of the AUX TDC.
582 //!
583 //! \return None
584 //!
585 //! \sa \ref AUXTDCIdle()
586 //
587 //*****************************************************************************
588 __STATIC_INLINE void
AUXTDCIdleForce(uint32_t ui32Base)589 AUXTDCIdleForce(uint32_t ui32Base)
590 {
591     // Check the arguments
592     ASSERT(AUXTDCBaseValid(ui32Base));
593 
594     // Abort operation of AUX TDC and force into Idle mode.
595     HWREG(ui32Base + AUX_TDC_O_CTL) = AUX_TDC_CTL_CMD_ABORT;
596 }
597 
598 //*****************************************************************************
599 //
600 //! \brief Check if the AUX TDC is done measuring.
601 //!
602 //! This function can be used to check whether the AUX TDC has finished a
603 //! measurement. The AUX TDC may have completed a measurement for two reasons.
604 //! Either it finish successfully \ref AUX_TDC_DONE or it failed due to a timeout
605 //! \ref AUX_TDC_TIMEOUT. If the AUX TDC is still measuring it this function
606 //! will return \ref AUX_TDC_BUSY.
607 //!
608 //! \param ui32Base is the base address of the AUX TDC.
609 //!
610 //! \return Returns the current status of a measurement:
611 //! - \ref AUX_TDC_DONE : An AUX TDC measurement finished successfully.
612 //! - \ref AUX_TDC_TIMEOUT : An AUX TDC measurement failed due to timeout.
613 //! - \ref AUX_TDC_BUSY : An AUX TDC measurement is being performed.
614 //
615 //*****************************************************************************
616 extern uint32_t AUXTDCMeasurementDone(uint32_t ui32Base);
617 
618 //*****************************************************************************
619 //
620 //! \brief Get the value of the latest measurement.
621 //!
622 //! This function is used for retrieving the value of the latest measurement
623 //! performed by the AUX TDC.
624 //!
625 //! \param ui32Base is the base address of the AUX TDC.
626 //!
627 //! \return Returns the result of the latest measurement.
628 //
629 //*****************************************************************************
630 __STATIC_INLINE uint32_t
AUXTDCMeasurementGet(uint32_t ui32Base)631 AUXTDCMeasurementGet(uint32_t ui32Base)
632 {
633     // Check the arguments.
634     ASSERT(AUXTDCBaseValid(ui32Base));
635 
636     // Return the measurement.
637     return (HWREG(ui32Base + AUX_TDC_O_RESULT));
638 }
639 
640 //*****************************************************************************
641 //
642 //! \brief Set the saturation limit of the measurement.
643 //!
644 //! This function is used to set a saturation limit for the event accumulation
645 //! register. The saturation limit is defined as a bit width of the
646 //! accumulation register and therefore increases in power of 2.
647 //!
648 //! \param ui32Base is base address of the AUX TDC.
649 //! \param ui32Limit is the saturation limit.
650 //! - \ref AUXTDC_SAT_4096
651 //! - \ref AUXTDC_SAT_8192
652 //! - \ref AUXTDC_SAT_16384
653 //! - \ref AUXTDC_SAT_32768
654 //! - \ref AUXTDC_SAT_65536
655 //! - \ref AUXTDC_SAT_131072
656 //! - \ref AUXTDC_SAT_262144
657 //! - \ref AUXTDC_SAT_524288
658 //! - \ref AUXTDC_SAT_1048576
659 //! - \ref AUXTDC_SAT_2097152
660 //! - \ref AUXTDC_SAT_4194304
661 //! - \ref AUXTDC_SAT_8388608
662 //! - \ref AUXTDC_SAT_16777216 (default)
663 //!
664 //! \return None
665 //!
666 //! \note The actual value of the accumulation register might increase slightly beyond
667 //! the saturation value before the saturation takes effect.
668 //!
669 //! \sa \ref AUXTDCLimitGet()
670 //
671 //*****************************************************************************
672 __STATIC_INLINE void
AUXTDCLimitSet(uint32_t ui32Base,uint32_t ui32Limit)673 AUXTDCLimitSet(uint32_t ui32Base, uint32_t ui32Limit)
674 {
675     // Check the arguments.
676     ASSERT(AUXTDCBaseValid(ui32Base));
677     ASSERT(ui32Limit < AUXTDC_NUM_SAT_VALS);
678 
679     // Set the saturation limit.
680     HWREG(ui32Base + AUX_TDC_O_SATCFG) = ui32Limit;
681 }
682 
683 //*****************************************************************************
684 //
685 //! \brief Get the saturation limit of the measurement.
686 //!
687 //! This function is used to retrieve the current saturation for the
688 //! accumulator register.
689 //!
690 //! \param ui32Base is base address of the AUX TDC.
691 //!
692 //! \return Returns the saturation limit.
693 //! - \ref AUXTDC_SAT_4096
694 //! - \ref AUXTDC_SAT_8192
695 //! - \ref AUXTDC_SAT_16384
696 //! - \ref AUXTDC_SAT_32768
697 //! - \ref AUXTDC_SAT_65536
698 //! - \ref AUXTDC_SAT_131072
699 //! - \ref AUXTDC_SAT_262144
700 //! - \ref AUXTDC_SAT_524288
701 //! - \ref AUXTDC_SAT_1048576
702 //! - \ref AUXTDC_SAT_2097152
703 //! - \ref AUXTDC_SAT_4194304
704 //! - \ref AUXTDC_SAT_8388608
705 //! - \ref AUXTDC_SAT_16777216
706 //!
707 //! \sa \ref AUXTDCLimitSet()
708 //
709 //*****************************************************************************
710 __STATIC_INLINE uint32_t
AUXTDCLimitGet(uint32_t ui32Base)711 AUXTDCLimitGet(uint32_t ui32Base)
712 {
713     // Check the arguments.
714     ASSERT(AUXTDCBaseValid(ui32Base));
715 
716     // Return the saturation limit.
717     return (HWREG(ui32Base + AUX_TDC_O_SATCFG));
718 }
719 
720 //*****************************************************************************
721 //
722 //! \brief Enables the counter if possible.
723 //!
724 //! This function can be used to enable the AUX TDC stop/compare event counter.
725 //! The counter can be used to measure multiple periods of a clock signal.
726 //! For each stop/compare event the counter will be decremented by one and
727 //! the measurement will continue running until the value of the counter
728 //! reaches 0. The current value of the counter can be read using
729 //! \ref AUXTDCCounterGet(). The reset value of the counter can be set using
730 //! \ref AUXTDCCounterSet().
731 //!
732 //! \param ui32Base is base address of the AUX TDC.
733 //!
734 //! \return Returns \c true if the counter was successfully enabled. If the
735 //! AUX TDC is not in Idle mode, the counter can not be enabled, and the
736 //! return value will be \c false.
737 //!
738 //! \sa \ref AUXTDCCounterGet(), \ref AUXTDCCounterSet()
739 //
740 //*****************************************************************************
741 __STATIC_INLINE bool
AUXTDCCounterEnable(uint32_t ui32Base)742 AUXTDCCounterEnable(uint32_t ui32Base)
743 {
744     // Check the arguments.
745     ASSERT(AUXTDCBaseValid(ui32Base));
746 
747     // Check if the AUX TDC is in idle mode. If not in Idle mode, the counter
748     // will not be enabled.
749     if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
750             AUX_TDC_STAT_STATE_IDLE))
751     {
752         return false;
753     }
754 
755     // Enable the counter.
756     HWREG(ui32Base + AUX_TDC_O_TRIGCNTCFG) = AUX_TDC_TRIGCNTCFG_EN;
757 
758     // Counter successfully enabled.
759     return true;
760 }
761 
762 //*****************************************************************************
763 //
764 //! \brief Disables the counter if possible.
765 //!
766 //! This function can be used to disable the AUX TDC stop/compare event counter.
767 //!
768 //! \param ui32Base is base address of the AUX TDC.
769 //!
770 //! \return Returns \c true if the counter was successfully disabled. If the
771 //! AUX TDC is not in Idle mode, the counter can not be disabled, and the
772 //! return value will be \c false.
773 //!
774 //! \sa \ref AUXTDCCounterEnable() for more information on how to use the counter.
775 //
776 //*****************************************************************************
777 __STATIC_INLINE bool
AUXTDCCounterDisable(uint32_t ui32Base)778 AUXTDCCounterDisable(uint32_t ui32Base)
779 {
780     // Check the arguments.
781     ASSERT(AUXTDCBaseValid(ui32Base));
782 
783     // Check if the AUX TDC is in Idle mode. If not in Idle mode, the counter
784     // will not be disabled.
785     if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
786             AUX_TDC_STAT_STATE_IDLE))
787     {
788         return false;
789     }
790 
791     // Disable the counter.
792     HWREG(ui32Base + AUX_TDC_O_TRIGCNTCFG) = 0;
793 
794     // Counter successfully disabled.
795     return true;
796 }
797 
798 //*****************************************************************************
799 //
800 //! \brief Set the reset number of counter compare/stop event to ignore before taking
801 //! a measurement.
802 //!
803 //! This function loads the reset value of the counter with the specified
804 //! number of events to ignore. A reset in this context means the counter
805 //! has been disabled and then enabled.
806 //!
807 //! \param ui32Base is base address of the AUX TDC.
808 //! \param ui32Events is the number of compare/stop events to load into the
809 //! counter.
810 //!
811 //! \return Returns \c true if the counter was successfully updated. If the
812 //! AUX TDC is not in Idle mode, the counter can not be updated, and the
813 //! return value will be \c false.
814 //!
815 //! \sa \ref AUXTDCCounterEnable()
816 //
817 //*****************************************************************************
818 __STATIC_INLINE bool
AUXTDCCounterSet(uint32_t ui32Base,uint32_t ui32Events)819 AUXTDCCounterSet(uint32_t ui32Base, uint32_t ui32Events)
820 {
821     // Check the arguments.
822     ASSERT(AUXTDCBaseValid(ui32Base));
823 
824     // Check if the AUX TDC is in idle mode. If not in idle mode, the counter
825     // will not be disabled.
826     if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
827             AUX_TDC_STAT_STATE_IDLE))
828     {
829         return false;
830     }
831 
832     // Update the reset counter value.
833     HWREG(ui32Base + AUX_TDC_O_TRIGCNTLOAD) = ui32Events;
834 
835     // Counter successfully updated.
836     return true;
837 }
838 
839 //*****************************************************************************
840 //
841 //! \brief Get the current number of counter compare/stop event to ignore before
842 //! taking a measurement.
843 //!
844 //! This function returns the current value of compare/stop events before
845 //! a measurement is registered. This value is decremented by one for each
846 //! registered compare/stop event and will always be less than or equal the
847 //! reset value of the counter set using \ref AUXTDCCounterSet().
848 //!
849 //! \param ui32Base is base address of the AUX TDC.
850 //!
851 //! \return Returns the current value of compare/stop events ignored before a
852 //! measurement is performed.
853 //!
854 //! \sa \ref AUXTDCCounterEnable().
855 //
856 //*****************************************************************************
857 __STATIC_INLINE uint32_t
AUXTDCCounterGet(uint32_t ui32Base)858 AUXTDCCounterGet(uint32_t ui32Base)
859 {
860     // Check the arguments.
861     ASSERT(AUXTDCBaseValid(ui32Base));
862 
863     // Return the current counter value.
864     return (HWREG(ui32Base + AUX_TDC_O_TRIGCNT));
865 }
866 
867 //*****************************************************************************
868 //
869 // Support for DriverLib in ROM:
870 // Redirect to implementation in ROM when available.
871 //
872 //*****************************************************************************
873 #if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
874     #include "../driverlib/rom.h"
875     #ifdef ROM_AUXTDCConfigSet
876         #undef  AUXTDCConfigSet
877         #define AUXTDCConfigSet                 ROM_AUXTDCConfigSet
878     #endif
879     #ifdef ROM_AUXTDCMeasurementDone
880         #undef  AUXTDCMeasurementDone
881         #define AUXTDCMeasurementDone           ROM_AUXTDCMeasurementDone
882     #endif
883 #endif
884 
885 //*****************************************************************************
886 //
887 // Mark the end of the C bindings section for C++ compilers.
888 //
889 //*****************************************************************************
890 #ifdef __cplusplus
891 }
892 #endif
893 
894 #endif // __AUX_TDC_H__
895 
896 //*****************************************************************************
897 //
898 //! Close the Doxygen group.
899 //! @}
900 //! @}
901 //
902 //*****************************************************************************
903