1 /**
2   ******************************************************************************
3   * @file    stm32g4xx_hal_lptim.c
4   * @author  MCD Application Team
5   * @brief   LPTIM HAL module driver.
6   *          This file provides firmware functions to manage the following
7   *          functionalities of the Low Power Timer (LPTIM) peripheral:
8   *           + Initialization and de-initialization functions.
9   *           + Start/Stop operation functions in polling mode.
10   *           + Start/Stop operation functions in interrupt mode.
11   *           + Reading operation functions.
12   *           + Peripheral State functions.
13   *
14   ******************************************************************************
15   * @attention
16   *
17   * Copyright (c) 2019 STMicroelectronics.
18   * All rights reserved.
19   *
20   * This software is licensed under terms that can be found in the LICENSE file
21   * in the root directory of this software component.
22   * If no LICENSE file comes with this software, it is provided AS-IS.
23   *
24   ******************************************************************************
25   @verbatim
26   ==============================================================================
27                      ##### How to use this driver #####
28   ==============================================================================
29     [..]
30       The LPTIM HAL driver can be used as follows:
31 
32       (#)Initialize the LPTIM low level resources by implementing the
33         HAL_LPTIM_MspInit():
34          (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
35          (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
36              (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
37              (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
38              (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
39 
40       (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
41          configures mainly:
42          (++) The instance: LPTIM1.
43          (++) Clock: the counter clock.
44              (+++) Source   : it can be either the ULPTIM input (IN1) or one of
45                               the internal clock; (APB, LSE or LSI).
46              (+++) Prescaler: select the clock divider.
47          (++)  UltraLowPowerClock : To be used only if the ULPTIM is selected
48                as counter clock source.
49              (+++) Polarity:   polarity of the active edge for the counter unit
50                                if the ULPTIM input is selected.
51              (+++) SampleTime: clock sampling time to configure the clock glitch
52                                filter.
53          (++) Trigger: How the counter start.
54              (+++) Source: trigger can be software or one of the hardware triggers.
55              (+++) ActiveEdge : only for hardware trigger.
56              (+++) SampleTime : trigger sampling time to configure the trigger
57                                 glitch filter.
58          (++) OutputPolarity : 2 opposite polarities are possible.
59          (++) UpdateMode: specifies whether the update of the autoreload and
60               the compare values is done immediately or after the end of current
61               period.
62          (++) Input1Source: Source selected for input1 (GPIO or comparator output).
63          (++) Input2Source: Source selected for input2 (GPIO or comparator output).
64               Input2 is used only for encoder feature so is used only for LPTIM1 instance.
65 
66       (#)Six modes are available:
67 
68          (++) PWM Mode: To generate a PWM signal with specified period and pulse,
69          call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
70          mode.
71 
72          (++) One Pulse Mode: To generate pulse with specified width in response
73          to a stimulus, call HAL_LPTIM_OnePulse_Start() or
74          HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
75 
76          (++) Set once Mode: In this mode, the output changes the level (from
77          low level to high level if the output polarity is configured high, else
78          the opposite) when a compare match occurs. To start this mode, call
79          HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
80          interruption mode.
81 
82          (++) Encoder Mode: To use the encoder interface call
83          HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
84          interruption mode. Only available for LPTIM1 instance.
85 
86          (++) Time out Mode: an active edge on one selected trigger input rests
87          the counter. The first trigger event will start the timer, any
88          successive trigger event will reset the counter and the timer will
89          restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
90          HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
91 
92          (++) Counter Mode: counter can be used to count external events on
93          the LPTIM Input1 or it can be used to count internal clock cycles.
94          To start this mode, call HAL_LPTIM_Counter_Start() or
95          HAL_LPTIM_Counter_Start_IT() for interruption mode.
96 
97 
98       (#) User can stop any process by calling the corresponding API:
99           HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
100           already started in interruption mode.
101 
102       (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
103 
104     *** Callback registration ***
105   =============================================
106   [..]
107   The compilation define  USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
108   allows the user to configure dynamically the driver callbacks.
109   [..]
110   Use Function HAL_LPTIM_RegisterCallback() to register a callback.
111   HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
112   the Callback ID and a pointer to the user callback function.
113   [..]
114   Use function HAL_LPTIM_UnRegisterCallback() to reset a callback to the
115   default weak function.
116   HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
117   and the Callback ID.
118   [..]
119   These functions allow to register/unregister following callbacks:
120 
121     (+) MspInitCallback         : LPTIM Base Msp Init Callback.
122     (+) MspDeInitCallback       : LPTIM Base Msp DeInit Callback.
123     (+) CompareMatchCallback    : Compare match Callback.
124     (+) AutoReloadMatchCallback : Auto-reload match Callback.
125     (+) TriggerCallback         : External trigger event detection Callback.
126     (+) CompareWriteCallback    : Compare register write complete Callback.
127     (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
128     (+) DirectionUpCallback     : Up-counting direction change Callback.
129     (+) DirectionDownCallback   : Down-counting direction change Callback.
130 
131   [..]
132   By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
133   all interrupt callbacks are set to the corresponding weak functions:
134   examples HAL_LPTIM_TriggerCallback(), HAL_LPTIM_CompareMatchCallback().
135 
136   [..]
137   Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
138   functionalities in the Init/DeInit only when these callbacks are null
139   (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
140   keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
141 
142   [..]
143   Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
144   Exception done MspInit/MspDeInit that can be registered/unregistered
145   in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
146   thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
147   In that case first register the MspInit/MspDeInit user callbacks
148   using HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
149 
150   [..]
151   When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
152   not defined, the callback registration feature is not available and all callbacks
153   are set to the corresponding weak functions.
154 
155   @endverbatim
156   ******************************************************************************
157   */
158 
159 /* Includes ------------------------------------------------------------------*/
160 #include "stm32g4xx_hal.h"
161 
162 /** @addtogroup STM32G4xx_HAL_Driver
163   * @{
164   */
165 
166 /** @defgroup LPTIM LPTIM
167   * @brief LPTIM HAL module driver.
168   * @{
169   */
170 
171 #ifdef HAL_LPTIM_MODULE_ENABLED
172 
173 
174 
175 /* Private typedef -----------------------------------------------------------*/
176 /* Private define ------------------------------------------------------------*/
177 /** @addtogroup LPTIM_Private_Constants
178   * @{
179   */
180 #define TIMEOUT                                     1000UL /* Timeout is 1s */
181 /**
182   * @}
183   */
184 
185 /* Private macro -------------------------------------------------------------*/
186 /* Private variables ---------------------------------------------------------*/
187 /* Private function prototypes -----------------------------------------------*/
188 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
189 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
190 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
191 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag);
192 
193 /* Exported functions --------------------------------------------------------*/
194 
195 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
196   * @{
197   */
198 
199 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
200   *  @brief    Initialization and Configuration functions.
201   *
202 @verbatim
203   ==============================================================================
204               ##### Initialization and de-initialization functions #####
205   ==============================================================================
206     [..]  This section provides functions allowing to:
207       (+) Initialize the LPTIM according to the specified parameters in the
208           LPTIM_InitTypeDef and initialize the associated handle.
209       (+) DeInitialize the LPTIM peripheral.
210       (+) Initialize the LPTIM MSP.
211       (+) DeInitialize the LPTIM MSP.
212 
213 @endverbatim
214   * @{
215   */
216 
217 /**
218   * @brief  Initialize the LPTIM according to the specified parameters in the
219   *         LPTIM_InitTypeDef and initialize the associated handle.
220   * @param  hlptim LPTIM handle
221   * @retval HAL status
222   */
HAL_LPTIM_Init(LPTIM_HandleTypeDef * hlptim)223 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
224 {
225   uint32_t tmpcfgr;
226 
227   /* Check the LPTIM handle allocation */
228   if (hlptim == NULL)
229   {
230     return HAL_ERROR;
231   }
232 
233   /* Check the parameters */
234   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
235 
236   assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
237   assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
238   if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
239       || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
240   {
241     assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
242     assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
243   }
244   assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
245   if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
246   {
247     assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
248     assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
249   }
250   assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
251   assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
252   assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
253 
254   if (hlptim->State == HAL_LPTIM_STATE_RESET)
255   {
256     /* Allocate lock resource and initialize it */
257     hlptim->Lock = HAL_UNLOCKED;
258 
259 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
260     /* Reset interrupt callbacks to legacy weak callbacks */
261     LPTIM_ResetCallback(hlptim);
262 
263     if (hlptim->MspInitCallback == NULL)
264     {
265       hlptim->MspInitCallback = HAL_LPTIM_MspInit;
266     }
267 
268     /* Init the low level hardware : GPIO, CLOCK, NVIC */
269     hlptim->MspInitCallback(hlptim);
270 #else
271     /* Init the low level hardware : GPIO, CLOCK, NVIC */
272     HAL_LPTIM_MspInit(hlptim);
273 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
274   }
275 
276   /* Change the LPTIM state */
277   hlptim->State = HAL_LPTIM_STATE_BUSY;
278 
279   /* Get the LPTIMx CFGR value */
280   tmpcfgr = hlptim->Instance->CFGR;
281 
282   if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
283       || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
284   {
285     tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
286   }
287   if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
288   {
289     tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
290   }
291 
292   /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
293   tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
294                           LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
295 
296   /* Set initialization parameters */
297   tmpcfgr |= (hlptim->Init.Clock.Source    |
298               hlptim->Init.Clock.Prescaler |
299               hlptim->Init.OutputPolarity  |
300               hlptim->Init.UpdateMode      |
301               hlptim->Init.CounterSource);
302 
303   /* Glitch filters for internal triggers and  external inputs are configured
304    * only if an internal clock source is provided to the LPTIM
305    */
306   if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
307   {
308     tmpcfgr |= (hlptim->Init.Trigger.SampleTime |
309                 hlptim->Init.UltraLowPowerClock.SampleTime);
310   }
311 
312   /* Configure LPTIM external clock polarity and digital filter */
313   if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
314       || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
315   {
316     tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
317                 hlptim->Init.UltraLowPowerClock.SampleTime);
318   }
319 
320   /* Configure LPTIM external trigger */
321   if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
322   {
323     /* Enable External trigger and set the trigger source */
324     tmpcfgr |= (hlptim->Init.Trigger.Source     |
325                 hlptim->Init.Trigger.ActiveEdge |
326                 hlptim->Init.Trigger.SampleTime);
327   }
328 
329   /* Write to LPTIMx CFGR */
330   hlptim->Instance->CFGR = tmpcfgr;
331 
332   /* Configure LPTIM input sources */
333   if (hlptim->Instance == LPTIM1)
334   {
335     /* Check LPTIM Input1 and Input2 sources */
336     assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
337     assert_param(IS_LPTIM_INPUT2_SOURCE(hlptim->Instance, hlptim->Init.Input2Source));
338 
339     /* Configure LPTIM Input1 and Input2 sources */
340     hlptim->Instance->OR = (hlptim->Init.Input1Source | hlptim->Init.Input2Source);
341   }
342 
343   /* Change the LPTIM state */
344   hlptim->State = HAL_LPTIM_STATE_READY;
345 
346   /* Return function status */
347   return HAL_OK;
348 }
349 
350 /**
351   * @brief  DeInitialize the LPTIM peripheral.
352   * @param  hlptim LPTIM handle
353   * @retval HAL status
354   */
HAL_LPTIM_DeInit(LPTIM_HandleTypeDef * hlptim)355 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
356 {
357   /* Check the LPTIM handle allocation */
358   if (hlptim == NULL)
359   {
360     return HAL_ERROR;
361   }
362 
363   /* Change the LPTIM state */
364   hlptim->State = HAL_LPTIM_STATE_BUSY;
365 
366   /* Disable the LPTIM Peripheral Clock */
367   __HAL_LPTIM_DISABLE(hlptim);
368 
369   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
370   {
371     return HAL_TIMEOUT;
372   }
373 
374 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
375   if (hlptim->MspDeInitCallback == NULL)
376   {
377     hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
378   }
379 
380   /* DeInit the low level hardware: CLOCK, NVIC.*/
381   hlptim->MspDeInitCallback(hlptim);
382 #else
383   /* DeInit the low level hardware: CLOCK, NVIC.*/
384   HAL_LPTIM_MspDeInit(hlptim);
385 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
386 
387   /* Change the LPTIM state */
388   hlptim->State = HAL_LPTIM_STATE_RESET;
389 
390   /* Release Lock */
391   __HAL_UNLOCK(hlptim);
392 
393   /* Return function status */
394   return HAL_OK;
395 }
396 
397 /**
398   * @brief  Initialize the LPTIM MSP.
399   * @param  hlptim LPTIM handle
400   * @retval None
401   */
HAL_LPTIM_MspInit(LPTIM_HandleTypeDef * hlptim)402 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
403 {
404   /* Prevent unused argument(s) compilation warning */
405   UNUSED(hlptim);
406 
407   /* NOTE : This function should not be modified, when the callback is needed,
408             the HAL_LPTIM_MspInit could be implemented in the user file
409    */
410 }
411 
412 /**
413   * @brief  DeInitialize LPTIM MSP.
414   * @param  hlptim LPTIM handle
415   * @retval None
416   */
HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef * hlptim)417 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
418 {
419   /* Prevent unused argument(s) compilation warning */
420   UNUSED(hlptim);
421 
422   /* NOTE : This function should not be modified, when the callback is needed,
423             the HAL_LPTIM_MspDeInit could be implemented in the user file
424    */
425 }
426 
427 /**
428   * @}
429   */
430 
431 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
432   *  @brief   Start-Stop operation functions.
433   *
434 @verbatim
435   ==============================================================================
436                 ##### LPTIM Start Stop operation functions #####
437   ==============================================================================
438     [..]  This section provides functions allowing to:
439       (+) Start the PWM mode.
440       (+) Stop the PWM mode.
441       (+) Start the One pulse mode.
442       (+) Stop the One pulse mode.
443       (+) Start the Set once mode.
444       (+) Stop the Set once mode.
445       (+) Start the Encoder mode.
446       (+) Stop the Encoder mode.
447       (+) Start the Timeout mode.
448       (+) Stop the Timeout mode.
449       (+) Start the Counter mode.
450       (+) Stop the Counter mode.
451 
452 
453 @endverbatim
454   * @{
455   */
456 
457 /**
458   * @brief  Start the LPTIM PWM generation.
459   * @param  hlptim LPTIM handle
460   * @param  Period Specifies the Autoreload value.
461   *         This parameter must be a value between 0x0000 and 0xFFFF.
462   * @param  Pulse Specifies the compare value.
463   *         This parameter must be a value between 0x0000 and 0xFFFF.
464   * @retval HAL status
465   */
HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)466 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
467 {
468   /* Check the parameters */
469   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
470   assert_param(IS_LPTIM_PERIOD(Period));
471   assert_param(IS_LPTIM_PULSE(Pulse));
472 
473   /* Set the LPTIM state */
474   hlptim->State = HAL_LPTIM_STATE_BUSY;
475 
476   /* Reset WAVE bit to set PWM mode */
477   hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
478 
479   /* Enable the Peripheral */
480   __HAL_LPTIM_ENABLE(hlptim);
481 
482   /* Clear flag */
483   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
484 
485   /* Load the period value in the autoreload register */
486   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
487 
488   /* Wait for the completion of the write operation to the LPTIM_ARR register */
489   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
490   {
491     return HAL_TIMEOUT;
492   }
493 
494   /* Clear flag */
495   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
496 
497   /* Load the pulse value in the compare register */
498   __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
499 
500   /* Wait for the completion of the write operation to the LPTIM_CMP register */
501   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
502   {
503     return HAL_TIMEOUT;
504   }
505 
506   /* Start timer in continuous mode */
507   __HAL_LPTIM_START_CONTINUOUS(hlptim);
508 
509   /* Change the TIM state*/
510   hlptim->State = HAL_LPTIM_STATE_READY;
511 
512   /* Return function status */
513   return HAL_OK;
514 }
515 
516 /**
517   * @brief  Stop the LPTIM PWM generation.
518   * @param  hlptim LPTIM handle
519   * @retval HAL status
520   */
HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef * hlptim)521 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
522 {
523   /* Check the parameters */
524   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
525 
526   /* Set the LPTIM state */
527   hlptim->State = HAL_LPTIM_STATE_BUSY;
528 
529   /* Disable the Peripheral */
530   __HAL_LPTIM_DISABLE(hlptim);
531 
532   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
533   {
534     return HAL_TIMEOUT;
535   }
536 
537   /* Change the LPTIM state*/
538   hlptim->State = HAL_LPTIM_STATE_READY;
539 
540   /* Return function status */
541   return HAL_OK;
542 }
543 
544 /**
545   * @brief  Start the LPTIM PWM generation in interrupt mode.
546   * @param  hlptim LPTIM handle
547   * @param  Period Specifies the Autoreload value.
548   *         This parameter must be a value between 0x0000 and 0xFFFF
549   * @param  Pulse Specifies the compare value.
550   *         This parameter must be a value between 0x0000 and 0xFFFF
551   * @retval HAL status
552   */
HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)553 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
554 {
555   /* Check the parameters */
556   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
557   assert_param(IS_LPTIM_PERIOD(Period));
558   assert_param(IS_LPTIM_PULSE(Pulse));
559 
560   /* Set the LPTIM state */
561   hlptim->State = HAL_LPTIM_STATE_BUSY;
562 
563   /* Reset WAVE bit to set PWM mode */
564   hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
565 
566   /* Enable the Peripheral */
567   __HAL_LPTIM_ENABLE(hlptim);
568 
569   /* Clear flag */
570   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
571 
572   /* Load the period value in the autoreload register */
573   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
574 
575   /* Wait for the completion of the write operation to the LPTIM_ARR register */
576   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
577   {
578     return HAL_TIMEOUT;
579   }
580 
581   /* Clear flag */
582   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
583 
584   /* Load the pulse value in the compare register */
585   __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
586 
587   /* Wait for the completion of the write operation to the LPTIM_CMP register */
588   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
589   {
590     return HAL_TIMEOUT;
591   }
592 
593   /* Disable the Peripheral */
594   __HAL_LPTIM_DISABLE(hlptim);
595 
596   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
597   {
598     return HAL_TIMEOUT;
599   }
600 
601   /* Enable Autoreload write complete interrupt */
602   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
603 
604   /* Enable Compare write complete interrupt */
605   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
606 
607   /* Enable Autoreload match interrupt */
608   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
609 
610   /* Enable Compare match interrupt */
611   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
612 
613   /* If external trigger source is used, then enable external trigger interrupt */
614   if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
615   {
616     /* Enable external trigger interrupt */
617     __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
618   }
619 
620   /* Enable the Peripheral */
621   __HAL_LPTIM_ENABLE(hlptim);
622 
623   /* Start timer in continuous mode */
624   __HAL_LPTIM_START_CONTINUOUS(hlptim);
625 
626   /* Change the TIM state*/
627   hlptim->State = HAL_LPTIM_STATE_READY;
628 
629   /* Return function status */
630   return HAL_OK;
631 }
632 
633 /**
634   * @brief  Stop the LPTIM PWM generation in interrupt mode.
635   * @param  hlptim LPTIM handle
636   * @retval HAL status
637   */
HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef * hlptim)638 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
639 {
640   /* Check the parameters */
641   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
642 
643   /* Set the LPTIM state */
644   hlptim->State = HAL_LPTIM_STATE_BUSY;
645 
646   /* Disable the Peripheral */
647   __HAL_LPTIM_DISABLE(hlptim);
648 
649   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
650   {
651     return HAL_TIMEOUT;
652   }
653 
654   /* Disable Autoreload write complete interrupt */
655   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
656 
657   /* Disable Compare write complete interrupt */
658   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
659 
660   /* Disable Autoreload match interrupt */
661   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
662 
663   /* Disable Compare match interrupt */
664   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
665 
666   /* If external trigger source is used, then disable external trigger interrupt */
667   if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
668   {
669     /* Disable external trigger interrupt */
670     __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
671   }
672 
673   /* Change the LPTIM state*/
674   hlptim->State = HAL_LPTIM_STATE_READY;
675 
676   /* Return function status */
677   return HAL_OK;
678 }
679 
680 /**
681   * @brief  Start the LPTIM One pulse generation.
682   * @param  hlptim LPTIM handle
683   * @param  Period Specifies the Autoreload value.
684   *         This parameter must be a value between 0x0000 and 0xFFFF.
685   * @param  Pulse Specifies the compare value.
686   *         This parameter must be a value between 0x0000 and 0xFFFF.
687   * @retval HAL status
688   */
HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)689 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
690 {
691   /* Check the parameters */
692   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
693   assert_param(IS_LPTIM_PERIOD(Period));
694   assert_param(IS_LPTIM_PULSE(Pulse));
695 
696   /* Set the LPTIM state */
697   hlptim->State = HAL_LPTIM_STATE_BUSY;
698 
699   /* Reset WAVE bit to set one pulse mode */
700   hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
701 
702   /* Enable the Peripheral */
703   __HAL_LPTIM_ENABLE(hlptim);
704 
705   /* Clear flag */
706   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
707 
708   /* Load the period value in the autoreload register */
709   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
710 
711   /* Wait for the completion of the write operation to the LPTIM_ARR register */
712   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
713   {
714     return HAL_TIMEOUT;
715   }
716 
717   /* Clear flag */
718   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
719 
720   /* Load the pulse value in the compare register */
721   __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
722 
723   /* Wait for the completion of the write operation to the LPTIM_CMP register */
724   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
725   {
726     return HAL_TIMEOUT;
727   }
728 
729   /* Start timer in single (one shot) mode */
730   __HAL_LPTIM_START_SINGLE(hlptim);
731 
732   /* Change the TIM state*/
733   hlptim->State = HAL_LPTIM_STATE_READY;
734 
735   /* Return function status */
736   return HAL_OK;
737 }
738 
739 /**
740   * @brief  Stop the LPTIM One pulse generation.
741   * @param  hlptim LPTIM handle
742   * @retval HAL status
743   */
HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef * hlptim)744 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
745 {
746   /* Check the parameters */
747   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
748 
749   /* Set the LPTIM state */
750   hlptim->State = HAL_LPTIM_STATE_BUSY;
751 
752   /* Disable the Peripheral */
753   __HAL_LPTIM_DISABLE(hlptim);
754 
755   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
756   {
757     return HAL_TIMEOUT;
758   }
759 
760   /* Change the LPTIM state*/
761   hlptim->State = HAL_LPTIM_STATE_READY;
762 
763   /* Return function status */
764   return HAL_OK;
765 }
766 
767 /**
768   * @brief  Start the LPTIM One pulse generation in interrupt mode.
769   * @param  hlptim LPTIM handle
770   * @param  Period Specifies the Autoreload value.
771   *         This parameter must be a value between 0x0000 and 0xFFFF.
772   * @param  Pulse Specifies the compare value.
773   *         This parameter must be a value between 0x0000 and 0xFFFF.
774   * @retval HAL status
775   */
HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)776 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
777 {
778   /* Check the parameters */
779   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
780   assert_param(IS_LPTIM_PERIOD(Period));
781   assert_param(IS_LPTIM_PULSE(Pulse));
782 
783   /* Set the LPTIM state */
784   hlptim->State = HAL_LPTIM_STATE_BUSY;
785 
786   /* Reset WAVE bit to set one pulse mode */
787   hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
788 
789   /* Enable the Peripheral */
790   __HAL_LPTIM_ENABLE(hlptim);
791 
792   /* Clear flag */
793   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
794 
795   /* Load the period value in the autoreload register */
796   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
797 
798   /* Wait for the completion of the write operation to the LPTIM_ARR register */
799   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
800   {
801     return HAL_TIMEOUT;
802   }
803 
804   /* Clear flag */
805   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
806 
807   /* Load the pulse value in the compare register */
808   __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
809 
810   /* Wait for the completion of the write operation to the LPTIM_CMP register */
811   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
812   {
813     return HAL_TIMEOUT;
814   }
815 
816   /* Disable the Peripheral */
817   __HAL_LPTIM_DISABLE(hlptim);
818 
819   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
820   {
821     return HAL_TIMEOUT;
822   }
823 
824   /* Enable Autoreload write complete interrupt */
825   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
826 
827   /* Enable Compare write complete interrupt */
828   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
829 
830   /* Enable Autoreload match interrupt */
831   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
832 
833   /* Enable Compare match interrupt */
834   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
835 
836   /* If external trigger source is used, then enable external trigger interrupt */
837   if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
838   {
839     /* Enable external trigger interrupt */
840     __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
841   }
842 
843   /* Enable the Peripheral */
844   __HAL_LPTIM_ENABLE(hlptim);
845 
846   /* Start timer in single (one shot) mode */
847   __HAL_LPTIM_START_SINGLE(hlptim);
848 
849   /* Change the TIM state*/
850   hlptim->State = HAL_LPTIM_STATE_READY;
851 
852   /* Return function status */
853   return HAL_OK;
854 }
855 
856 /**
857   * @brief  Stop the LPTIM One pulse generation in interrupt mode.
858   * @param  hlptim LPTIM handle
859   * @retval HAL status
860   */
HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef * hlptim)861 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
862 {
863   /* Check the parameters */
864   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
865 
866   /* Set the LPTIM state */
867   hlptim->State = HAL_LPTIM_STATE_BUSY;
868 
869   /* Disable the Peripheral */
870   __HAL_LPTIM_DISABLE(hlptim);
871 
872   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
873   {
874     return HAL_TIMEOUT;
875   }
876 
877   /* Disable Autoreload write complete interrupt */
878   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
879 
880   /* Disable Compare write complete interrupt */
881   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
882 
883   /* Disable Autoreload match interrupt */
884   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
885 
886   /* Disable Compare match interrupt */
887   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
888 
889   /* If external trigger source is used, then disable external trigger interrupt */
890   if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
891   {
892     /* Disable external trigger interrupt */
893     __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
894   }
895 
896   /* Change the LPTIM state*/
897   hlptim->State = HAL_LPTIM_STATE_READY;
898 
899   /* Return function status */
900   return HAL_OK;
901 }
902 
903 /**
904   * @brief  Start the LPTIM in Set once mode.
905   * @param  hlptim LPTIM handle
906   * @param  Period Specifies the Autoreload value.
907   *         This parameter must be a value between 0x0000 and 0xFFFF.
908   * @param  Pulse Specifies the compare value.
909   *         This parameter must be a value between 0x0000 and 0xFFFF.
910   * @retval HAL status
911   */
HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)912 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
913 {
914   /* Check the parameters */
915   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
916   assert_param(IS_LPTIM_PERIOD(Period));
917   assert_param(IS_LPTIM_PULSE(Pulse));
918 
919   /* Set the LPTIM state */
920   hlptim->State = HAL_LPTIM_STATE_BUSY;
921 
922   /* Set WAVE bit to enable the set once mode */
923   hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
924 
925   /* Enable the Peripheral */
926   __HAL_LPTIM_ENABLE(hlptim);
927 
928   /* Clear flag */
929   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
930 
931   /* Load the period value in the autoreload register */
932   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
933 
934   /* Wait for the completion of the write operation to the LPTIM_ARR register */
935   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
936   {
937     return HAL_TIMEOUT;
938   }
939 
940   /* Clear flag */
941   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
942 
943   /* Load the pulse value in the compare register */
944   __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
945 
946   /* Wait for the completion of the write operation to the LPTIM_CMP register */
947   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
948   {
949     return HAL_TIMEOUT;
950   }
951 
952   /* Start timer in single (one shot) mode */
953   __HAL_LPTIM_START_SINGLE(hlptim);
954 
955   /* Change the TIM state*/
956   hlptim->State = HAL_LPTIM_STATE_READY;
957 
958   /* Return function status */
959   return HAL_OK;
960 }
961 
962 /**
963   * @brief  Stop the LPTIM Set once mode.
964   * @param  hlptim LPTIM handle
965   * @retval HAL status
966   */
HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef * hlptim)967 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
968 {
969   /* Check the parameters */
970   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
971 
972   /* Set the LPTIM state */
973   hlptim->State = HAL_LPTIM_STATE_BUSY;
974 
975   /* Disable the Peripheral */
976   __HAL_LPTIM_DISABLE(hlptim);
977 
978   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
979   {
980     return HAL_TIMEOUT;
981   }
982 
983   /* Change the LPTIM state*/
984   hlptim->State = HAL_LPTIM_STATE_READY;
985 
986   /* Return function status */
987   return HAL_OK;
988 }
989 
990 /**
991   * @brief  Start the LPTIM Set once mode in interrupt mode.
992   * @param  hlptim LPTIM handle
993   * @param  Period Specifies the Autoreload value.
994   *         This parameter must be a value between 0x0000 and 0xFFFF.
995   * @param  Pulse Specifies the compare value.
996   *         This parameter must be a value between 0x0000 and 0xFFFF.
997   * @retval HAL status
998   */
HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)999 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
1000 {
1001   /* Check the parameters */
1002   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1003   assert_param(IS_LPTIM_PERIOD(Period));
1004   assert_param(IS_LPTIM_PULSE(Pulse));
1005 
1006   /* Set the LPTIM state */
1007   hlptim->State = HAL_LPTIM_STATE_BUSY;
1008 
1009   /* Set WAVE bit to enable the set once mode */
1010   hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
1011 
1012   /* Enable the Peripheral */
1013   __HAL_LPTIM_ENABLE(hlptim);
1014 
1015   /* Clear flag */
1016   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1017 
1018   /* Load the period value in the autoreload register */
1019   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1020 
1021   /* Wait for the completion of the write operation to the LPTIM_ARR register */
1022   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1023   {
1024     return HAL_TIMEOUT;
1025   }
1026 
1027   /* Clear flag */
1028   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1029 
1030   /* Load the pulse value in the compare register */
1031   __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1032 
1033   /* Wait for the completion of the write operation to the LPTIM_CMP register */
1034   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1035   {
1036     return HAL_TIMEOUT;
1037   }
1038 
1039   /* Disable the Peripheral */
1040   __HAL_LPTIM_DISABLE(hlptim);
1041 
1042   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1043   {
1044     return HAL_TIMEOUT;
1045   }
1046 
1047   /* Enable Autoreload write complete interrupt */
1048   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1049 
1050   /* Enable Compare write complete interrupt */
1051   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
1052 
1053   /* Enable Autoreload match interrupt */
1054   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1055 
1056   /* Enable Compare match interrupt */
1057   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1058 
1059   /* If external trigger source is used, then enable external trigger interrupt */
1060   if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1061   {
1062     /* Enable external trigger interrupt */
1063     __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1064   }
1065 
1066   /* Enable the Peripheral */
1067   __HAL_LPTIM_ENABLE(hlptim);
1068 
1069   /* Start timer in single (one shot) mode */
1070   __HAL_LPTIM_START_SINGLE(hlptim);
1071 
1072   /* Change the TIM state*/
1073   hlptim->State = HAL_LPTIM_STATE_READY;
1074 
1075   /* Return function status */
1076   return HAL_OK;
1077 }
1078 
1079 /**
1080   * @brief  Stop the LPTIM Set once mode in interrupt mode.
1081   * @param  hlptim LPTIM handle
1082   * @retval HAL status
1083   */
HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef * hlptim)1084 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1085 {
1086   /* Check the parameters */
1087   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1088 
1089   /* Set the LPTIM state */
1090   hlptim->State = HAL_LPTIM_STATE_BUSY;
1091 
1092   /* Disable the Peripheral */
1093   __HAL_LPTIM_DISABLE(hlptim);
1094 
1095   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1096   {
1097     return HAL_TIMEOUT;
1098   }
1099 
1100   /* Disable Autoreload write complete interrupt */
1101   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1102 
1103   /* Disable Compare write complete interrupt */
1104   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
1105 
1106   /* Disable Autoreload match interrupt */
1107   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1108 
1109   /* Disable Compare match interrupt */
1110   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1111 
1112   /* If external trigger source is used, then disable external trigger interrupt */
1113   if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1114   {
1115     /* Disable external trigger interrupt */
1116     __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1117   }
1118 
1119   /* Change the LPTIM state*/
1120   hlptim->State = HAL_LPTIM_STATE_READY;
1121 
1122   /* Return function status */
1123   return HAL_OK;
1124 }
1125 
1126 /**
1127   * @brief  Start the Encoder interface.
1128   * @param  hlptim LPTIM handle
1129   * @param  Period Specifies the Autoreload value.
1130   *         This parameter must be a value between 0x0000 and 0xFFFF.
1131   * @retval HAL status
1132   */
HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1133 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1134 {
1135   uint32_t          tmpcfgr;
1136 
1137   /* Check the parameters */
1138   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1139   assert_param(IS_LPTIM_PERIOD(Period));
1140   assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1141   assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1142   assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1143 
1144   /* Set the LPTIM state */
1145   hlptim->State = HAL_LPTIM_STATE_BUSY;
1146 
1147   /* Get the LPTIMx CFGR value */
1148   tmpcfgr = hlptim->Instance->CFGR;
1149 
1150   /* Clear CKPOL bits */
1151   tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1152 
1153   /* Set Input polarity */
1154   tmpcfgr |=  hlptim->Init.UltraLowPowerClock.Polarity;
1155 
1156   /* Write to LPTIMx CFGR */
1157   hlptim->Instance->CFGR = tmpcfgr;
1158 
1159   /* Set ENC bit to enable the encoder interface */
1160   hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1161 
1162   /* Enable the Peripheral */
1163   __HAL_LPTIM_ENABLE(hlptim);
1164 
1165   /* Clear flag */
1166   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1167 
1168   /* Load the period value in the autoreload register */
1169   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1170 
1171   /* Wait for the completion of the write operation to the LPTIM_ARR register */
1172   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1173   {
1174     return HAL_TIMEOUT;
1175   }
1176 
1177   /* Start timer in continuous mode */
1178   __HAL_LPTIM_START_CONTINUOUS(hlptim);
1179 
1180   /* Change the TIM state*/
1181   hlptim->State = HAL_LPTIM_STATE_READY;
1182 
1183   /* Return function status */
1184   return HAL_OK;
1185 }
1186 
1187 /**
1188   * @brief  Stop the Encoder interface.
1189   * @param  hlptim LPTIM handle
1190   * @retval HAL status
1191   */
HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef * hlptim)1192 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
1193 {
1194   /* Check the parameters */
1195   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1196 
1197   /* Set the LPTIM state */
1198   hlptim->State = HAL_LPTIM_STATE_BUSY;
1199 
1200   /* Disable the Peripheral */
1201   __HAL_LPTIM_DISABLE(hlptim);
1202 
1203   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1204   {
1205     return HAL_TIMEOUT;
1206   }
1207 
1208   /* Reset ENC bit to disable the encoder interface */
1209   hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1210 
1211   /* Change the TIM state*/
1212   hlptim->State = HAL_LPTIM_STATE_READY;
1213 
1214   /* Return function status */
1215   return HAL_OK;
1216 }
1217 
1218 /**
1219   * @brief  Start the Encoder interface in interrupt mode.
1220   * @param  hlptim LPTIM handle
1221   * @param  Period Specifies the Autoreload value.
1222   *         This parameter must be a value between 0x0000 and 0xFFFF.
1223   * @retval HAL status
1224   */
HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1225 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1226 {
1227   uint32_t          tmpcfgr;
1228 
1229   /* Check the parameters */
1230   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1231   assert_param(IS_LPTIM_PERIOD(Period));
1232   assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1233   assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1234   assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1235 
1236   /* Set the LPTIM state */
1237   hlptim->State = HAL_LPTIM_STATE_BUSY;
1238 
1239   /* Configure edge sensitivity for encoder mode */
1240   /* Get the LPTIMx CFGR value */
1241   tmpcfgr = hlptim->Instance->CFGR;
1242 
1243   /* Clear CKPOL bits */
1244   tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1245 
1246   /* Set Input polarity */
1247   tmpcfgr |=  hlptim->Init.UltraLowPowerClock.Polarity;
1248 
1249   /* Write to LPTIMx CFGR */
1250   hlptim->Instance->CFGR = tmpcfgr;
1251 
1252   /* Set ENC bit to enable the encoder interface */
1253   hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1254 
1255   /* Enable the Peripheral */
1256   __HAL_LPTIM_ENABLE(hlptim);
1257 
1258   /* Clear flag */
1259   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1260 
1261   /* Load the period value in the autoreload register */
1262   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1263 
1264   /* Wait for the completion of the write operation to the LPTIM_ARR register */
1265   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1266   {
1267     return HAL_TIMEOUT;
1268   }
1269 
1270   /* Disable the Peripheral */
1271   __HAL_LPTIM_DISABLE(hlptim);
1272 
1273   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1274   {
1275     return HAL_TIMEOUT;
1276   }
1277 
1278   /* Enable "switch to down direction" interrupt */
1279   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1280 
1281   /* Enable "switch to up direction" interrupt */
1282   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1283 
1284   /* Enable the Peripheral */
1285   __HAL_LPTIM_ENABLE(hlptim);
1286 
1287   /* Start timer in continuous mode */
1288   __HAL_LPTIM_START_CONTINUOUS(hlptim);
1289 
1290   /* Change the TIM state*/
1291   hlptim->State = HAL_LPTIM_STATE_READY;
1292 
1293   /* Return function status */
1294   return HAL_OK;
1295 }
1296 
1297 /**
1298   * @brief  Stop the Encoder interface in interrupt mode.
1299   * @param  hlptim LPTIM handle
1300   * @retval HAL status
1301   */
HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef * hlptim)1302 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1303 {
1304   /* Check the parameters */
1305   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1306 
1307   /* Set the LPTIM state */
1308   hlptim->State = HAL_LPTIM_STATE_BUSY;
1309 
1310   /* Disable the Peripheral */
1311   __HAL_LPTIM_DISABLE(hlptim);
1312 
1313   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1314   {
1315     return HAL_TIMEOUT;
1316   }
1317 
1318   /* Reset ENC bit to disable the encoder interface */
1319   hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1320 
1321   /* Disable "switch to down direction" interrupt */
1322   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1323 
1324   /* Disable "switch to up direction" interrupt */
1325   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1326 
1327   /* Change the TIM state*/
1328   hlptim->State = HAL_LPTIM_STATE_READY;
1329 
1330   /* Return function status */
1331   return HAL_OK;
1332 }
1333 
1334 /**
1335   * @brief  Start the Timeout function.
1336   * @note   The first trigger event will start the timer, any successive
1337   *         trigger event will reset the counter and the timer restarts.
1338   * @param  hlptim LPTIM handle
1339   * @param  Period Specifies the Autoreload value.
1340   *         This parameter must be a value between 0x0000 and 0xFFFF.
1341   * @param  Timeout Specifies the TimeOut value to reset the counter.
1342   *         This parameter must be a value between 0x0000 and 0xFFFF.
1343   * @retval HAL status
1344   */
HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1345 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1346 {
1347   /* Check the parameters */
1348   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1349   assert_param(IS_LPTIM_PERIOD(Period));
1350   assert_param(IS_LPTIM_PULSE(Timeout));
1351 
1352   /* Set the LPTIM state */
1353   hlptim->State = HAL_LPTIM_STATE_BUSY;
1354 
1355   /* Set TIMOUT bit to enable the timeout function */
1356   hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1357 
1358   /* Enable the Peripheral */
1359   __HAL_LPTIM_ENABLE(hlptim);
1360 
1361   /* Clear flag */
1362   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1363 
1364   /* Load the period value in the autoreload register */
1365   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1366 
1367   /* Wait for the completion of the write operation to the LPTIM_ARR register */
1368   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1369   {
1370     return HAL_TIMEOUT;
1371   }
1372 
1373   /* Clear flag */
1374   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1375 
1376   /* Load the Timeout value in the compare register */
1377   __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1378 
1379   /* Wait for the completion of the write operation to the LPTIM_CMP register */
1380   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1381   {
1382     return HAL_TIMEOUT;
1383   }
1384 
1385   /* Start timer in continuous mode */
1386   __HAL_LPTIM_START_CONTINUOUS(hlptim);
1387 
1388   /* Change the TIM state*/
1389   hlptim->State = HAL_LPTIM_STATE_READY;
1390 
1391   /* Return function status */
1392   return HAL_OK;
1393 }
1394 
1395 /**
1396   * @brief  Stop the Timeout function.
1397   * @param  hlptim LPTIM handle
1398   * @retval HAL status
1399   */
HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef * hlptim)1400 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
1401 {
1402   /* Check the parameters */
1403   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1404 
1405   /* Set the LPTIM state */
1406   hlptim->State = HAL_LPTIM_STATE_BUSY;
1407 
1408   /* Disable the Peripheral */
1409   __HAL_LPTIM_DISABLE(hlptim);
1410 
1411   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1412   {
1413     return HAL_TIMEOUT;
1414   }
1415 
1416   /* Reset TIMOUT bit to enable the timeout function */
1417   hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1418 
1419   /* Change the TIM state*/
1420   hlptim->State = HAL_LPTIM_STATE_READY;
1421 
1422   /* Return function status */
1423   return HAL_OK;
1424 }
1425 
1426 /**
1427   * @brief  Start the Timeout function in interrupt mode.
1428   * @note   The first trigger event will start the timer, any successive
1429   *         trigger event will reset the counter and the timer restarts.
1430   * @param  hlptim LPTIM handle
1431   * @param  Period Specifies the Autoreload value.
1432   *         This parameter must be a value between 0x0000 and 0xFFFF.
1433   * @param  Timeout Specifies the TimeOut value to reset the counter.
1434   *         This parameter must be a value between 0x0000 and 0xFFFF.
1435   * @retval HAL status
1436   */
HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1437 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1438 {
1439   /* Check the parameters */
1440   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1441   assert_param(IS_LPTIM_PERIOD(Period));
1442   assert_param(IS_LPTIM_PULSE(Timeout));
1443 
1444   /* Set the LPTIM state */
1445   hlptim->State = HAL_LPTIM_STATE_BUSY;
1446 
1447   /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1448   __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
1449 
1450   /* Set TIMOUT bit to enable the timeout function */
1451   hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1452 
1453   /* Enable the Peripheral */
1454   __HAL_LPTIM_ENABLE(hlptim);
1455 
1456   /* Clear flag */
1457   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1458 
1459   /* Load the period value in the autoreload register */
1460   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1461 
1462   /* Wait for the completion of the write operation to the LPTIM_ARR register */
1463   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1464   {
1465     return HAL_TIMEOUT;
1466   }
1467 
1468   /* Clear flag */
1469   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1470 
1471   /* Load the Timeout value in the compare register */
1472   __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1473 
1474   /* Wait for the completion of the write operation to the LPTIM_CMP register */
1475   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1476   {
1477     return HAL_TIMEOUT;
1478   }
1479 
1480   /* Disable the Peripheral */
1481   __HAL_LPTIM_DISABLE(hlptim);
1482 
1483   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1484   {
1485     return HAL_TIMEOUT;
1486   }
1487 
1488   /* Enable Compare match interrupt */
1489   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1490 
1491   /* Enable the Peripheral */
1492   __HAL_LPTIM_ENABLE(hlptim);
1493 
1494   /* Start timer in continuous mode */
1495   __HAL_LPTIM_START_CONTINUOUS(hlptim);
1496 
1497   /* Change the TIM state*/
1498   hlptim->State = HAL_LPTIM_STATE_READY;
1499 
1500   /* Return function status */
1501   return HAL_OK;
1502 }
1503 
1504 /**
1505   * @brief  Stop the Timeout function in interrupt mode.
1506   * @param  hlptim LPTIM handle
1507   * @retval HAL status
1508   */
HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef * hlptim)1509 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1510 {
1511   /* Check the parameters */
1512   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1513 
1514   /* Set the LPTIM state */
1515   hlptim->State = HAL_LPTIM_STATE_BUSY;
1516 
1517   /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1518   __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
1519 
1520   /* Disable the Peripheral */
1521   __HAL_LPTIM_DISABLE(hlptim);
1522 
1523   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1524   {
1525     return HAL_TIMEOUT;
1526   }
1527 
1528   /* Reset TIMOUT bit to enable the timeout function */
1529   hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1530 
1531   /* Disable Compare match interrupt */
1532   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1533 
1534   /* Change the TIM state*/
1535   hlptim->State = HAL_LPTIM_STATE_READY;
1536 
1537   /* Return function status */
1538   return HAL_OK;
1539 }
1540 
1541 /**
1542   * @brief  Start the Counter mode.
1543   * @param  hlptim LPTIM handle
1544   * @param  Period Specifies the Autoreload value.
1545   *         This parameter must be a value between 0x0000 and 0xFFFF.
1546   * @retval HAL status
1547   */
HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1548 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1549 {
1550   /* Check the parameters */
1551   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1552   assert_param(IS_LPTIM_PERIOD(Period));
1553 
1554   /* Set the LPTIM state */
1555   hlptim->State = HAL_LPTIM_STATE_BUSY;
1556 
1557   /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1558   if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1559       && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1560   {
1561     /* Check if clock is prescaled */
1562     assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1563     /* Set clock prescaler to 0 */
1564     hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1565   }
1566 
1567   /* Enable the Peripheral */
1568   __HAL_LPTIM_ENABLE(hlptim);
1569 
1570   /* Clear flag */
1571   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1572 
1573   /* Load the period value in the autoreload register */
1574   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1575 
1576   /* Wait for the completion of the write operation to the LPTIM_ARR register */
1577   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1578   {
1579     return HAL_TIMEOUT;
1580   }
1581 
1582   /* Start timer in continuous mode */
1583   __HAL_LPTIM_START_CONTINUOUS(hlptim);
1584 
1585   /* Change the TIM state*/
1586   hlptim->State = HAL_LPTIM_STATE_READY;
1587 
1588   /* Return function status */
1589   return HAL_OK;
1590 }
1591 
1592 /**
1593   * @brief  Stop the Counter mode.
1594   * @param  hlptim LPTIM handle
1595   * @retval HAL status
1596   */
HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef * hlptim)1597 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
1598 {
1599   /* Check the parameters */
1600   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1601 
1602   /* Set the LPTIM state */
1603   hlptim->State = HAL_LPTIM_STATE_BUSY;
1604 
1605   /* Disable the Peripheral */
1606   __HAL_LPTIM_DISABLE(hlptim);
1607 
1608   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1609   {
1610     return HAL_TIMEOUT;
1611   }
1612 
1613   /* Change the TIM state*/
1614   hlptim->State = HAL_LPTIM_STATE_READY;
1615 
1616   /* Return function status */
1617   return HAL_OK;
1618 }
1619 
1620 /**
1621   * @brief  Start the Counter mode in interrupt mode.
1622   * @param  hlptim LPTIM handle
1623   * @param  Period Specifies the Autoreload value.
1624   *         This parameter must be a value between 0x0000 and 0xFFFF.
1625   * @retval HAL status
1626   */
HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1627 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1628 {
1629   /* Check the parameters */
1630   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1631   assert_param(IS_LPTIM_PERIOD(Period));
1632 
1633   /* Set the LPTIM state */
1634   hlptim->State = HAL_LPTIM_STATE_BUSY;
1635 
1636   /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1637   __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
1638 
1639   /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1640   if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1641       && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1642   {
1643     /* Check if clock is prescaled */
1644     assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1645     /* Set clock prescaler to 0 */
1646     hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1647   }
1648 
1649   /* Enable the Peripheral */
1650   __HAL_LPTIM_ENABLE(hlptim);
1651 
1652   /* Clear flag */
1653   __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1654 
1655   /* Load the period value in the autoreload register */
1656   __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1657 
1658   /* Wait for the completion of the write operation to the LPTIM_ARR register */
1659   if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1660   {
1661     return HAL_TIMEOUT;
1662   }
1663 
1664   /* Disable the Peripheral */
1665   __HAL_LPTIM_DISABLE(hlptim);
1666 
1667   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1668   {
1669     return HAL_TIMEOUT;
1670   }
1671 
1672   /* Enable Autoreload write complete interrupt */
1673   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1674 
1675   /* Enable Autoreload match interrupt */
1676   __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1677 
1678   /* Enable the Peripheral */
1679   __HAL_LPTIM_ENABLE(hlptim);
1680 
1681   /* Start timer in continuous mode */
1682   __HAL_LPTIM_START_CONTINUOUS(hlptim);
1683 
1684   /* Change the TIM state*/
1685   hlptim->State = HAL_LPTIM_STATE_READY;
1686 
1687   /* Return function status */
1688   return HAL_OK;
1689 }
1690 
1691 /**
1692   * @brief  Stop the Counter mode in interrupt mode.
1693   * @param  hlptim LPTIM handle
1694   * @retval HAL status
1695   */
HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef * hlptim)1696 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1697 {
1698   /* Check the parameters */
1699   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1700 
1701   /* Set the LPTIM state */
1702   hlptim->State = HAL_LPTIM_STATE_BUSY;
1703 
1704   /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1705   __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
1706 
1707   /* Disable the Peripheral */
1708   __HAL_LPTIM_DISABLE(hlptim);
1709 
1710   if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1711   {
1712     return HAL_TIMEOUT;
1713   }
1714 
1715   /* Disable Autoreload write complete interrupt */
1716   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1717 
1718   /* Disable Autoreload match interrupt */
1719   __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1720   /* Change the TIM state*/
1721   hlptim->State = HAL_LPTIM_STATE_READY;
1722 
1723   /* Return function status */
1724   return HAL_OK;
1725 }
1726 
1727 /**
1728   * @}
1729   */
1730 
1731 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
1732   *  @brief  Read operation functions.
1733   *
1734 @verbatim
1735   ==============================================================================
1736                   ##### LPTIM Read operation functions #####
1737   ==============================================================================
1738 [..]  This section provides LPTIM Reading functions.
1739       (+) Read the counter value.
1740       (+) Read the period (Auto-reload) value.
1741       (+) Read the pulse (Compare)value.
1742 @endverbatim
1743   * @{
1744   */
1745 
1746 /**
1747   * @brief  Return the current counter value.
1748   * @param  hlptim LPTIM handle
1749   * @retval Counter value.
1750   */
HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef * hlptim)1751 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
1752 {
1753   /* Check the parameters */
1754   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1755 
1756   return (hlptim->Instance->CNT);
1757 }
1758 
1759 /**
1760   * @brief  Return the current Autoreload (Period) value.
1761   * @param  hlptim LPTIM handle
1762   * @retval Autoreload value.
1763   */
HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef * hlptim)1764 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
1765 {
1766   /* Check the parameters */
1767   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1768 
1769   return (hlptim->Instance->ARR);
1770 }
1771 
1772 /**
1773   * @brief  Return the current Compare (Pulse) value.
1774   * @param  hlptim LPTIM handle
1775   * @retval Compare value.
1776   */
HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef * hlptim)1777 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
1778 {
1779   /* Check the parameters */
1780   assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1781 
1782   return (hlptim->Instance->CMP);
1783 }
1784 
1785 /**
1786   * @}
1787   */
1788 
1789 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
1790   *  @brief  LPTIM  IRQ handler.
1791   *
1792 @verbatim
1793   ==============================================================================
1794                       ##### LPTIM IRQ handler and callbacks  #####
1795   ==============================================================================
1796 [..]  This section provides LPTIM IRQ handler and callback functions called within
1797       the IRQ handler:
1798    (+) LPTIM interrupt request handler
1799    (+) Compare match Callback
1800    (+) Auto-reload match Callback
1801    (+) External trigger event detection Callback
1802    (+) Compare register write complete Callback
1803    (+) Auto-reload register write complete Callback
1804    (+) Up-counting direction change Callback
1805    (+) Down-counting direction change Callback
1806 
1807 @endverbatim
1808   * @{
1809   */
1810 
1811 /**
1812   * @brief  Handle LPTIM interrupt request.
1813   * @param  hlptim LPTIM handle
1814   * @retval None
1815   */
HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef * hlptim)1816 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
1817 {
1818   /* Compare match interrupt */
1819   if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1820   {
1821     if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1822     {
1823       /* Clear Compare match flag */
1824       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1825 
1826       /* Compare match Callback */
1827 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1828       hlptim->CompareMatchCallback(hlptim);
1829 #else
1830       HAL_LPTIM_CompareMatchCallback(hlptim);
1831 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1832     }
1833   }
1834 
1835   /* Autoreload match interrupt */
1836   if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1837   {
1838     if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1839     {
1840       /* Clear Autoreload match flag */
1841       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1842 
1843       /* Autoreload match Callback */
1844 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1845       hlptim->AutoReloadMatchCallback(hlptim);
1846 #else
1847       HAL_LPTIM_AutoReloadMatchCallback(hlptim);
1848 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1849     }
1850   }
1851 
1852   /* Trigger detected interrupt */
1853   if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1854   {
1855     if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1856     {
1857       /* Clear Trigger detected flag */
1858       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1859 
1860       /* Trigger detected callback */
1861 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1862       hlptim->TriggerCallback(hlptim);
1863 #else
1864       HAL_LPTIM_TriggerCallback(hlptim);
1865 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1866     }
1867   }
1868 
1869   /* Compare write interrupt */
1870   if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1871   {
1872     if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1873     {
1874       /* Clear Compare write flag */
1875       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1876 
1877       /* Compare write Callback */
1878 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1879       hlptim->CompareWriteCallback(hlptim);
1880 #else
1881       HAL_LPTIM_CompareWriteCallback(hlptim);
1882 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1883     }
1884   }
1885 
1886   /* Autoreload write interrupt */
1887   if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1888   {
1889     if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1890     {
1891       /* Clear Autoreload write flag */
1892       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1893 
1894       /* Autoreload write Callback */
1895 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1896       hlptim->AutoReloadWriteCallback(hlptim);
1897 #else
1898       HAL_LPTIM_AutoReloadWriteCallback(hlptim);
1899 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1900     }
1901   }
1902 
1903   /* Direction counter changed from Down to Up interrupt */
1904   if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
1905   {
1906     if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
1907     {
1908       /* Clear Direction counter changed from Down to Up flag */
1909       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
1910 
1911       /* Direction counter changed from Down to Up Callback */
1912 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1913       hlptim->DirectionUpCallback(hlptim);
1914 #else
1915       HAL_LPTIM_DirectionUpCallback(hlptim);
1916 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1917     }
1918   }
1919 
1920   /* Direction counter changed from Up to Down interrupt */
1921   if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
1922   {
1923     if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
1924     {
1925       /* Clear Direction counter changed from Up to Down flag */
1926       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
1927 
1928       /* Direction counter changed from Up to Down Callback */
1929 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1930       hlptim->DirectionDownCallback(hlptim);
1931 #else
1932       HAL_LPTIM_DirectionDownCallback(hlptim);
1933 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1934     }
1935   }
1936 }
1937 
1938 /**
1939   * @brief  Compare match callback in non-blocking mode.
1940   * @param  hlptim LPTIM handle
1941   * @retval None
1942   */
HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef * hlptim)1943 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
1944 {
1945   /* Prevent unused argument(s) compilation warning */
1946   UNUSED(hlptim);
1947 
1948   /* NOTE : This function should not be modified, when the callback is needed,
1949             the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
1950    */
1951 }
1952 
1953 /**
1954   * @brief  Autoreload match callback in non-blocking mode.
1955   * @param  hlptim LPTIM handle
1956   * @retval None
1957   */
HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef * hlptim)1958 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
1959 {
1960   /* Prevent unused argument(s) compilation warning */
1961   UNUSED(hlptim);
1962 
1963   /* NOTE : This function should not be modified, when the callback is needed,
1964             the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
1965    */
1966 }
1967 
1968 /**
1969   * @brief  Trigger detected callback in non-blocking mode.
1970   * @param  hlptim LPTIM handle
1971   * @retval None
1972   */
HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef * hlptim)1973 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
1974 {
1975   /* Prevent unused argument(s) compilation warning */
1976   UNUSED(hlptim);
1977 
1978   /* NOTE : This function should not be modified, when the callback is needed,
1979             the HAL_LPTIM_TriggerCallback could be implemented in the user file
1980    */
1981 }
1982 
1983 /**
1984   * @brief  Compare write callback in non-blocking mode.
1985   * @param  hlptim LPTIM handle
1986   * @retval None
1987   */
HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef * hlptim)1988 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
1989 {
1990   /* Prevent unused argument(s) compilation warning */
1991   UNUSED(hlptim);
1992 
1993   /* NOTE : This function should not be modified, when the callback is needed,
1994             the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
1995    */
1996 }
1997 
1998 /**
1999   * @brief  Autoreload write callback in non-blocking mode.
2000   * @param  hlptim LPTIM handle
2001   * @retval None
2002   */
HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef * hlptim)2003 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
2004 {
2005   /* Prevent unused argument(s) compilation warning */
2006   UNUSED(hlptim);
2007 
2008   /* NOTE : This function should not be modified, when the callback is needed,
2009             the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
2010    */
2011 }
2012 
2013 /**
2014   * @brief  Direction counter changed from Down to Up callback in non-blocking mode.
2015   * @param  hlptim LPTIM handle
2016   * @retval None
2017   */
HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef * hlptim)2018 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
2019 {
2020   /* Prevent unused argument(s) compilation warning */
2021   UNUSED(hlptim);
2022 
2023   /* NOTE : This function should not be modified, when the callback is needed,
2024             the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
2025    */
2026 }
2027 
2028 /**
2029   * @brief  Direction counter changed from Up to Down callback in non-blocking mode.
2030   * @param  hlptim LPTIM handle
2031   * @retval None
2032   */
HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef * hlptim)2033 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
2034 {
2035   /* Prevent unused argument(s) compilation warning */
2036   UNUSED(hlptim);
2037 
2038   /* NOTE : This function should not be modified, when the callback is needed,
2039             the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
2040    */
2041 }
2042 
2043 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2044 /**
2045   * @brief  Register a User LPTIM callback to be used instead of the weak predefined callback
2046   * @param hlptim LPTIM handle
2047   * @param CallbackID ID of the callback to be registered
2048   *        This parameter can be one of the following values:
2049   *          @arg @ref HAL_LPTIM_MSPINIT_CB_ID          LPTIM Base Msp Init Callback ID
2050   *          @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID        LPTIM Base Msp DeInit Callback ID
2051   *          @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID    Compare match Callback ID
2052   *          @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2053   *          @arg @ref HAL_LPTIM_TRIGGER_CB_ID          External trigger event detection Callback ID
2054   *          @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID    Compare register write complete Callback ID
2055   *          @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2056   *          @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID     Up-counting direction change Callback ID
2057   *          @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID   Down-counting direction change Callback ID
2058   * @param pCallback pointer to the callback function
2059   * @retval status
2060   */
HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID,pLPTIM_CallbackTypeDef pCallback)2061 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef        *hlptim,
2062                                              HAL_LPTIM_CallbackIDTypeDef CallbackID,
2063                                              pLPTIM_CallbackTypeDef      pCallback)
2064 {
2065   HAL_StatusTypeDef status = HAL_OK;
2066 
2067   if (pCallback == NULL)
2068   {
2069     return HAL_ERROR;
2070   }
2071 
2072   /* Process locked */
2073   __HAL_LOCK(hlptim);
2074 
2075   if (hlptim->State == HAL_LPTIM_STATE_READY)
2076   {
2077     switch (CallbackID)
2078     {
2079       case HAL_LPTIM_MSPINIT_CB_ID :
2080         hlptim->MspInitCallback = pCallback;
2081         break;
2082 
2083       case HAL_LPTIM_MSPDEINIT_CB_ID :
2084         hlptim->MspDeInitCallback = pCallback;
2085         break;
2086 
2087       case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2088         hlptim->CompareMatchCallback = pCallback;
2089         break;
2090 
2091       case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2092         hlptim->AutoReloadMatchCallback = pCallback;
2093         break;
2094 
2095       case HAL_LPTIM_TRIGGER_CB_ID :
2096         hlptim->TriggerCallback = pCallback;
2097         break;
2098 
2099       case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2100         hlptim->CompareWriteCallback = pCallback;
2101         break;
2102 
2103       case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2104         hlptim->AutoReloadWriteCallback = pCallback;
2105         break;
2106 
2107       case HAL_LPTIM_DIRECTION_UP_CB_ID :
2108         hlptim->DirectionUpCallback = pCallback;
2109         break;
2110 
2111       case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2112         hlptim->DirectionDownCallback = pCallback;
2113         break;
2114 
2115       default :
2116         /* Return error status */
2117         status =  HAL_ERROR;
2118         break;
2119     }
2120   }
2121   else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2122   {
2123     switch (CallbackID)
2124     {
2125       case HAL_LPTIM_MSPINIT_CB_ID :
2126         hlptim->MspInitCallback = pCallback;
2127         break;
2128 
2129       case HAL_LPTIM_MSPDEINIT_CB_ID :
2130         hlptim->MspDeInitCallback = pCallback;
2131         break;
2132 
2133       default :
2134         /* Return error status */
2135         status =  HAL_ERROR;
2136         break;
2137     }
2138   }
2139   else
2140   {
2141     /* Return error status */
2142     status =  HAL_ERROR;
2143   }
2144 
2145   /* Release Lock */
2146   __HAL_UNLOCK(hlptim);
2147 
2148   return status;
2149 }
2150 
2151 /**
2152   * @brief  Unregister a LPTIM callback
2153   *         LLPTIM callback is redirected to the weak predefined callback
2154   * @param hlptim LPTIM handle
2155   * @param CallbackID ID of the callback to be unregistered
2156   *        This parameter can be one of the following values:
2157   *          @arg @ref HAL_LPTIM_MSPINIT_CB_ID          LPTIM Base Msp Init Callback ID
2158   *          @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID        LPTIM Base Msp DeInit Callback ID
2159   *          @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID    Compare match Callback ID
2160   *          @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2161   *          @arg @ref HAL_LPTIM_TRIGGER_CB_ID          External trigger event detection Callback ID
2162   *          @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID    Compare register write complete Callback ID
2163   *          @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2164   *          @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID     Up-counting direction change Callback ID
2165   *          @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID   Down-counting direction change Callback ID
2166   * @retval status
2167   */
HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID)2168 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef        *hlptim,
2169                                                HAL_LPTIM_CallbackIDTypeDef CallbackID)
2170 {
2171   HAL_StatusTypeDef status = HAL_OK;
2172 
2173   /* Process locked */
2174   __HAL_LOCK(hlptim);
2175 
2176   if (hlptim->State == HAL_LPTIM_STATE_READY)
2177   {
2178     switch (CallbackID)
2179     {
2180       case HAL_LPTIM_MSPINIT_CB_ID :
2181         /* Legacy weak MspInit Callback */
2182         hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2183         break;
2184 
2185       case HAL_LPTIM_MSPDEINIT_CB_ID :
2186         /* Legacy weak Msp DeInit Callback */
2187         hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2188         break;
2189 
2190       case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2191         /* Legacy weak Compare match Callback */
2192         hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2193         break;
2194 
2195       case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2196         /* Legacy weak Auto-reload match Callback */
2197         hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2198         break;
2199 
2200       case HAL_LPTIM_TRIGGER_CB_ID :
2201         /* Legacy weak External trigger event detection Callback */
2202         hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2203         break;
2204 
2205       case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2206         /* Legacy weak Compare register write complete Callback */
2207         hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2208         break;
2209 
2210       case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2211         /* Legacy weak Auto-reload register write complete Callback */
2212         hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2213         break;
2214 
2215       case HAL_LPTIM_DIRECTION_UP_CB_ID :
2216         /* Legacy weak Up-counting direction change Callback */
2217         hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2218         break;
2219 
2220       case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2221         /* Legacy weak Down-counting direction change Callback */
2222         hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2223         break;
2224 
2225       default :
2226         /* Return error status */
2227         status =  HAL_ERROR;
2228         break;
2229     }
2230   }
2231   else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2232   {
2233     switch (CallbackID)
2234     {
2235       case HAL_LPTIM_MSPINIT_CB_ID :
2236         /* Legacy weak MspInit Callback */
2237         hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2238         break;
2239 
2240       case HAL_LPTIM_MSPDEINIT_CB_ID :
2241         /* Legacy weak Msp DeInit Callback */
2242         hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2243         break;
2244 
2245       default :
2246         /* Return error status */
2247         status =  HAL_ERROR;
2248         break;
2249     }
2250   }
2251   else
2252   {
2253     /* Return error status */
2254     status =  HAL_ERROR;
2255   }
2256 
2257   /* Release Lock */
2258   __HAL_UNLOCK(hlptim);
2259 
2260   return status;
2261 }
2262 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2263 
2264 /**
2265   * @}
2266   */
2267 
2268 /** @defgroup LPTIM_Group5 Peripheral State functions
2269   *  @brief   Peripheral State functions.
2270   *
2271 @verbatim
2272   ==============================================================================
2273                       ##### Peripheral State functions #####
2274   ==============================================================================
2275     [..]
2276     This subsection permits to get in run-time the status of the peripheral.
2277 
2278 @endverbatim
2279   * @{
2280   */
2281 
2282 /**
2283   * @brief  Return the LPTIM handle state.
2284   * @param  hlptim LPTIM handle
2285   * @retval HAL state
2286   */
HAL_LPTIM_GetState(LPTIM_HandleTypeDef * hlptim)2287 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
2288 {
2289   /* Return LPTIM handle state */
2290   return hlptim->State;
2291 }
2292 
2293 /**
2294   * @}
2295   */
2296 
2297 
2298 /**
2299   * @}
2300   */
2301 
2302 /* Private functions ---------------------------------------------------------*/
2303 
2304 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
2305   * @{
2306   */
2307 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2308 /**
2309   * @brief  Reset interrupt callbacks to the legacy weak callbacks.
2310   * @param  lptim pointer to a LPTIM_HandleTypeDef structure that contains
2311   *                the configuration information for LPTIM module.
2312   * @retval None
2313   */
LPTIM_ResetCallback(LPTIM_HandleTypeDef * lptim)2314 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
2315 {
2316   /* Reset the LPTIM callback to the legacy weak callbacks */
2317   lptim->CompareMatchCallback    = HAL_LPTIM_CompareMatchCallback;
2318   lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2319   lptim->TriggerCallback         = HAL_LPTIM_TriggerCallback;
2320   lptim->CompareWriteCallback    = HAL_LPTIM_CompareWriteCallback;
2321   lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2322   lptim->DirectionUpCallback     = HAL_LPTIM_DirectionUpCallback;
2323   lptim->DirectionDownCallback   = HAL_LPTIM_DirectionDownCallback;
2324 }
2325 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2326 
2327 /**
2328   * @brief  LPTimer Wait for flag set
2329   * @param  hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2330   *                the configuration information for LPTIM module.
2331   * @param  flag   The lptim flag
2332   * @retval HAL status
2333   */
LPTIM_WaitForFlag(LPTIM_HandleTypeDef * hlptim,uint32_t flag)2334 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag)
2335 {
2336   HAL_StatusTypeDef result = HAL_OK;
2337   uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
2338   do
2339   {
2340     count--;
2341     if (count == 0UL)
2342     {
2343       result = HAL_TIMEOUT;
2344     }
2345   } while ((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
2346 
2347   return result;
2348 }
2349 
2350 /**
2351   * @brief  Disable LPTIM HW instance.
2352   * @param  hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2353   *                the configuration information for LPTIM module.
2354   * @note   The following sequence is required to solve LPTIM disable HW limitation.
2355   *         Please check Errata Sheet ES0335 for more details under "MCU may remain
2356   *         stuck in LPTIM interrupt when entering Stop mode" section.
2357   * @retval None
2358   */
LPTIM_Disable(LPTIM_HandleTypeDef * hlptim)2359 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
2360 {
2361   uint32_t tmpclksource = 0;
2362   uint32_t tmpIER;
2363   uint32_t tmpCFGR;
2364   uint32_t tmpCMP;
2365   uint32_t tmpARR;
2366   uint32_t primask_bit;
2367   uint32_t tmpOR;
2368 
2369   /* Enter critical section */
2370   primask_bit = __get_PRIMASK();
2371   __set_PRIMASK(1) ;
2372 
2373   /*********** Save LPTIM Config ***********/
2374   /* Save LPTIM source clock */
2375   switch ((uint32_t)hlptim->Instance)
2376   {
2377     case LPTIM1_BASE:
2378       tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2379       break;
2380     default:
2381       break;
2382   }
2383 
2384   /* Save LPTIM configuration registers */
2385   tmpIER = hlptim->Instance->IER;
2386   tmpCFGR = hlptim->Instance->CFGR;
2387   tmpCMP = hlptim->Instance->CMP;
2388   tmpARR = hlptim->Instance->ARR;
2389   tmpOR = hlptim->Instance->OR;
2390 
2391   /*********** Reset LPTIM ***********/
2392   switch ((uint32_t)hlptim->Instance)
2393   {
2394     case LPTIM1_BASE:
2395       __HAL_RCC_LPTIM1_FORCE_RESET();
2396       __HAL_RCC_LPTIM1_RELEASE_RESET();
2397       break;
2398     default:
2399       break;
2400   }
2401 
2402   /*********** Restore LPTIM Config ***********/
2403   if ((tmpCMP != 0UL) || (tmpARR != 0UL))
2404   {
2405     /* Force LPTIM source kernel clock from APB */
2406     switch ((uint32_t)hlptim->Instance)
2407     {
2408       case LPTIM1_BASE:
2409         __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1);
2410         break;
2411       default:
2412         break;
2413     }
2414 
2415     if (tmpCMP != 0UL)
2416     {
2417       /* Restore CMP register (LPTIM should be enabled first) */
2418       hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2419       hlptim->Instance->CMP = tmpCMP;
2420 
2421       /* Wait for the completion of the write operation to the LPTIM_CMP register */
2422       if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
2423       {
2424         hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2425       }
2426       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
2427     }
2428 
2429     if (tmpARR != 0UL)
2430     {
2431       /* Restore ARR register (LPTIM should be enabled first) */
2432       hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2433       hlptim->Instance->ARR = tmpARR;
2434 
2435       /* Wait for the completion of the write operation to the LPTIM_ARR register */
2436       if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
2437       {
2438         hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2439       }
2440 
2441       __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
2442     }
2443 
2444     /* Restore LPTIM source kernel clock */
2445     switch ((uint32_t)hlptim->Instance)
2446     {
2447       case LPTIM1_BASE:
2448         __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2449         break;
2450       default:
2451         break;
2452     }
2453   }
2454 
2455   /* Restore configuration registers (LPTIM should be disabled first) */
2456   hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2457   hlptim->Instance->IER = tmpIER;
2458   hlptim->Instance->CFGR = tmpCFGR;
2459   hlptim->Instance->OR = tmpOR;
2460 
2461   /* Exit critical section: restore previous priority mask */
2462   __set_PRIMASK(primask_bit);
2463 }
2464 /**
2465   * @}
2466   */
2467 
2468 
2469 #endif /* HAL_LPTIM_MODULE_ENABLED */
2470 /**
2471   * @}
2472   */
2473 
2474 /**
2475   * @}
2476   */
2477