1 /**************************************************************************//** 2 * @file gpio.h 3 * @version V1.00 4 * @brief M2L31 series GPIO driver header file 5 * 6 * SPDX-License-Identifier: Apache-2.0 7 * @copyright (C) 2023 Nuvoton Technology Corp. All rights reserved. 8 ******************************************************************************/ 9 #ifndef __GPIO_H__ 10 #define __GPIO_H__ 11 12 #ifdef __cplusplus 13 extern "C" 14 { 15 #endif 16 17 18 /** @addtogroup Standard_Driver Standard Driver 19 @{ 20 */ 21 22 /** @addtogroup GPIO_Driver GPIO Driver 23 @{ 24 */ 25 26 /** @addtogroup GPIO_EXPORTED_CONSTANTS GPIO Exported Constants 27 @{ 28 */ 29 30 #define GPIO_PIN_MAX 16UL /*!< Specify Maximum Pins of Each GPIO Port */ 31 32 /*---------------------------------------------------------------------------------------------------------*/ 33 /* GPIO_MODE Constant Definitions */ 34 /*---------------------------------------------------------------------------------------------------------*/ 35 #define GPIO_MODE_INPUT 0x0UL /*!< Input Mode \hideinitializer */ 36 #define GPIO_MODE_OUTPUT 0x1UL /*!< Output Mode \hideinitializer */ 37 #define GPIO_MODE_OPEN_DRAIN 0x2UL /*!< Open-Drain Mode \hideinitializer */ 38 #define GPIO_MODE_QUASI 0x3UL /*!< Quasi-bidirectional Mode \hideinitializer */ 39 40 /*---------------------------------------------------------------------------------------------------------*/ 41 /* GPIO Interrupt Type Constant Definitions */ 42 /*---------------------------------------------------------------------------------------------------------*/ 43 #define GPIO_INT_RISING 0x00010000UL /*!< Interrupt enable by Input Rising Edge \hideinitializer */ 44 #define GPIO_INT_FALLING 0x00000001UL /*!< Interrupt enable by Input Falling Edge \hideinitializer */ 45 #define GPIO_INT_BOTH_EDGE 0x00010001UL /*!< Interrupt enable by both Rising Edge and Falling Edge \hideinitializer */ 46 #define GPIO_INT_HIGH 0x01010000UL /*!< Interrupt enable by Level-High \hideinitializer */ 47 #define GPIO_INT_LOW 0x01000001UL /*!< Interrupt enable by Level-Level \hideinitializer */ 48 49 /*---------------------------------------------------------------------------------------------------------*/ 50 /* GPIO_INTTYPE Constant Definitions */ 51 /*---------------------------------------------------------------------------------------------------------*/ 52 #define GPIO_INTTYPE_EDGE 0UL /*!< GPIO_INTTYPE Setting for Edge Trigger Mode \hideinitializer */ 53 #define GPIO_INTTYPE_LEVEL 1UL /*!< GPIO_INTTYPE Setting for Edge Level Mode \hideinitializer */ 54 55 /*---------------------------------------------------------------------------------------------------------*/ 56 /* GPIO Slew Rate Type Constant Definitions */ 57 /*---------------------------------------------------------------------------------------------------------*/ 58 #define GPIO_SLEWCTL_NORMAL 0x0UL /*!< GPIO slew setting for normal Mode \hideinitializer */ 59 #define GPIO_SLEWCTL_HIGH 0x1UL /*!< GPIO slew setting for high Mode \hideinitializer */ 60 61 /*---------------------------------------------------------------------------------------------------------*/ 62 /* GPIO Pull-up And Pull-down Type Constant Definitions */ 63 /*---------------------------------------------------------------------------------------------------------*/ 64 #define GPIO_PUSEL_DISABLE 0x0UL /*!< GPIO PUSEL setting for Disable Mode \hideinitializer */ 65 #define GPIO_PUSEL_PULL_UP 0x1UL /*!< GPIO PUSEL setting for Pull-up Mode \hideinitializer */ 66 #define GPIO_PUSEL_PULL_DOWN 0x2UL /*!< GPIO PUSEL setting for Pull-down Mode \hideinitializer */ 67 68 /*---------------------------------------------------------------------------------------------------------*/ 69 /* GPIO_DBCTL Constant Definitions */ 70 /*---------------------------------------------------------------------------------------------------------*/ 71 #define GPIO_DBCTL_ICLK_ON 0x00000020UL /*!< GPIO_DBCTL setting for all IO pins edge detection circuit is always active after reset \hideinitializer */ 72 #define GPIO_DBCTL_ICLK_OFF 0x00000000UL /*!< GPIO_DBCTL setting for edge detection circuit is active only if IO pin corresponding GPIOx_IEN bit is set to 1 \hideinitializer */ 73 74 #define GPIO_DBCTL_DBCLKSRC_LIRC (0x1UL<<GPIO_DBCTL_DBCLKSRC_Pos) /*!< GPIO_DBCTL setting for de-bounce counter clock source is the LIRC \hideinitializer */ 75 #define GPIO_DBCTL_DBCLKSRC_HCLK (0x0UL<<GPIO_DBCTL_DBCLKSRC_Pos) /*!< GPIO_DBCTL setting for de-bounce counter clock source is the HCLK \hideinitializer */ 76 77 #define GPIO_DBCTL_DBCLKSEL_1 (0x0UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 1 clocks \hideinitializer */ 78 #define GPIO_DBCTL_DBCLKSEL_2 (0x1UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 2 clocks \hideinitializer */ 79 #define GPIO_DBCTL_DBCLKSEL_4 (0x2UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 4 clocks \hideinitializer */ 80 #define GPIO_DBCTL_DBCLKSEL_8 (0x3UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 8 clocks \hideinitializer */ 81 #define GPIO_DBCTL_DBCLKSEL_16 (0x4UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 16 clocks \hideinitializer */ 82 #define GPIO_DBCTL_DBCLKSEL_32 (0x5UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 32 clocks \hideinitializer */ 83 #define GPIO_DBCTL_DBCLKSEL_64 (0x6UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 64 clocks \hideinitializer */ 84 #define GPIO_DBCTL_DBCLKSEL_128 (0x7UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 128 clocks \hideinitializer */ 85 #define GPIO_DBCTL_DBCLKSEL_256 (0x8UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 256 clocks \hideinitializer */ 86 #define GPIO_DBCTL_DBCLKSEL_512 (0x9UL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 512 clocks \hideinitializer */ 87 #define GPIO_DBCTL_DBCLKSEL_1024 (0xAUL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 1024 clocks \hideinitializer */ 88 #define GPIO_DBCTL_DBCLKSEL_2048 (0xBUL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 2048 clocks \hideinitializer */ 89 #define GPIO_DBCTL_DBCLKSEL_4096 (0xCUL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 4096 clocks \hideinitializer */ 90 #define GPIO_DBCTL_DBCLKSEL_8192 (0xDUL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 8192 clocks \hideinitializer */ 91 #define GPIO_DBCTL_DBCLKSEL_16384 (0xEUL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 16384 clocks \hideinitializer */ 92 #define GPIO_DBCTL_DBCLKSEL_32768 (0xFUL<<GPIO_DBCTL_DBCLKSEL_Pos) /*!< GPIO_DBCTL setting for sampling cycle = 32768 clocks \hideinitializer */ 93 94 /*---------------------------------------------------------------------------------------------------------*/ 95 /* GPIO EINT Edge Detect Control Type Constant Definitions */ 96 /*---------------------------------------------------------------------------------------------------------*/ 97 #define GPIO_INT_EDETCTL_DISABLE 0x0UL /*!< GPIO INT_EDETCTL setting for No edge detect \hideinitializer */ 98 #define GPIO_INT_EDETCTL_RISING 0x1UL /*!< GPIO INT_EDETCTL setting for Rising edge detect \hideinitializer */ 99 #define GPIO_INT_EDETCTL_FALLING 0x2UL /*!< GPIO INT_EDETCTL setting for Falling edge detect \hideinitializer */ 100 #define GPIO_INT_EDETCTL_BOTH_EDGE 0x3UL /*!< GPIO INT_EDETCTL setting for Both edge detect \hideinitializer */ 101 102 103 /* Define GPIO Pin Data Input/Output. It could be used to control each I/O pin by pin address mapping. 104 Example 1: 105 106 PA0 = 1; 107 108 It is used to set GPIO PA.0 to high; 109 110 Example 2: 111 112 if (PA0) 113 PA0 = 0; 114 115 If GPIO PA.0 pin status is high, then set GPIO PA.0 data output to low. 116 */ 117 #define GPIO_PIN_DATA(port, pin) (*((volatile uint32_t *)((GPIO_PIN_DATA_BASE+(0x40*(port))) + ((pin)<<2)))) /*!< Pin Data Input/Output \hideinitializer */ 118 #define PA0 GPIO_PIN_DATA(0, 0 ) /*!< Specify PA.0 Pin Data Input/Output \hideinitializer */ 119 #define PA1 GPIO_PIN_DATA(0, 1 ) /*!< Specify PA.1 Pin Data Input/Output \hideinitializer */ 120 #define PA2 GPIO_PIN_DATA(0, 2 ) /*!< Specify PA.2 Pin Data Input/Output \hideinitializer */ 121 #define PA3 GPIO_PIN_DATA(0, 3 ) /*!< Specify PA.3 Pin Data Input/Output \hideinitializer */ 122 #define PA4 GPIO_PIN_DATA(0, 4 ) /*!< Specify PA.4 Pin Data Input/Output \hideinitializer */ 123 #define PA5 GPIO_PIN_DATA(0, 5 ) /*!< Specify PA.5 Pin Data Input/Output \hideinitializer */ 124 #define PA6 GPIO_PIN_DATA(0, 6 ) /*!< Specify PA.6 Pin Data Input/Output \hideinitializer */ 125 #define PA7 GPIO_PIN_DATA(0, 7 ) /*!< Specify PA.7 Pin Data Input/Output \hideinitializer */ 126 #define PA8 GPIO_PIN_DATA(0, 8 ) /*!< Specify PA.8 Pin Data Input/Output \hideinitializer */ 127 #define PA9 GPIO_PIN_DATA(0, 9 ) /*!< Specify PA.9 Pin Data Input/Output \hideinitializer */ 128 #define PA10 GPIO_PIN_DATA(0, 10) /*!< Specify PA.10 Pin Data Input/Output \hideinitializer */ 129 #define PA11 GPIO_PIN_DATA(0, 11) /*!< Specify PA.11 Pin Data Input/Output \hideinitializer */ 130 #define PA12 GPIO_PIN_DATA(0, 12) /*!< Specify PA.12 Pin Data Input/Output \hideinitializer */ 131 #define PA13 GPIO_PIN_DATA(0, 13) /*!< Specify PA.13 Pin Data Input/Output \hideinitializer */ 132 #define PA14 GPIO_PIN_DATA(0, 14) /*!< Specify PA.14 Pin Data Input/Output \hideinitializer */ 133 #define PA15 GPIO_PIN_DATA(0, 15) /*!< Specify PA.15 Pin Data Input/Output \hideinitializer */ 134 #define PB0 GPIO_PIN_DATA(1, 0 ) /*!< Specify PB.0 Pin Data Input/Output \hideinitializer */ 135 #define PB1 GPIO_PIN_DATA(1, 1 ) /*!< Specify PB.1 Pin Data Input/Output \hideinitializer */ 136 #define PB2 GPIO_PIN_DATA(1, 2 ) /*!< Specify PB.2 Pin Data Input/Output \hideinitializer */ 137 #define PB3 GPIO_PIN_DATA(1, 3 ) /*!< Specify PB.3 Pin Data Input/Output \hideinitializer */ 138 #define PB4 GPIO_PIN_DATA(1, 4 ) /*!< Specify PB.4 Pin Data Input/Output \hideinitializer */ 139 #define PB5 GPIO_PIN_DATA(1, 5 ) /*!< Specify PB.5 Pin Data Input/Output \hideinitializer */ 140 #define PB6 GPIO_PIN_DATA(1, 6 ) /*!< Specify PB.6 Pin Data Input/Output \hideinitializer */ 141 #define PB7 GPIO_PIN_DATA(1, 7 ) /*!< Specify PB.7 Pin Data Input/Output \hideinitializer */ 142 #define PB8 GPIO_PIN_DATA(1, 8 ) /*!< Specify PB.8 Pin Data Input/Output \hideinitializer */ 143 #define PB9 GPIO_PIN_DATA(1, 9 ) /*!< Specify PB.9 Pin Data Input/Output \hideinitializer */ 144 #define PB10 GPIO_PIN_DATA(1, 10) /*!< Specify PB.10 Pin Data Input/Output \hideinitializer */ 145 #define PB11 GPIO_PIN_DATA(1, 11) /*!< Specify PB.11 Pin Data Input/Output \hideinitializer */ 146 #define PB12 GPIO_PIN_DATA(1, 12) /*!< Specify PB.12 Pin Data Input/Output \hideinitializer */ 147 #define PB13 GPIO_PIN_DATA(1, 13) /*!< Specify PB.13 Pin Data Input/Output \hideinitializer */ 148 #define PB14 GPIO_PIN_DATA(1, 14) /*!< Specify PB.14 Pin Data Input/Output \hideinitializer */ 149 #define PB15 GPIO_PIN_DATA(1, 15) /*!< Specify PB.15 Pin Data Input/Output \hideinitializer */ 150 #define PC0 GPIO_PIN_DATA(2, 0 ) /*!< Specify PC.0 Pin Data Input/Output \hideinitializer */ 151 #define PC1 GPIO_PIN_DATA(2, 1 ) /*!< Specify PC.1 Pin Data Input/Output \hideinitializer */ 152 #define PC2 GPIO_PIN_DATA(2, 2 ) /*!< Specify PC.2 Pin Data Input/Output \hideinitializer */ 153 #define PC3 GPIO_PIN_DATA(2, 3 ) /*!< Specify PC.3 Pin Data Input/Output \hideinitializer */ 154 #define PC4 GPIO_PIN_DATA(2, 4 ) /*!< Specify PC.4 Pin Data Input/Output \hideinitializer */ 155 #define PC5 GPIO_PIN_DATA(2, 5 ) /*!< Specify PC.5 Pin Data Input/Output \hideinitializer */ 156 #define PC6 GPIO_PIN_DATA(2, 6 ) /*!< Specify PC.6 Pin Data Input/Output \hideinitializer */ 157 #define PC7 GPIO_PIN_DATA(2, 7 ) /*!< Specify PC.7 Pin Data Input/Output \hideinitializer */ 158 #define PC8 GPIO_PIN_DATA(2, 8 ) /*!< Specify PC.8 Pin Data Input/Output \hideinitializer */ 159 #define PC9 GPIO_PIN_DATA(2, 9 ) /*!< Specify PC.9 Pin Data Input/Output \hideinitializer */ 160 #define PC10 GPIO_PIN_DATA(2, 10) /*!< Specify PC.10 Pin Data Input/Output \hideinitializer */ 161 #define PC11 GPIO_PIN_DATA(2, 11) /*!< Specify PC.11 Pin Data Input/Output \hideinitializer */ 162 #define PC12 GPIO_PIN_DATA(2, 12) /*!< Specify PC.12 Pin Data Input/Output \hideinitializer */ 163 #define PC13 GPIO_PIN_DATA(2, 13) /*!< Specify PC.13 Pin Data Input/Output \hideinitializer */ 164 #define PC14 GPIO_PIN_DATA(2, 14) /*!< Specify PC.14 Pin Data Input/Output \hideinitializer */ 165 #define PD0 GPIO_PIN_DATA(3, 0 ) /*!< Specify PD.0 Pin Data Input/Output \hideinitializer */ 166 #define PD1 GPIO_PIN_DATA(3, 1 ) /*!< Specify PD.1 Pin Data Input/Output \hideinitializer */ 167 #define PD2 GPIO_PIN_DATA(3, 2 ) /*!< Specify PD.2 Pin Data Input/Output \hideinitializer */ 168 #define PD3 GPIO_PIN_DATA(3, 3 ) /*!< Specify PD.3 Pin Data Input/Output \hideinitializer */ 169 #define PD4 GPIO_PIN_DATA(3, 4 ) /*!< Specify PD.4 Pin Data Input/Output \hideinitializer */ 170 #define PD5 GPIO_PIN_DATA(3, 5 ) /*!< Specify PD.5 Pin Data Input/Output \hideinitializer */ 171 #define PD6 GPIO_PIN_DATA(3, 6 ) /*!< Specify PD.6 Pin Data Input/Output \hideinitializer */ 172 #define PD7 GPIO_PIN_DATA(3, 7 ) /*!< Specify PD.7 Pin Data Input/Output \hideinitializer */ 173 #define PD8 GPIO_PIN_DATA(3, 8 ) /*!< Specify PD.8 Pin Data Input/Output \hideinitializer */ 174 #define PD9 GPIO_PIN_DATA(3, 9 ) /*!< Specify PD.9 Pin Data Input/Output \hideinitializer */ 175 #define PD10 GPIO_PIN_DATA(3, 10) /*!< Specify PD.10 Pin Data Input/Output \hideinitializer */ 176 #define PD11 GPIO_PIN_DATA(3, 11) /*!< Specify PD.11 Pin Data Input/Output \hideinitializer */ 177 #define PD12 GPIO_PIN_DATA(3, 12) /*!< Specify PD.12 Pin Data Input/Output \hideinitializer */ 178 #define PD13 GPIO_PIN_DATA(3, 13) /*!< Specify PD.13 Pin Data Input/Output \hideinitializer */ 179 #define PD14 GPIO_PIN_DATA(3, 14) /*!< Specify PD.14 Pin Data Input/Output \hideinitializer */ 180 #define PD15 GPIO_PIN_DATA(3, 15) /*!< Specify PD.15 Pin Data Input/Output \hideinitializer */ 181 #define PE0 GPIO_PIN_DATA(4, 0 ) /*!< Specify PE.0 Pin Data Input/Output \hideinitializer */ 182 #define PE1 GPIO_PIN_DATA(4, 1 ) /*!< Specify PE.1 Pin Data Input/Output \hideinitializer */ 183 #define PE2 GPIO_PIN_DATA(4, 2 ) /*!< Specify PE.2 Pin Data Input/Output \hideinitializer */ 184 #define PE3 GPIO_PIN_DATA(4, 3 ) /*!< Specify PE.3 Pin Data Input/Output \hideinitializer */ 185 #define PE4 GPIO_PIN_DATA(4, 4 ) /*!< Specify PE.4 Pin Data Input/Output \hideinitializer */ 186 #define PE5 GPIO_PIN_DATA(4, 5 ) /*!< Specify PE.5 Pin Data Input/Output \hideinitializer */ 187 #define PE6 GPIO_PIN_DATA(4, 6 ) /*!< Specify PE.6 Pin Data Input/Output \hideinitializer */ 188 #define PE7 GPIO_PIN_DATA(4, 7 ) /*!< Specify PE.7 Pin Data Input/Output \hideinitializer */ 189 #define PE8 GPIO_PIN_DATA(4, 8 ) /*!< Specify PE.8 Pin Data Input/Output \hideinitializer */ 190 #define PE9 GPIO_PIN_DATA(4, 9 ) /*!< Specify PE.9 Pin Data Input/Output \hideinitializer */ 191 #define PE10 GPIO_PIN_DATA(4, 10) /*!< Specify PE.10 Pin Data Input/Output \hideinitializer */ 192 #define PE11 GPIO_PIN_DATA(4, 11) /*!< Specify PE.11 Pin Data Input/Output \hideinitializer */ 193 #define PE12 GPIO_PIN_DATA(4, 12) /*!< Specify PE.12 Pin Data Input/Output \hideinitializer */ 194 #define PE13 GPIO_PIN_DATA(4, 13) /*!< Specify PE.13 Pin Data Input/Output \hideinitializer */ 195 #define PE14 GPIO_PIN_DATA(4, 14) /*!< Specify PE.14 Pin Data Input/Output \hideinitializer */ 196 #define PE15 GPIO_PIN_DATA(4, 15) /*!< Specify PE.15 Pin Data Input/Output \hideinitializer */ 197 #define PF0 GPIO_PIN_DATA(5, 0 ) /*!< Specify PF.0 Pin Data Input/Output \hideinitializer */ 198 #define PF1 GPIO_PIN_DATA(5, 1 ) /*!< Specify PF.1 Pin Data Input/Output \hideinitializer */ 199 #define PF2 GPIO_PIN_DATA(5, 2 ) /*!< Specify PF.2 Pin Data Input/Output \hideinitializer */ 200 #define PF3 GPIO_PIN_DATA(5, 3 ) /*!< Specify PF.3 Pin Data Input/Output \hideinitializer */ 201 #define PF4 GPIO_PIN_DATA(5, 4 ) /*!< Specify PF.4 Pin Data Input/Output \hideinitializer */ 202 #define PF5 GPIO_PIN_DATA(5, 5 ) /*!< Specify PF.5 Pin Data Input/Output \hideinitializer */ 203 #define PF6 GPIO_PIN_DATA(5, 6 ) /*!< Specify PF.6 Pin Data Input/Output \hideinitializer */ 204 #define PF7 GPIO_PIN_DATA(5, 7 ) /*!< Specify PF.7 Pin Data Input/Output \hideinitializer */ 205 #define PF8 GPIO_PIN_DATA(5, 8 ) /*!< Specify PF.8 Pin Data Input/Output \hideinitializer */ 206 #define PF9 GPIO_PIN_DATA(5, 9 ) /*!< Specify PF.9 Pin Data Input/Output \hideinitializer */ 207 #define PF10 GPIO_PIN_DATA(5, 10) /*!< Specify PF.10 Pin Data Input/Output \hideinitializer */ 208 #define PF11 GPIO_PIN_DATA(5, 11) /*!< Specify PF.11 Pin Data Input/Output \hideinitializer */ 209 #define PG2 GPIO_PIN_DATA(6, 2 ) /*!< Specify PG.2 Pin Data Input/Output \hideinitializer */ 210 #define PG3 GPIO_PIN_DATA(6, 3 ) /*!< Specify PG.3 Pin Data Input/Output \hideinitializer */ 211 #define PG4 GPIO_PIN_DATA(6, 4 ) /*!< Specify PG.4 Pin Data Input/Output \hideinitializer */ 212 #define PG9 GPIO_PIN_DATA(6, 9 ) /*!< Specify PG.9 Pin Data Input/Output \hideinitializer */ 213 #define PG10 GPIO_PIN_DATA(6, 10) /*!< Specify PG.10 Pin Data Input/Output \hideinitializer */ 214 #define PG11 GPIO_PIN_DATA(6, 11) /*!< Specify PG.11 Pin Data Input/Output \hideinitializer */ 215 #define PG12 GPIO_PIN_DATA(6, 12) /*!< Specify PG.12 Pin Data Input/Output \hideinitializer */ 216 #define PG13 GPIO_PIN_DATA(6, 13) /*!< Specify PG.13 Pin Data Input/Output \hideinitializer */ 217 #define PG14 GPIO_PIN_DATA(6, 14) /*!< Specify PG.14 Pin Data Input/Output \hideinitializer */ 218 #define PG15 GPIO_PIN_DATA(6, 15) /*!< Specify PG.15 Pin Data Input/Output \hideinitializer */ 219 #define PH4 GPIO_PIN_DATA(7, 4 ) /*!< Specify PH.4 Pin Data Input/Output \hideinitializer */ 220 #define PH5 GPIO_PIN_DATA(7, 5 ) /*!< Specify PH.5 Pin Data Input/Output \hideinitializer */ 221 #define PH6 GPIO_PIN_DATA(7, 6 ) /*!< Specify PH.6 Pin Data Input/Output \hideinitializer */ 222 #define PH7 GPIO_PIN_DATA(7, 7 ) /*!< Specify PH.7 Pin Data Input/Output \hideinitializer */ 223 #define PH8 GPIO_PIN_DATA(7, 8 ) /*!< Specify PH.8 Pin Data Input/Output \hideinitializer */ 224 #define PH9 GPIO_PIN_DATA(7, 9 ) /*!< Specify PH.9 Pin Data Input/Output \hideinitializer */ 225 #define PH10 GPIO_PIN_DATA(7, 10) /*!< Specify PH.10 Pin Data Input/Output \hideinitializer */ 226 #define PH11 GPIO_PIN_DATA(7, 11) /*!< Specify PH.11 Pin Data Input/Output \hideinitializer */ 227 228 /*@}*/ /* end of group GPIO_EXPORTED_CONSTANTS */ 229 230 231 /** @addtogroup GPIO_EXPORTED_FUNCTIONS GPIO Exported Functions 232 @{ 233 */ 234 235 /** 236 * @brief Clear GPIO Pin Interrupt Flag 237 * 238 * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. 239 * @param[in] u32PinMask The single or multiple pins of specified GPIO port. 240 * - It could be \ref BIT0 ~ \ref BIT15 for PA, PB, PD and PE GPIO port. 241 * - It could be \ref BIT0 ~ \ref BIT14 for PC GPIO port. 242 * - It could be \ref BIT0 ~ \ref BIT11 for PF GPIO port. 243 * - It could be \ref BIT2 ~ \ref BIT4, \ref BIT9 ~ \ref BIT15 for PG GPIO port. 244 * - It could be \ref BIT4 ~ \ref BIT11 for PH GPIO port. 245 * 246 * @return None 247 * 248 * @details Clear the interrupt status of specified GPIO pin. 249 * \hideinitializer 250 */ 251 #define GPIO_CLR_INT_FLAG(port, u32PinMask) ((port)->INTSRC = (u32PinMask)) 252 253 /** 254 * @brief Disable Pin De-bounce Function 255 * 256 * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. 257 * @param[in] u32PinMask The single or multiple pins of specified GPIO port. 258 * - It could be \ref BIT0 ~ \ref BIT15 for PA, PB, PD and PE GPIO port. 259 * - It could be \ref BIT0 ~ \ref BIT14 for PC GPIO port. 260 * - It could be \ref BIT0 ~ \ref BIT11 for PF GPIO port. 261 * - It could be \ref BIT2 ~ \ref BIT4, \ref BIT9 ~ \ref BIT15 for PG GPIO port. 262 * - It could be \ref BIT4 ~ \ref BIT11 for PH GPIO port. 263 * 264 * @return None 265 * 266 * @details Disable the interrupt de-bounce function of specified GPIO pin. 267 * \hideinitializer 268 */ 269 #define GPIO_DISABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN &= ~(u32PinMask)) 270 271 /** 272 * @brief Enable Pin De-bounce Function 273 * 274 * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. 275 * @param[in] u32PinMask The single or multiple pins of specified GPIO port. 276 * - It could be \ref BIT0 ~ \ref BIT15 for PA, PB, PD and PE GPIO port. 277 * - It could be \ref BIT0 ~ \ref BIT14 for PC GPIO port. 278 * - It could be \ref BIT0 ~ \ref BIT11 for PF GPIO port. 279 * - It could be \ref BIT2 ~ \ref BIT4, \ref BIT9 ~ \ref BIT15 for PG GPIO port. 280 * - It could be \ref BIT4 ~ \ref BIT11 for PH GPIO port. 281 * @return None 282 * 283 * @details Enable the interrupt de-bounce function of specified GPIO pin. 284 * \hideinitializer 285 */ 286 #define GPIO_ENABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN |= (u32PinMask)) 287 288 /** 289 * @brief Disable I/O Digital Input Path 290 * 291 * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. 292 * @param[in] u32PinMask The single or multiple pins of specified GPIO port. 293 * - It could be \ref BIT0 ~ \ref BIT15 for PA, PB, PD and PE GPIO port. 294 * - It could be \ref BIT0 ~ \ref BIT14 for PC GPIO port. 295 * - It could be \ref BIT0 ~ \ref BIT11 for PF GPIO port. 296 * - It could be \ref BIT2 ~ \ref BIT4, \ref BIT9 ~ \ref BIT15 for PG GPIO port. 297 * - It could be \ref BIT4 ~ \ref BIT11 for PH GPIO port. 298 * 299 * @return None 300 * 301 * @details Disable I/O digital input path of specified GPIO pin. 302 * \hideinitializer 303 */ 304 #define GPIO_DISABLE_DIGITAL_PATH(port, u32PinMask) ((port)->DINOFF |= ((u32PinMask)<<16)) 305 306 /** 307 * @brief Enable I/O Digital Input Path 308 * 309 * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. 310 * @param[in] u32PinMask The single or multiple pins of specified GPIO port. 311 * - It could be \ref BIT0 ~ \ref BIT15 for PA, PB, PD and PE GPIO port. 312 * - It could be \ref BIT0 ~ \ref BIT14 for PC GPIO port. 313 * - It could be \ref BIT0 ~ \ref BIT11 for PF GPIO port. 314 * - It could be \ref BIT2 ~ \ref BIT4, \ref BIT9 ~ \ref BIT15 for PG GPIO port. 315 * - It could be \ref BIT4 ~ \ref BIT11 for PH GPIO port. 316 * 317 * @return None 318 * 319 * @details Enable I/O digital input path of specified GPIO pin. 320 * \hideinitializer 321 */ 322 #define GPIO_ENABLE_DIGITAL_PATH(port, u32PinMask) ((port)->DINOFF &= ~((u32PinMask)<<16)) 323 324 /** 325 * @brief Disable I/O DOUT mask 326 * 327 * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. 328 * @param[in] u32PinMask The single or multiple pins of specified GPIO port. 329 * - It could be \ref BIT0 ~ \ref BIT15 for PA, PB, PD and PE GPIO port. 330 * - It could be \ref BIT0 ~ \ref BIT14 for PC GPIO port. 331 * - It could be \ref BIT0 ~ \ref BIT11 for PF GPIO port. 332 * - It could be \ref BIT2 ~ \ref BIT4, \ref BIT9 ~ \ref BIT15 for PG GPIO port. 333 * - It could be \ref BIT4 ~ \ref BIT11 for PH GPIO port. 334 * 335 * @return None 336 * 337 * @details Disable I/O DOUT mask of specified GPIO pin. 338 * \hideinitializer 339 */ 340 #define GPIO_DISABLE_DOUT_MASK(port, u32PinMask) ((port)->DATMSK &= ~(u32PinMask)) 341 342 /** 343 * @brief Enable I/O DOUT mask 344 * 345 * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. 346 * @param[in] u32PinMask The single or multiple pins of specified GPIO port. 347 * - It could be \ref BIT0 ~ \ref BIT15 for PA, PB, PD and PE GPIO port. 348 * - It could be \ref BIT0 ~ \ref BIT14 for PC GPIO port. 349 * - It could be \ref BIT0 ~ \ref BIT11 for PF GPIO port. 350 * - It could be \ref BIT2 ~ \ref BIT4, \ref BIT9 ~ \ref BIT15 for PG GPIO port. 351 * - It could be \ref BIT4 ~ \ref BIT11 for PH GPIO port. 352 * 353 * @return None 354 * 355 * @details Enable I/O DOUT mask of specified GPIO pin. 356 * \hideinitializer 357 */ 358 #define GPIO_ENABLE_DOUT_MASK(port, u32PinMask) ((port)->DATMSK |= (u32PinMask)) 359 360 /** 361 * @brief Get GPIO Pin Interrupt Flag 362 * 363 * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. 364 * @param[in] u32PinMask The single or multiple pins of specified GPIO port. 365 * - It could be \ref BIT0 ~ \ref BIT15 for PA, PB, PD and PE GPIO port. 366 * - It could be \ref BIT0 ~ \ref BIT14 for PC GPIO port. 367 * - It could be \ref BIT0 ~ \ref BIT11 for PF GPIO port. 368 * - It could be \ref BIT2 ~ \ref BIT4, \ref BIT9 ~ \ref BIT15 for PG GPIO port. 369 * - It could be \ref BIT4 ~ \ref BIT11 for PH GPIO port. 370 * 371 * @retval 0 No interrupt at specified GPIO pin 372 * @retval 1 The specified GPIO pin generate an interrupt 373 * 374 * @details Get the interrupt status of specified GPIO pin. 375 * \hideinitializer 376 */ 377 #define GPIO_GET_INT_FLAG(port, u32PinMask) ((port)->INTSRC & (u32PinMask)) 378 379 /** 380 * @brief Set De-bounce Sampling Cycle Time 381 * 382 * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. 383 * @param[in] u32ClkSrc The de-bounce counter clock source. It could be 384 * - \ref GPIO_DBCTL_DBCLKSRC_HCLK 385 * - \ref GPIO_DBCTL_DBCLKSRC_LIRC 386 * @param[in] u32ClkSel The de-bounce sampling cycle selection. It could be 387 * - \ref GPIO_DBCTL_DBCLKSEL_1 388 * - \ref GPIO_DBCTL_DBCLKSEL_2 389 * - \ref GPIO_DBCTL_DBCLKSEL_4 390 * - \ref GPIO_DBCTL_DBCLKSEL_8 391 * - \ref GPIO_DBCTL_DBCLKSEL_16 392 * - \ref GPIO_DBCTL_DBCLKSEL_32 393 * - \ref GPIO_DBCTL_DBCLKSEL_64 394 * - \ref GPIO_DBCTL_DBCLKSEL_128 395 * - \ref GPIO_DBCTL_DBCLKSEL_256 396 * - \ref GPIO_DBCTL_DBCLKSEL_512 397 * - \ref GPIO_DBCTL_DBCLKSEL_1024 398 * - \ref GPIO_DBCTL_DBCLKSEL_2048 399 * - \ref GPIO_DBCTL_DBCLKSEL_4096 400 * - \ref GPIO_DBCTL_DBCLKSEL_8192 401 * - \ref GPIO_DBCTL_DBCLKSEL_16384 402 * - \ref GPIO_DBCTL_DBCLKSEL_32768 403 * 404 * @return None 405 * 406 * @details Set the interrupt de-bounce sampling cycle time based on the debounce counter clock source. \n 407 * Example: _GPIO_SET_DEBOUNCE_TIME(PA, GPIO_DBCTL_DBCLKSRC_LIRC, GPIO_DBCTL_DBCLKSEL_4). \n 408 * It's meaning the De-debounce counter clock source is internal 32 KHz and sampling cycle selection is 4. \n 409 * Then the target de-bounce sampling cycle time is (4)*(1/(32*1000)) s = 125 us, 410 * and system will sampling interrupt input once per 125 us. 411 */ 412 #define GPIO_SET_DEBOUNCE_TIME(port, u32ClkSrc, u32ClkSel) ((port)->DBCTL = (GPIO_DBCTL_ICLKON_Msk | (u32ClkSrc) | (u32ClkSel))) 413 414 /** 415 * @brief Get GPIO Port IN Data 416 * 417 * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. 418 * 419 * @return The specified port data 420 * 421 * @details Get the PIN register of specified GPIO port. 422 * \hideinitializer 423 */ 424 #define GPIO_GET_IN_DATA(port) ((port)->PIN) 425 426 /** 427 * @brief Set GPIO Port OUT Data 428 * 429 * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. 430 * @param[in] u32Data GPIO port data. 431 * 432 * @return None 433 * 434 * @details Set the Data into specified GPIO port. 435 * \hideinitializer 436 */ 437 #define GPIO_SET_OUT_DATA(port, u32Data) ((port)->DOUT = (u32Data)) 438 439 /** 440 * @brief Toggle Specified GPIO pin 441 * 442 * @param[in] u32Pin Pxy. For exampe, \ref PA1. 443 * 444 * @return None 445 * 446 * @details Toggle the specified GPIO pint. 447 * \hideinitializer 448 */ 449 #define GPIO_TOGGLE(u32Pin) ((u32Pin) ^= 1) 450 451 #define GPIO_EnableEINT GPIO_EnableInt 452 453 #define GPIO_DisableEINT GPIO_DisableInt 454 455 void GPIO_SetMode(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode); 456 void GPIO_EnableInt(GPIO_T *port, uint32_t u32Pin, uint32_t u32IntAttribs); 457 void GPIO_DisableInt(GPIO_T *port, uint32_t u32Pin); 458 void GPIO_SetSlewCtl(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode); 459 void GPIO_SetPullCtl(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode); 460 461 462 /*@}*/ /* end of group GPIO_EXPORTED_FUNCTIONS */ 463 464 /*@}*/ /* end of group GPIO_Driver */ 465 466 /*@}*/ /* end of group Standard_Driver */ 467 468 469 #ifdef __cplusplus 470 } 471 #endif 472 473 #endif /* __GPIO_H__ */ 474 475 /*** (C) COPYRIGHT 2013~2016 Nuvoton Technology Corp. ***/ 476
