/**************************************************************************//** * @file gpio.h * @version V1.00 * @brief M2L31 series GPIO driver header file * * SPDX-License-Identifier: Apache-2.0 * @copyright (C) 2023 Nuvoton Technology Corp. All rights reserved. ******************************************************************************/ #ifndef __GPIO_H__ #define __GPIO_H__ #ifdef __cplusplus extern "C" { #endif /** @addtogroup Standard_Driver Standard Driver @{ */ /** @addtogroup GPIO_Driver GPIO Driver @{ */ /** @addtogroup GPIO_EXPORTED_CONSTANTS GPIO Exported Constants @{ */ #define GPIO_PIN_MAX 16UL /*!< Specify Maximum Pins of Each GPIO Port */ /*---------------------------------------------------------------------------------------------------------*/ /* GPIO_MODE Constant Definitions */ /*---------------------------------------------------------------------------------------------------------*/ #define GPIO_MODE_INPUT 0x0UL /*!< Input Mode \hideinitializer */ #define GPIO_MODE_OUTPUT 0x1UL /*!< Output Mode \hideinitializer */ #define GPIO_MODE_OPEN_DRAIN 0x2UL /*!< Open-Drain Mode \hideinitializer */ #define GPIO_MODE_QUASI 0x3UL /*!< Quasi-bidirectional Mode \hideinitializer */ /*---------------------------------------------------------------------------------------------------------*/ /* GPIO Interrupt Type Constant Definitions */ /*---------------------------------------------------------------------------------------------------------*/ #define GPIO_INT_RISING 0x00010000UL /*!< Interrupt enable by Input Rising Edge \hideinitializer */ #define GPIO_INT_FALLING 0x00000001UL /*!< Interrupt enable by Input Falling Edge \hideinitializer */ #define GPIO_INT_BOTH_EDGE 0x00010001UL /*!< Interrupt enable by both Rising Edge and Falling Edge \hideinitializer */ #define GPIO_INT_HIGH 0x01010000UL /*!< Interrupt enable by Level-High \hideinitializer */ #define GPIO_INT_LOW 0x01000001UL /*!< Interrupt enable by Level-Level \hideinitializer */ /*---------------------------------------------------------------------------------------------------------*/ /* GPIO_INTTYPE Constant Definitions */ /*---------------------------------------------------------------------------------------------------------*/ #define GPIO_INTTYPE_EDGE 0UL /*!< GPIO_INTTYPE Setting for Edge Trigger Mode \hideinitializer */ #define GPIO_INTTYPE_LEVEL 1UL /*!< GPIO_INTTYPE Setting for Edge Level Mode \hideinitializer */ /*---------------------------------------------------------------------------------------------------------*/ /* GPIO Slew Rate Type Constant Definitions */ /*---------------------------------------------------------------------------------------------------------*/ #define GPIO_SLEWCTL_NORMAL 0x0UL /*!< GPIO slew setting for normal Mode \hideinitializer */ #define GPIO_SLEWCTL_HIGH 0x1UL /*!< GPIO slew setting for high Mode \hideinitializer */ /*---------------------------------------------------------------------------------------------------------*/ /* GPIO Pull-up And Pull-down Type Constant Definitions */ /*---------------------------------------------------------------------------------------------------------*/ #define GPIO_PUSEL_DISABLE 0x0UL /*!< GPIO PUSEL setting for Disable Mode \hideinitializer */ #define GPIO_PUSEL_PULL_UP 0x1UL /*!< GPIO PUSEL setting for Pull-up Mode \hideinitializer */ #define GPIO_PUSEL_PULL_DOWN 0x2UL /*!< GPIO PUSEL setting for Pull-down Mode \hideinitializer */ /*---------------------------------------------------------------------------------------------------------*/ /* GPIO_DBCTL Constant Definitions */ /*---------------------------------------------------------------------------------------------------------*/ #define GPIO_DBCTL_ICLK_ON 0x00000020UL /*!< GPIO_DBCTL setting for all IO pins edge detection circuit is always active after reset \hideinitializer */ #define GPIO_DBCTL_ICLK_OFF 0x00000000UL /*!< GPIO_DBCTL setting for edge detection circuit is active only if IO pin corresponding GPIOx_IEN bit is set to 1 \hideinitializer */ #define GPIO_DBCTL_DBCLKSRC_LIRC (0x1UL<INTSRC = (u32PinMask)) /** * @brief Disable Pin De-bounce Function * * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. * @param[in] u32PinMask The single or multiple pins of specified GPIO port. * - It could be \ref BIT0 ~ \ref BIT15 for PA, PB, PD and PE GPIO port. * - It could be \ref BIT0 ~ \ref BIT14 for PC GPIO port. * - It could be \ref BIT0 ~ \ref BIT11 for PF GPIO port. * - It could be \ref BIT2 ~ \ref BIT4, \ref BIT9 ~ \ref BIT15 for PG GPIO port. * - It could be \ref BIT4 ~ \ref BIT11 for PH GPIO port. * * @return None * * @details Disable the interrupt de-bounce function of specified GPIO pin. * \hideinitializer */ #define GPIO_DISABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN &= ~(u32PinMask)) /** * @brief Enable Pin De-bounce Function * * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. * @param[in] u32PinMask The single or multiple pins of specified GPIO port. * - It could be \ref BIT0 ~ \ref BIT15 for PA, PB, PD and PE GPIO port. * - It could be \ref BIT0 ~ \ref BIT14 for PC GPIO port. * - It could be \ref BIT0 ~ \ref BIT11 for PF GPIO port. * - It could be \ref BIT2 ~ \ref BIT4, \ref BIT9 ~ \ref BIT15 for PG GPIO port. * - It could be \ref BIT4 ~ \ref BIT11 for PH GPIO port. * @return None * * @details Enable the interrupt de-bounce function of specified GPIO pin. * \hideinitializer */ #define GPIO_ENABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN |= (u32PinMask)) /** * @brief Disable I/O Digital Input Path * * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. * @param[in] u32PinMask The single or multiple pins of specified GPIO port. * - It could be \ref BIT0 ~ \ref BIT15 for PA, PB, PD and PE GPIO port. * - It could be \ref BIT0 ~ \ref BIT14 for PC GPIO port. * - It could be \ref BIT0 ~ \ref BIT11 for PF GPIO port. * - It could be \ref BIT2 ~ \ref BIT4, \ref BIT9 ~ \ref BIT15 for PG GPIO port. * - It could be \ref BIT4 ~ \ref BIT11 for PH GPIO port. * * @return None * * @details Disable I/O digital input path of specified GPIO pin. * \hideinitializer */ #define GPIO_DISABLE_DIGITAL_PATH(port, u32PinMask) ((port)->DINOFF |= ((u32PinMask)<<16)) /** * @brief Enable I/O Digital Input Path * * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. * @param[in] u32PinMask The single or multiple pins of specified GPIO port. * - It could be \ref BIT0 ~ \ref BIT15 for PA, PB, PD and PE GPIO port. * - It could be \ref BIT0 ~ \ref BIT14 for PC GPIO port. * - It could be \ref BIT0 ~ \ref BIT11 for PF GPIO port. * - It could be \ref BIT2 ~ \ref BIT4, \ref BIT9 ~ \ref BIT15 for PG GPIO port. * - It could be \ref BIT4 ~ \ref BIT11 for PH GPIO port. * * @return None * * @details Enable I/O digital input path of specified GPIO pin. * \hideinitializer */ #define GPIO_ENABLE_DIGITAL_PATH(port, u32PinMask) ((port)->DINOFF &= ~((u32PinMask)<<16)) /** * @brief Disable I/O DOUT mask * * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. * @param[in] u32PinMask The single or multiple pins of specified GPIO port. * - It could be \ref BIT0 ~ \ref BIT15 for PA, PB, PD and PE GPIO port. * - It could be \ref BIT0 ~ \ref BIT14 for PC GPIO port. * - It could be \ref BIT0 ~ \ref BIT11 for PF GPIO port. * - It could be \ref BIT2 ~ \ref BIT4, \ref BIT9 ~ \ref BIT15 for PG GPIO port. * - It could be \ref BIT4 ~ \ref BIT11 for PH GPIO port. * * @return None * * @details Disable I/O DOUT mask of specified GPIO pin. * \hideinitializer */ #define GPIO_DISABLE_DOUT_MASK(port, u32PinMask) ((port)->DATMSK &= ~(u32PinMask)) /** * @brief Enable I/O DOUT mask * * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. * @param[in] u32PinMask The single or multiple pins of specified GPIO port. * - It could be \ref BIT0 ~ \ref BIT15 for PA, PB, PD and PE GPIO port. * - It could be \ref BIT0 ~ \ref BIT14 for PC GPIO port. * - It could be \ref BIT0 ~ \ref BIT11 for PF GPIO port. * - It could be \ref BIT2 ~ \ref BIT4, \ref BIT9 ~ \ref BIT15 for PG GPIO port. * - It could be \ref BIT4 ~ \ref BIT11 for PH GPIO port. * * @return None * * @details Enable I/O DOUT mask of specified GPIO pin. * \hideinitializer */ #define GPIO_ENABLE_DOUT_MASK(port, u32PinMask) ((port)->DATMSK |= (u32PinMask)) /** * @brief Get GPIO Pin Interrupt Flag * * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. * @param[in] u32PinMask The single or multiple pins of specified GPIO port. * - It could be \ref BIT0 ~ \ref BIT15 for PA, PB, PD and PE GPIO port. * - It could be \ref BIT0 ~ \ref BIT14 for PC GPIO port. * - It could be \ref BIT0 ~ \ref BIT11 for PF GPIO port. * - It could be \ref BIT2 ~ \ref BIT4, \ref BIT9 ~ \ref BIT15 for PG GPIO port. * - It could be \ref BIT4 ~ \ref BIT11 for PH GPIO port. * * @retval 0 No interrupt at specified GPIO pin * @retval 1 The specified GPIO pin generate an interrupt * * @details Get the interrupt status of specified GPIO pin. * \hideinitializer */ #define GPIO_GET_INT_FLAG(port, u32PinMask) ((port)->INTSRC & (u32PinMask)) /** * @brief Set De-bounce Sampling Cycle Time * * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. * @param[in] u32ClkSrc The de-bounce counter clock source. It could be * - \ref GPIO_DBCTL_DBCLKSRC_HCLK * - \ref GPIO_DBCTL_DBCLKSRC_LIRC * @param[in] u32ClkSel The de-bounce sampling cycle selection. It could be * - \ref GPIO_DBCTL_DBCLKSEL_1 * - \ref GPIO_DBCTL_DBCLKSEL_2 * - \ref GPIO_DBCTL_DBCLKSEL_4 * - \ref GPIO_DBCTL_DBCLKSEL_8 * - \ref GPIO_DBCTL_DBCLKSEL_16 * - \ref GPIO_DBCTL_DBCLKSEL_32 * - \ref GPIO_DBCTL_DBCLKSEL_64 * - \ref GPIO_DBCTL_DBCLKSEL_128 * - \ref GPIO_DBCTL_DBCLKSEL_256 * - \ref GPIO_DBCTL_DBCLKSEL_512 * - \ref GPIO_DBCTL_DBCLKSEL_1024 * - \ref GPIO_DBCTL_DBCLKSEL_2048 * - \ref GPIO_DBCTL_DBCLKSEL_4096 * - \ref GPIO_DBCTL_DBCLKSEL_8192 * - \ref GPIO_DBCTL_DBCLKSEL_16384 * - \ref GPIO_DBCTL_DBCLKSEL_32768 * * @return None * * @details Set the interrupt de-bounce sampling cycle time based on the debounce counter clock source. \n * Example: _GPIO_SET_DEBOUNCE_TIME(PA, GPIO_DBCTL_DBCLKSRC_LIRC, GPIO_DBCTL_DBCLKSEL_4). \n * It's meaning the De-debounce counter clock source is internal 32 KHz and sampling cycle selection is 4. \n * Then the target de-bounce sampling cycle time is (4)*(1/(32*1000)) s = 125 us, * and system will sampling interrupt input once per 125 us. */ #define GPIO_SET_DEBOUNCE_TIME(port, u32ClkSrc, u32ClkSel) ((port)->DBCTL = (GPIO_DBCTL_ICLKON_Msk | (u32ClkSrc) | (u32ClkSel))) /** * @brief Get GPIO Port IN Data * * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. * * @return The specified port data * * @details Get the PIN register of specified GPIO port. * \hideinitializer */ #define GPIO_GET_IN_DATA(port) ((port)->PIN) /** * @brief Set GPIO Port OUT Data * * @param[in] port GPIO port. It could be \ref PA, \ref PB, \ref PC, \ref PD, \ref PE, \ref PF, \ref PG or \ref PH. * @param[in] u32Data GPIO port data. * * @return None * * @details Set the Data into specified GPIO port. * \hideinitializer */ #define GPIO_SET_OUT_DATA(port, u32Data) ((port)->DOUT = (u32Data)) /** * @brief Toggle Specified GPIO pin * * @param[in] u32Pin Pxy. For exampe, \ref PA1. * * @return None * * @details Toggle the specified GPIO pint. * \hideinitializer */ #define GPIO_TOGGLE(u32Pin) ((u32Pin) ^= 1) #define GPIO_EnableEINT GPIO_EnableInt #define GPIO_DisableEINT GPIO_DisableInt void GPIO_SetMode(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode); void GPIO_EnableInt(GPIO_T *port, uint32_t u32Pin, uint32_t u32IntAttribs); void GPIO_DisableInt(GPIO_T *port, uint32_t u32Pin); void GPIO_SetSlewCtl(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode); void GPIO_SetPullCtl(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode); /*@}*/ /* end of group GPIO_EXPORTED_FUNCTIONS */ /*@}*/ /* end of group GPIO_Driver */ /*@}*/ /* end of group Standard_Driver */ #ifdef __cplusplus } #endif #endif /* __GPIO_H__ */ /*** (C) COPYRIGHT 2013~2016 Nuvoton Technology Corp. ***/