1 /***************************************************************************//** 2 * \file cyhal_triggers_tviibe1m.c 3 * 4 * \brief 5 * TVIIBE1M family HAL triggers header 6 * 7 ******************************************************************************** 8 * \copyright 9 * (c) (2016-2024), Cypress Semiconductor Corporation (an Infineon company) or 10 * an affiliate of Cypress Semiconductor Corporation. 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 *******************************************************************************/ 26 27 #include "cy_device_headers.h" 28 #include "cyhal_hw_types.h" 29 30 #ifdef CY_DEVICE_TVIIBE1M 31 #include "triggers/cyhal_triggers_tviibe1m.h" 32 33 const uint16_t cyhal_sources_per_mux[20] = 34 { 35 55, 61, 5, 86, 94, 123, 80, 7, 11, 223, 134, 8, 64, 64, 64, 9, 9, 3, 3, 16, 36 }; 37 38 const bool cyhal_is_mux_1to1[20] = 39 { 40 false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, 41 }; 42 43 const _cyhal_trigger_source_tviibe1m_t cyhal_mux0_sources[55] = 44 { 45 _CYHAL_TRIGGER_CPUSS_ZERO, 46 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 47 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 48 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 49 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 50 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 51 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 52 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 53 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 54 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 55 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 56 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 57 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 58 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 59 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 60 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 61 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 62 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 63 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 64 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 65 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 66 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 67 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 68 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 69 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 70 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 71 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 72 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 73 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 74 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 75 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 76 _CYHAL_TRIGGER_CPUSS_TR_FAULT2, 77 _CYHAL_TRIGGER_CPUSS_TR_FAULT3, 78 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 79 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 80 _CYHAL_TRIGGER_EVTGEN0_TR_OUT3, 81 _CYHAL_TRIGGER_EVTGEN0_TR_OUT4, 82 _CYHAL_TRIGGER_EVTGEN0_TR_OUT5, 83 _CYHAL_TRIGGER_EVTGEN0_TR_OUT6, 84 _CYHAL_TRIGGER_PERI_TR_IO_INPUT0, 85 _CYHAL_TRIGGER_PERI_TR_IO_INPUT1, 86 _CYHAL_TRIGGER_PERI_TR_IO_INPUT2, 87 _CYHAL_TRIGGER_PERI_TR_IO_INPUT3, 88 _CYHAL_TRIGGER_PERI_TR_IO_INPUT4, 89 _CYHAL_TRIGGER_PERI_TR_IO_INPUT5, 90 _CYHAL_TRIGGER_PERI_TR_IO_INPUT6, 91 _CYHAL_TRIGGER_PERI_TR_IO_INPUT7, 92 _CYHAL_TRIGGER_PERI_TR_IO_INPUT8, 93 _CYHAL_TRIGGER_PERI_TR_IO_INPUT9, 94 _CYHAL_TRIGGER_PERI_TR_IO_INPUT10, 95 _CYHAL_TRIGGER_PERI_TR_IO_INPUT11, 96 _CYHAL_TRIGGER_PERI_TR_IO_INPUT12, 97 _CYHAL_TRIGGER_PERI_TR_IO_INPUT13, 98 _CYHAL_TRIGGER_PERI_TR_IO_INPUT14, 99 _CYHAL_TRIGGER_PERI_TR_IO_INPUT15, 100 }; 101 102 const _cyhal_trigger_source_tviibe1m_t cyhal_mux1_sources[61] = 103 { 104 _CYHAL_TRIGGER_CPUSS_ZERO, 105 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 106 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 107 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 108 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 109 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 110 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 111 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 112 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 113 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 114 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 115 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 116 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 117 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 118 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 119 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 120 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 121 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 122 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 123 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 124 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 125 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 126 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 127 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 128 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 129 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 130 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 131 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 132 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 133 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 134 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 135 _CYHAL_TRIGGER_CPUSS_TR_FAULT2, 136 _CYHAL_TRIGGER_CPUSS_TR_FAULT3, 137 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 138 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 139 _CYHAL_TRIGGER_EVTGEN0_TR_OUT7, 140 _CYHAL_TRIGGER_EVTGEN0_TR_OUT8, 141 _CYHAL_TRIGGER_EVTGEN0_TR_OUT9, 142 _CYHAL_TRIGGER_EVTGEN0_TR_OUT10, 143 _CYHAL_TRIGGER_PERI_TR_IO_INPUT16, 144 _CYHAL_TRIGGER_PERI_TR_IO_INPUT17, 145 _CYHAL_TRIGGER_PERI_TR_IO_INPUT18, 146 _CYHAL_TRIGGER_PERI_TR_IO_INPUT19, 147 _CYHAL_TRIGGER_PERI_TR_IO_INPUT20, 148 _CYHAL_TRIGGER_PERI_TR_IO_INPUT21, 149 _CYHAL_TRIGGER_PERI_TR_IO_INPUT22, 150 _CYHAL_TRIGGER_PERI_TR_IO_INPUT23, 151 _CYHAL_TRIGGER_PERI_TR_IO_INPUT24, 152 _CYHAL_TRIGGER_PERI_TR_IO_INPUT25, 153 _CYHAL_TRIGGER_PERI_TR_IO_INPUT26, 154 _CYHAL_TRIGGER_PERI_TR_IO_INPUT27, 155 _CYHAL_TRIGGER_PERI_TR_IO_INPUT28, 156 _CYHAL_TRIGGER_PERI_TR_IO_INPUT29, 157 _CYHAL_TRIGGER_PERI_TR_IO_INPUT30, 158 _CYHAL_TRIGGER_PERI_TR_IO_INPUT31, 159 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT0, 160 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT1, 161 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT2, 162 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT3, 163 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT4, 164 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT5, 165 }; 166 167 const _cyhal_trigger_source_tviibe1m_t cyhal_mux2_sources[5] = 168 { 169 _CYHAL_TRIGGER_CPUSS_ZERO, 170 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 171 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 172 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 173 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 174 }; 175 176 const _cyhal_trigger_source_tviibe1m_t cyhal_mux3_sources[86] = 177 { 178 _CYHAL_TRIGGER_CPUSS_ZERO, 179 _CYHAL_TRIGGER_TCPWM0_TR_OUT0512, 180 _CYHAL_TRIGGER_TCPWM0_TR_OUT0513, 181 _CYHAL_TRIGGER_TCPWM0_TR_OUT0514, 182 _CYHAL_TRIGGER_TCPWM0_TR_OUT0515, 183 _CYHAL_TRIGGER_TCPWM0_TR_OUT0256, 184 _CYHAL_TRIGGER_TCPWM0_TR_OUT0257, 185 _CYHAL_TRIGGER_TCPWM0_TR_OUT0258, 186 _CYHAL_TRIGGER_TCPWM0_TR_OUT0259, 187 _CYHAL_TRIGGER_TCPWM0_TR_OUT0260, 188 _CYHAL_TRIGGER_TCPWM0_TR_OUT0261, 189 _CYHAL_TRIGGER_TCPWM0_TR_OUT0262, 190 _CYHAL_TRIGGER_TCPWM0_TR_OUT0263, 191 _CYHAL_TRIGGER_TCPWM0_TR_OUT0264, 192 _CYHAL_TRIGGER_TCPWM0_TR_OUT0265, 193 _CYHAL_TRIGGER_TCPWM0_TR_OUT0266, 194 _CYHAL_TRIGGER_TCPWM0_TR_OUT0267, 195 _CYHAL_TRIGGER_TCPWM0_TR_OUT00, 196 _CYHAL_TRIGGER_TCPWM0_TR_OUT01, 197 _CYHAL_TRIGGER_TCPWM0_TR_OUT02, 198 _CYHAL_TRIGGER_TCPWM0_TR_OUT03, 199 _CYHAL_TRIGGER_TCPWM0_TR_OUT04, 200 _CYHAL_TRIGGER_TCPWM0_TR_OUT05, 201 _CYHAL_TRIGGER_TCPWM0_TR_OUT06, 202 _CYHAL_TRIGGER_TCPWM0_TR_OUT07, 203 _CYHAL_TRIGGER_TCPWM0_TR_OUT08, 204 _CYHAL_TRIGGER_TCPWM0_TR_OUT09, 205 _CYHAL_TRIGGER_TCPWM0_TR_OUT010, 206 _CYHAL_TRIGGER_TCPWM0_TR_OUT011, 207 _CYHAL_TRIGGER_TCPWM0_TR_OUT012, 208 _CYHAL_TRIGGER_TCPWM0_TR_OUT013, 209 _CYHAL_TRIGGER_TCPWM0_TR_OUT014, 210 _CYHAL_TRIGGER_TCPWM0_TR_OUT015, 211 _CYHAL_TRIGGER_TCPWM0_TR_OUT016, 212 _CYHAL_TRIGGER_TCPWM0_TR_OUT017, 213 _CYHAL_TRIGGER_TCPWM0_TR_OUT018, 214 _CYHAL_TRIGGER_TCPWM0_TR_OUT019, 215 _CYHAL_TRIGGER_TCPWM0_TR_OUT020, 216 _CYHAL_TRIGGER_TCPWM0_TR_OUT021, 217 _CYHAL_TRIGGER_TCPWM0_TR_OUT022, 218 _CYHAL_TRIGGER_TCPWM0_TR_OUT023, 219 _CYHAL_TRIGGER_TCPWM0_TR_OUT024, 220 _CYHAL_TRIGGER_TCPWM0_TR_OUT025, 221 _CYHAL_TRIGGER_TCPWM0_TR_OUT026, 222 _CYHAL_TRIGGER_TCPWM0_TR_OUT027, 223 _CYHAL_TRIGGER_TCPWM0_TR_OUT028, 224 _CYHAL_TRIGGER_TCPWM0_TR_OUT029, 225 _CYHAL_TRIGGER_TCPWM0_TR_OUT030, 226 _CYHAL_TRIGGER_TCPWM0_TR_OUT031, 227 _CYHAL_TRIGGER_TCPWM0_TR_OUT032, 228 _CYHAL_TRIGGER_TCPWM0_TR_OUT033, 229 _CYHAL_TRIGGER_TCPWM0_TR_OUT034, 230 _CYHAL_TRIGGER_TCPWM0_TR_OUT035, 231 _CYHAL_TRIGGER_TCPWM0_TR_OUT036, 232 _CYHAL_TRIGGER_TCPWM0_TR_OUT037, 233 _CYHAL_TRIGGER_TCPWM0_TR_OUT038, 234 _CYHAL_TRIGGER_TCPWM0_TR_OUT039, 235 _CYHAL_TRIGGER_TCPWM0_TR_OUT040, 236 _CYHAL_TRIGGER_TCPWM0_TR_OUT041, 237 _CYHAL_TRIGGER_TCPWM0_TR_OUT042, 238 _CYHAL_TRIGGER_TCPWM0_TR_OUT043, 239 _CYHAL_TRIGGER_TCPWM0_TR_OUT044, 240 _CYHAL_TRIGGER_TCPWM0_TR_OUT045, 241 _CYHAL_TRIGGER_TCPWM0_TR_OUT046, 242 _CYHAL_TRIGGER_TCPWM0_TR_OUT047, 243 _CYHAL_TRIGGER_TCPWM0_TR_OUT048, 244 _CYHAL_TRIGGER_TCPWM0_TR_OUT049, 245 _CYHAL_TRIGGER_TCPWM0_TR_OUT050, 246 _CYHAL_TRIGGER_TCPWM0_TR_OUT051, 247 _CYHAL_TRIGGER_TCPWM0_TR_OUT052, 248 _CYHAL_TRIGGER_TCPWM0_TR_OUT053, 249 _CYHAL_TRIGGER_TCPWM0_TR_OUT054, 250 _CYHAL_TRIGGER_TCPWM0_TR_OUT055, 251 _CYHAL_TRIGGER_TCPWM0_TR_OUT056, 252 _CYHAL_TRIGGER_TCPWM0_TR_OUT057, 253 _CYHAL_TRIGGER_TCPWM0_TR_OUT058, 254 _CYHAL_TRIGGER_TCPWM0_TR_OUT059, 255 _CYHAL_TRIGGER_TCPWM0_TR_OUT060, 256 _CYHAL_TRIGGER_TCPWM0_TR_OUT061, 257 _CYHAL_TRIGGER_TCPWM0_TR_OUT062, 258 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT0, 259 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT1, 260 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT2, 261 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT0, 262 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT1, 263 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT2, 264 }; 265 266 const _cyhal_trigger_source_tviibe1m_t cyhal_mux4_sources[94] = 267 { 268 _CYHAL_TRIGGER_CPUSS_ZERO, 269 _CYHAL_TRIGGER_TCPWM0_TR_OUT0512, 270 _CYHAL_TRIGGER_TCPWM0_TR_OUT0513, 271 _CYHAL_TRIGGER_TCPWM0_TR_OUT0514, 272 _CYHAL_TRIGGER_TCPWM0_TR_OUT0515, 273 _CYHAL_TRIGGER_TCPWM0_TR_OUT0256, 274 _CYHAL_TRIGGER_TCPWM0_TR_OUT0257, 275 _CYHAL_TRIGGER_TCPWM0_TR_OUT0258, 276 _CYHAL_TRIGGER_TCPWM0_TR_OUT0259, 277 _CYHAL_TRIGGER_TCPWM0_TR_OUT0260, 278 _CYHAL_TRIGGER_TCPWM0_TR_OUT0261, 279 _CYHAL_TRIGGER_TCPWM0_TR_OUT0262, 280 _CYHAL_TRIGGER_TCPWM0_TR_OUT0263, 281 _CYHAL_TRIGGER_TCPWM0_TR_OUT0264, 282 _CYHAL_TRIGGER_TCPWM0_TR_OUT0265, 283 _CYHAL_TRIGGER_TCPWM0_TR_OUT0266, 284 _CYHAL_TRIGGER_TCPWM0_TR_OUT0267, 285 _CYHAL_TRIGGER_TCPWM0_TR_OUT00, 286 _CYHAL_TRIGGER_TCPWM0_TR_OUT01, 287 _CYHAL_TRIGGER_TCPWM0_TR_OUT02, 288 _CYHAL_TRIGGER_TCPWM0_TR_OUT03, 289 _CYHAL_TRIGGER_TCPWM0_TR_OUT04, 290 _CYHAL_TRIGGER_TCPWM0_TR_OUT05, 291 _CYHAL_TRIGGER_TCPWM0_TR_OUT06, 292 _CYHAL_TRIGGER_TCPWM0_TR_OUT07, 293 _CYHAL_TRIGGER_TCPWM0_TR_OUT08, 294 _CYHAL_TRIGGER_TCPWM0_TR_OUT09, 295 _CYHAL_TRIGGER_TCPWM0_TR_OUT010, 296 _CYHAL_TRIGGER_TCPWM0_TR_OUT011, 297 _CYHAL_TRIGGER_TCPWM0_TR_OUT012, 298 _CYHAL_TRIGGER_TCPWM0_TR_OUT013, 299 _CYHAL_TRIGGER_TCPWM0_TR_OUT014, 300 _CYHAL_TRIGGER_TCPWM0_TR_OUT015, 301 _CYHAL_TRIGGER_TCPWM0_TR_OUT016, 302 _CYHAL_TRIGGER_TCPWM0_TR_OUT017, 303 _CYHAL_TRIGGER_TCPWM0_TR_OUT018, 304 _CYHAL_TRIGGER_TCPWM0_TR_OUT019, 305 _CYHAL_TRIGGER_TCPWM0_TR_OUT020, 306 _CYHAL_TRIGGER_TCPWM0_TR_OUT021, 307 _CYHAL_TRIGGER_TCPWM0_TR_OUT022, 308 _CYHAL_TRIGGER_TCPWM0_TR_OUT023, 309 _CYHAL_TRIGGER_TCPWM0_TR_OUT024, 310 _CYHAL_TRIGGER_TCPWM0_TR_OUT025, 311 _CYHAL_TRIGGER_TCPWM0_TR_OUT026, 312 _CYHAL_TRIGGER_TCPWM0_TR_OUT027, 313 _CYHAL_TRIGGER_TCPWM0_TR_OUT028, 314 _CYHAL_TRIGGER_TCPWM0_TR_OUT029, 315 _CYHAL_TRIGGER_TCPWM0_TR_OUT030, 316 _CYHAL_TRIGGER_TCPWM0_TR_OUT031, 317 _CYHAL_TRIGGER_TCPWM0_TR_OUT032, 318 _CYHAL_TRIGGER_TCPWM0_TR_OUT033, 319 _CYHAL_TRIGGER_TCPWM0_TR_OUT034, 320 _CYHAL_TRIGGER_TCPWM0_TR_OUT035, 321 _CYHAL_TRIGGER_TCPWM0_TR_OUT036, 322 _CYHAL_TRIGGER_TCPWM0_TR_OUT037, 323 _CYHAL_TRIGGER_TCPWM0_TR_OUT038, 324 _CYHAL_TRIGGER_TCPWM0_TR_OUT039, 325 _CYHAL_TRIGGER_TCPWM0_TR_OUT040, 326 _CYHAL_TRIGGER_TCPWM0_TR_OUT041, 327 _CYHAL_TRIGGER_TCPWM0_TR_OUT042, 328 _CYHAL_TRIGGER_TCPWM0_TR_OUT043, 329 _CYHAL_TRIGGER_TCPWM0_TR_OUT044, 330 _CYHAL_TRIGGER_TCPWM0_TR_OUT045, 331 _CYHAL_TRIGGER_TCPWM0_TR_OUT046, 332 _CYHAL_TRIGGER_TCPWM0_TR_OUT047, 333 _CYHAL_TRIGGER_TCPWM0_TR_OUT048, 334 _CYHAL_TRIGGER_TCPWM0_TR_OUT049, 335 _CYHAL_TRIGGER_TCPWM0_TR_OUT050, 336 _CYHAL_TRIGGER_TCPWM0_TR_OUT051, 337 _CYHAL_TRIGGER_TCPWM0_TR_OUT052, 338 _CYHAL_TRIGGER_TCPWM0_TR_OUT053, 339 _CYHAL_TRIGGER_TCPWM0_TR_OUT054, 340 _CYHAL_TRIGGER_TCPWM0_TR_OUT055, 341 _CYHAL_TRIGGER_TCPWM0_TR_OUT056, 342 _CYHAL_TRIGGER_TCPWM0_TR_OUT057, 343 _CYHAL_TRIGGER_TCPWM0_TR_OUT058, 344 _CYHAL_TRIGGER_TCPWM0_TR_OUT059, 345 _CYHAL_TRIGGER_TCPWM0_TR_OUT060, 346 _CYHAL_TRIGGER_TCPWM0_TR_OUT061, 347 _CYHAL_TRIGGER_TCPWM0_TR_OUT062, 348 _CYHAL_TRIGGER_TCPWM0_TR_OUT10, 349 _CYHAL_TRIGGER_TCPWM0_TR_OUT11, 350 _CYHAL_TRIGGER_TCPWM0_TR_OUT12, 351 _CYHAL_TRIGGER_TCPWM0_TR_OUT13, 352 _CYHAL_TRIGGER_TCPWM0_TR_OUT14, 353 _CYHAL_TRIGGER_TCPWM0_TR_OUT15, 354 _CYHAL_TRIGGER_TCPWM0_TR_OUT16, 355 _CYHAL_TRIGGER_TCPWM0_TR_OUT17, 356 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT0, 357 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT1, 358 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT2, 359 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT0, 360 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT1, 361 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT2, 362 }; 363 364 const _cyhal_trigger_source_tviibe1m_t cyhal_mux5_sources[123] = 365 { 366 _CYHAL_TRIGGER_CPUSS_ZERO, 367 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 368 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 369 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 370 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 371 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 372 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 373 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 374 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 375 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 376 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 377 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 378 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 379 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 380 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 381 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 382 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 383 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 384 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 385 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 386 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 387 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 388 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 389 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 390 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 391 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 392 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 393 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 394 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 395 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 396 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 397 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 398 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 399 _CYHAL_TRIGGER_CPUSS_TR_FAULT2, 400 _CYHAL_TRIGGER_CPUSS_TR_FAULT3, 401 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT0, 402 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT1, 403 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT2, 404 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT3, 405 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT4, 406 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT5, 407 _CYHAL_TRIGGER_PERI_TR_IO_INPUT0, 408 _CYHAL_TRIGGER_PERI_TR_IO_INPUT1, 409 _CYHAL_TRIGGER_PERI_TR_IO_INPUT2, 410 _CYHAL_TRIGGER_PERI_TR_IO_INPUT3, 411 _CYHAL_TRIGGER_PERI_TR_IO_INPUT4, 412 _CYHAL_TRIGGER_PERI_TR_IO_INPUT5, 413 _CYHAL_TRIGGER_PERI_TR_IO_INPUT6, 414 _CYHAL_TRIGGER_PERI_TR_IO_INPUT7, 415 _CYHAL_TRIGGER_PERI_TR_IO_INPUT8, 416 _CYHAL_TRIGGER_PERI_TR_IO_INPUT9, 417 _CYHAL_TRIGGER_PERI_TR_IO_INPUT10, 418 _CYHAL_TRIGGER_PERI_TR_IO_INPUT11, 419 _CYHAL_TRIGGER_PERI_TR_IO_INPUT12, 420 _CYHAL_TRIGGER_PERI_TR_IO_INPUT13, 421 _CYHAL_TRIGGER_PERI_TR_IO_INPUT14, 422 _CYHAL_TRIGGER_PERI_TR_IO_INPUT15, 423 _CYHAL_TRIGGER_PERI_TR_IO_INPUT16, 424 _CYHAL_TRIGGER_PERI_TR_IO_INPUT17, 425 _CYHAL_TRIGGER_PERI_TR_IO_INPUT18, 426 _CYHAL_TRIGGER_PERI_TR_IO_INPUT19, 427 _CYHAL_TRIGGER_PERI_TR_IO_INPUT20, 428 _CYHAL_TRIGGER_PERI_TR_IO_INPUT21, 429 _CYHAL_TRIGGER_PERI_TR_IO_INPUT22, 430 _CYHAL_TRIGGER_PERI_TR_IO_INPUT23, 431 _CYHAL_TRIGGER_PERI_TR_IO_INPUT24, 432 _CYHAL_TRIGGER_PERI_TR_IO_INPUT25, 433 _CYHAL_TRIGGER_PERI_TR_IO_INPUT26, 434 _CYHAL_TRIGGER_PERI_TR_IO_INPUT27, 435 _CYHAL_TRIGGER_PERI_TR_IO_INPUT28, 436 _CYHAL_TRIGGER_PERI_TR_IO_INPUT29, 437 _CYHAL_TRIGGER_PERI_TR_IO_INPUT30, 438 _CYHAL_TRIGGER_PERI_TR_IO_INPUT31, 439 _CYHAL_TRIGGER_SCB0_TR_TX_REQ, 440 _CYHAL_TRIGGER_SCB0_TR_RX_REQ, 441 _CYHAL_TRIGGER_SCB0_TR_I2C_SCL_FILTERED, 442 _CYHAL_TRIGGER_SCB1_TR_TX_REQ, 443 _CYHAL_TRIGGER_SCB1_TR_RX_REQ, 444 _CYHAL_TRIGGER_SCB1_TR_I2C_SCL_FILTERED, 445 _CYHAL_TRIGGER_SCB2_TR_TX_REQ, 446 _CYHAL_TRIGGER_SCB2_TR_RX_REQ, 447 _CYHAL_TRIGGER_SCB2_TR_I2C_SCL_FILTERED, 448 _CYHAL_TRIGGER_SCB3_TR_TX_REQ, 449 _CYHAL_TRIGGER_SCB3_TR_RX_REQ, 450 _CYHAL_TRIGGER_SCB3_TR_I2C_SCL_FILTERED, 451 _CYHAL_TRIGGER_SCB4_TR_TX_REQ, 452 _CYHAL_TRIGGER_SCB4_TR_RX_REQ, 453 _CYHAL_TRIGGER_SCB4_TR_I2C_SCL_FILTERED, 454 _CYHAL_TRIGGER_SCB5_TR_TX_REQ, 455 _CYHAL_TRIGGER_SCB5_TR_RX_REQ, 456 _CYHAL_TRIGGER_SCB5_TR_I2C_SCL_FILTERED, 457 _CYHAL_TRIGGER_SCB6_TR_TX_REQ, 458 _CYHAL_TRIGGER_SCB6_TR_RX_REQ, 459 _CYHAL_TRIGGER_SCB6_TR_I2C_SCL_FILTERED, 460 _CYHAL_TRIGGER_SCB7_TR_TX_REQ, 461 _CYHAL_TRIGGER_SCB7_TR_RX_REQ, 462 _CYHAL_TRIGGER_SCB7_TR_I2C_SCL_FILTERED, 463 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ0, 464 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ1, 465 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ2, 466 _CYHAL_TRIGGER_CANFD0_TR_FIFO00, 467 _CYHAL_TRIGGER_CANFD0_TR_FIFO01, 468 _CYHAL_TRIGGER_CANFD0_TR_FIFO02, 469 _CYHAL_TRIGGER_CANFD0_TR_FIFO10, 470 _CYHAL_TRIGGER_CANFD0_TR_FIFO11, 471 _CYHAL_TRIGGER_CANFD0_TR_FIFO12, 472 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ0, 473 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ1, 474 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ2, 475 _CYHAL_TRIGGER_CANFD1_TR_FIFO00, 476 _CYHAL_TRIGGER_CANFD1_TR_FIFO01, 477 _CYHAL_TRIGGER_CANFD1_TR_FIFO02, 478 _CYHAL_TRIGGER_CANFD1_TR_FIFO10, 479 _CYHAL_TRIGGER_CANFD1_TR_FIFO11, 480 _CYHAL_TRIGGER_CANFD1_TR_FIFO12, 481 _CYHAL_TRIGGER_EVTGEN0_TR_OUT3, 482 _CYHAL_TRIGGER_EVTGEN0_TR_OUT4, 483 _CYHAL_TRIGGER_EVTGEN0_TR_OUT5, 484 _CYHAL_TRIGGER_EVTGEN0_TR_OUT6, 485 _CYHAL_TRIGGER_EVTGEN0_TR_OUT7, 486 _CYHAL_TRIGGER_EVTGEN0_TR_OUT8, 487 _CYHAL_TRIGGER_EVTGEN0_TR_OUT9, 488 _CYHAL_TRIGGER_EVTGEN0_TR_OUT10, 489 }; 490 491 const _cyhal_trigger_source_tviibe1m_t cyhal_mux6_sources[80] = 492 { 493 _CYHAL_TRIGGER_CPUSS_ZERO, 494 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 495 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 496 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 497 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 498 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 499 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 500 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 501 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 502 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 503 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 504 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 505 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 506 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 507 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 508 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 509 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 510 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 511 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 512 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 513 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 514 _CYHAL_TRIGGER_CPUSS_TR_FAULT2, 515 _CYHAL_TRIGGER_CPUSS_TR_FAULT3, 516 _CYHAL_TRIGGER_EVTGEN0_TR_OUT0, 517 _CYHAL_TRIGGER_EVTGEN0_TR_OUT1, 518 _CYHAL_TRIGGER_EVTGEN0_TR_OUT2, 519 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT0, 520 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT1, 521 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT2, 522 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT3, 523 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT4, 524 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT5, 525 _CYHAL_TRIGGER_PERI_TR_IO_INPUT0, 526 _CYHAL_TRIGGER_PERI_TR_IO_INPUT1, 527 _CYHAL_TRIGGER_PERI_TR_IO_INPUT2, 528 _CYHAL_TRIGGER_PERI_TR_IO_INPUT3, 529 _CYHAL_TRIGGER_PERI_TR_IO_INPUT4, 530 _CYHAL_TRIGGER_PERI_TR_IO_INPUT5, 531 _CYHAL_TRIGGER_PERI_TR_IO_INPUT6, 532 _CYHAL_TRIGGER_PERI_TR_IO_INPUT7, 533 _CYHAL_TRIGGER_PERI_TR_IO_INPUT8, 534 _CYHAL_TRIGGER_PERI_TR_IO_INPUT9, 535 _CYHAL_TRIGGER_PERI_TR_IO_INPUT10, 536 _CYHAL_TRIGGER_PERI_TR_IO_INPUT11, 537 _CYHAL_TRIGGER_PERI_TR_IO_INPUT12, 538 _CYHAL_TRIGGER_PERI_TR_IO_INPUT13, 539 _CYHAL_TRIGGER_PERI_TR_IO_INPUT14, 540 _CYHAL_TRIGGER_PERI_TR_IO_INPUT15, 541 _CYHAL_TRIGGER_PERI_TR_IO_INPUT16, 542 _CYHAL_TRIGGER_PERI_TR_IO_INPUT17, 543 _CYHAL_TRIGGER_PERI_TR_IO_INPUT18, 544 _CYHAL_TRIGGER_PERI_TR_IO_INPUT19, 545 _CYHAL_TRIGGER_PERI_TR_IO_INPUT20, 546 _CYHAL_TRIGGER_PERI_TR_IO_INPUT21, 547 _CYHAL_TRIGGER_PERI_TR_IO_INPUT22, 548 _CYHAL_TRIGGER_PERI_TR_IO_INPUT23, 549 _CYHAL_TRIGGER_PERI_TR_IO_INPUT24, 550 _CYHAL_TRIGGER_PERI_TR_IO_INPUT25, 551 _CYHAL_TRIGGER_PERI_TR_IO_INPUT26, 552 _CYHAL_TRIGGER_PERI_TR_IO_INPUT27, 553 _CYHAL_TRIGGER_PERI_TR_IO_INPUT28, 554 _CYHAL_TRIGGER_PERI_TR_IO_INPUT29, 555 _CYHAL_TRIGGER_PERI_TR_IO_INPUT30, 556 _CYHAL_TRIGGER_PERI_TR_IO_INPUT31, 557 _CYHAL_TRIGGER_TCPWM0_TR_OUT1512, 558 _CYHAL_TRIGGER_TCPWM0_TR_OUT1513, 559 _CYHAL_TRIGGER_TCPWM0_TR_OUT1514, 560 _CYHAL_TRIGGER_TCPWM0_TR_OUT1515, 561 _CYHAL_TRIGGER_TCPWM0_TR_OUT1256, 562 _CYHAL_TRIGGER_TCPWM0_TR_OUT1257, 563 _CYHAL_TRIGGER_TCPWM0_TR_OUT1258, 564 _CYHAL_TRIGGER_TCPWM0_TR_OUT1259, 565 _CYHAL_TRIGGER_TCPWM0_TR_OUT1260, 566 _CYHAL_TRIGGER_TCPWM0_TR_OUT1261, 567 _CYHAL_TRIGGER_TCPWM0_TR_OUT1262, 568 _CYHAL_TRIGGER_TCPWM0_TR_OUT1263, 569 _CYHAL_TRIGGER_TCPWM0_TR_OUT1264, 570 _CYHAL_TRIGGER_TCPWM0_TR_OUT1265, 571 _CYHAL_TRIGGER_TCPWM0_TR_OUT1266, 572 _CYHAL_TRIGGER_TCPWM0_TR_OUT1267, 573 }; 574 575 const _cyhal_trigger_source_tviibe1m_t cyhal_mux7_sources[7] = 576 { 577 _CYHAL_TRIGGER_CPUSS_ZERO, 578 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT0, 579 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT1, 580 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT2, 581 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT0, 582 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT1, 583 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT2, 584 }; 585 586 const _cyhal_trigger_source_tviibe1m_t cyhal_mux8_sources[11] = 587 { 588 _CYHAL_TRIGGER_CPUSS_ZERO, 589 _CYHAL_TRIGGER_TR_GROUP9_OUTPUT0, 590 _CYHAL_TRIGGER_TR_GROUP9_OUTPUT1, 591 _CYHAL_TRIGGER_TR_GROUP9_OUTPUT2, 592 _CYHAL_TRIGGER_TR_GROUP9_OUTPUT3, 593 _CYHAL_TRIGGER_TR_GROUP9_OUTPUT4, 594 _CYHAL_TRIGGER_TR_GROUP10_OUTPUT0, 595 _CYHAL_TRIGGER_TR_GROUP10_OUTPUT1, 596 _CYHAL_TRIGGER_TR_GROUP10_OUTPUT2, 597 _CYHAL_TRIGGER_TR_GROUP10_OUTPUT3, 598 _CYHAL_TRIGGER_TR_GROUP10_OUTPUT4, 599 }; 600 601 const _cyhal_trigger_source_tviibe1m_t cyhal_mux9_sources[223] = 602 { 603 _CYHAL_TRIGGER_CPUSS_ZERO, 604 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, 605 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, 606 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, 607 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, 608 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, 609 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, 610 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, 611 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, 612 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, 613 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, 614 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, 615 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, 616 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, 617 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, 618 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, 619 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, 620 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT16, 621 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT17, 622 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT18, 623 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT19, 624 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT20, 625 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT21, 626 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT22, 627 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT23, 628 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT24, 629 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT25, 630 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT26, 631 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT27, 632 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT28, 633 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT29, 634 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT30, 635 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT31, 636 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT32, 637 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT33, 638 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT34, 639 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT35, 640 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT36, 641 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT37, 642 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT38, 643 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT39, 644 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT40, 645 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT41, 646 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT42, 647 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT43, 648 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT44, 649 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT45, 650 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT46, 651 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT47, 652 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT48, 653 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT49, 654 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT50, 655 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT51, 656 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT52, 657 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT53, 658 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT54, 659 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT55, 660 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT56, 661 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT57, 662 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT58, 663 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT59, 664 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT60, 665 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT61, 666 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT62, 667 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT63, 668 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT64, 669 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT65, 670 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT66, 671 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT67, 672 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT68, 673 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT69, 674 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT70, 675 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT71, 676 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT72, 677 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT73, 678 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT74, 679 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT75, 680 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT76, 681 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT77, 682 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT78, 683 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT79, 684 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT80, 685 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT81, 686 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT82, 687 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT83, 688 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT84, 689 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT85, 690 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT86, 691 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT87, 692 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT88, 693 _CYHAL_TRIGGER_SCB0_TR_TX_REQ, 694 _CYHAL_TRIGGER_SCB1_TR_TX_REQ, 695 _CYHAL_TRIGGER_SCB2_TR_TX_REQ, 696 _CYHAL_TRIGGER_SCB3_TR_TX_REQ, 697 _CYHAL_TRIGGER_SCB4_TR_TX_REQ, 698 _CYHAL_TRIGGER_SCB5_TR_TX_REQ, 699 _CYHAL_TRIGGER_SCB6_TR_TX_REQ, 700 _CYHAL_TRIGGER_SCB7_TR_TX_REQ, 701 _CYHAL_TRIGGER_SCB0_TR_RX_REQ, 702 _CYHAL_TRIGGER_SCB1_TR_RX_REQ, 703 _CYHAL_TRIGGER_SCB2_TR_RX_REQ, 704 _CYHAL_TRIGGER_SCB3_TR_RX_REQ, 705 _CYHAL_TRIGGER_SCB4_TR_RX_REQ, 706 _CYHAL_TRIGGER_SCB5_TR_RX_REQ, 707 _CYHAL_TRIGGER_SCB6_TR_RX_REQ, 708 _CYHAL_TRIGGER_SCB7_TR_RX_REQ, 709 _CYHAL_TRIGGER_SCB0_TR_I2C_SCL_FILTERED, 710 _CYHAL_TRIGGER_SCB1_TR_I2C_SCL_FILTERED, 711 _CYHAL_TRIGGER_SCB2_TR_I2C_SCL_FILTERED, 712 _CYHAL_TRIGGER_SCB3_TR_I2C_SCL_FILTERED, 713 _CYHAL_TRIGGER_SCB4_TR_I2C_SCL_FILTERED, 714 _CYHAL_TRIGGER_SCB5_TR_I2C_SCL_FILTERED, 715 _CYHAL_TRIGGER_SCB6_TR_I2C_SCL_FILTERED, 716 _CYHAL_TRIGGER_SCB7_TR_I2C_SCL_FILTERED, 717 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ0, 718 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ1, 719 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ2, 720 _CYHAL_TRIGGER_CANFD0_TR_FIFO00, 721 _CYHAL_TRIGGER_CANFD0_TR_FIFO01, 722 _CYHAL_TRIGGER_CANFD0_TR_FIFO02, 723 _CYHAL_TRIGGER_CANFD0_TR_FIFO10, 724 _CYHAL_TRIGGER_CANFD0_TR_FIFO11, 725 _CYHAL_TRIGGER_CANFD0_TR_FIFO12, 726 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT0, 727 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT1, 728 _CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT2, 729 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ0, 730 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ1, 731 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ2, 732 _CYHAL_TRIGGER_CANFD1_TR_FIFO00, 733 _CYHAL_TRIGGER_CANFD1_TR_FIFO01, 734 _CYHAL_TRIGGER_CANFD1_TR_FIFO02, 735 _CYHAL_TRIGGER_CANFD1_TR_FIFO10, 736 _CYHAL_TRIGGER_CANFD1_TR_FIFO11, 737 _CYHAL_TRIGGER_CANFD1_TR_FIFO12, 738 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT0, 739 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT1, 740 _CYHAL_TRIGGER_CANFD1_TR_TMP_RTP_OUT2, 741 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT0, 742 _CYHAL_TRIGGER_CPUSS_CTI_TR_OUT1, 743 _CYHAL_TRIGGER_CPUSS_TR_FAULT0, 744 _CYHAL_TRIGGER_CPUSS_TR_FAULT1, 745 _CYHAL_TRIGGER_CPUSS_TR_FAULT2, 746 _CYHAL_TRIGGER_CPUSS_TR_FAULT3, 747 _CYHAL_TRIGGER_TCPWM0_TR_OUT0512, 748 _CYHAL_TRIGGER_TCPWM0_TR_OUT0513, 749 _CYHAL_TRIGGER_TCPWM0_TR_OUT0514, 750 _CYHAL_TRIGGER_TCPWM0_TR_OUT0515, 751 _CYHAL_TRIGGER_TCPWM0_TR_OUT0256, 752 _CYHAL_TRIGGER_TCPWM0_TR_OUT0257, 753 _CYHAL_TRIGGER_TCPWM0_TR_OUT0258, 754 _CYHAL_TRIGGER_TCPWM0_TR_OUT0259, 755 _CYHAL_TRIGGER_TCPWM0_TR_OUT0260, 756 _CYHAL_TRIGGER_TCPWM0_TR_OUT0261, 757 _CYHAL_TRIGGER_TCPWM0_TR_OUT0262, 758 _CYHAL_TRIGGER_TCPWM0_TR_OUT0263, 759 _CYHAL_TRIGGER_TCPWM0_TR_OUT0264, 760 _CYHAL_TRIGGER_TCPWM0_TR_OUT0265, 761 _CYHAL_TRIGGER_TCPWM0_TR_OUT0266, 762 _CYHAL_TRIGGER_TCPWM0_TR_OUT0267, 763 _CYHAL_TRIGGER_TCPWM0_TR_OUT00, 764 _CYHAL_TRIGGER_TCPWM0_TR_OUT01, 765 _CYHAL_TRIGGER_TCPWM0_TR_OUT02, 766 _CYHAL_TRIGGER_TCPWM0_TR_OUT03, 767 _CYHAL_TRIGGER_TCPWM0_TR_OUT04, 768 _CYHAL_TRIGGER_TCPWM0_TR_OUT05, 769 _CYHAL_TRIGGER_TCPWM0_TR_OUT06, 770 _CYHAL_TRIGGER_TCPWM0_TR_OUT07, 771 _CYHAL_TRIGGER_TCPWM0_TR_OUT08, 772 _CYHAL_TRIGGER_TCPWM0_TR_OUT09, 773 _CYHAL_TRIGGER_TCPWM0_TR_OUT010, 774 _CYHAL_TRIGGER_TCPWM0_TR_OUT011, 775 _CYHAL_TRIGGER_TCPWM0_TR_OUT012, 776 _CYHAL_TRIGGER_TCPWM0_TR_OUT013, 777 _CYHAL_TRIGGER_TCPWM0_TR_OUT014, 778 _CYHAL_TRIGGER_TCPWM0_TR_OUT015, 779 _CYHAL_TRIGGER_TCPWM0_TR_OUT016, 780 _CYHAL_TRIGGER_TCPWM0_TR_OUT017, 781 _CYHAL_TRIGGER_TCPWM0_TR_OUT018, 782 _CYHAL_TRIGGER_TCPWM0_TR_OUT019, 783 _CYHAL_TRIGGER_TCPWM0_TR_OUT020, 784 _CYHAL_TRIGGER_TCPWM0_TR_OUT021, 785 _CYHAL_TRIGGER_TCPWM0_TR_OUT022, 786 _CYHAL_TRIGGER_TCPWM0_TR_OUT023, 787 _CYHAL_TRIGGER_TCPWM0_TR_OUT024, 788 _CYHAL_TRIGGER_TCPWM0_TR_OUT025, 789 _CYHAL_TRIGGER_TCPWM0_TR_OUT026, 790 _CYHAL_TRIGGER_TCPWM0_TR_OUT027, 791 _CYHAL_TRIGGER_TCPWM0_TR_OUT028, 792 _CYHAL_TRIGGER_TCPWM0_TR_OUT029, 793 _CYHAL_TRIGGER_TCPWM0_TR_OUT030, 794 _CYHAL_TRIGGER_TCPWM0_TR_OUT031, 795 _CYHAL_TRIGGER_TCPWM0_TR_OUT032, 796 _CYHAL_TRIGGER_TCPWM0_TR_OUT033, 797 _CYHAL_TRIGGER_TCPWM0_TR_OUT034, 798 _CYHAL_TRIGGER_TCPWM0_TR_OUT035, 799 _CYHAL_TRIGGER_TCPWM0_TR_OUT036, 800 _CYHAL_TRIGGER_TCPWM0_TR_OUT037, 801 _CYHAL_TRIGGER_TCPWM0_TR_OUT038, 802 _CYHAL_TRIGGER_TCPWM0_TR_OUT039, 803 _CYHAL_TRIGGER_TCPWM0_TR_OUT040, 804 _CYHAL_TRIGGER_TCPWM0_TR_OUT041, 805 _CYHAL_TRIGGER_TCPWM0_TR_OUT042, 806 _CYHAL_TRIGGER_TCPWM0_TR_OUT043, 807 _CYHAL_TRIGGER_TCPWM0_TR_OUT044, 808 _CYHAL_TRIGGER_TCPWM0_TR_OUT045, 809 _CYHAL_TRIGGER_TCPWM0_TR_OUT046, 810 _CYHAL_TRIGGER_TCPWM0_TR_OUT047, 811 _CYHAL_TRIGGER_TCPWM0_TR_OUT048, 812 _CYHAL_TRIGGER_TCPWM0_TR_OUT049, 813 _CYHAL_TRIGGER_TCPWM0_TR_OUT050, 814 _CYHAL_TRIGGER_TCPWM0_TR_OUT051, 815 _CYHAL_TRIGGER_TCPWM0_TR_OUT052, 816 _CYHAL_TRIGGER_TCPWM0_TR_OUT053, 817 _CYHAL_TRIGGER_TCPWM0_TR_OUT054, 818 _CYHAL_TRIGGER_TCPWM0_TR_OUT055, 819 _CYHAL_TRIGGER_TCPWM0_TR_OUT056, 820 _CYHAL_TRIGGER_TCPWM0_TR_OUT057, 821 _CYHAL_TRIGGER_TCPWM0_TR_OUT058, 822 _CYHAL_TRIGGER_TCPWM0_TR_OUT059, 823 _CYHAL_TRIGGER_TCPWM0_TR_OUT060, 824 _CYHAL_TRIGGER_TCPWM0_TR_OUT061, 825 _CYHAL_TRIGGER_TCPWM0_TR_OUT062, 826 }; 827 828 const _cyhal_trigger_source_tviibe1m_t cyhal_mux10_sources[134] = 829 { 830 _CYHAL_TRIGGER_CPUSS_ZERO, 831 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, 832 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, 833 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, 834 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, 835 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, 836 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, 837 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, 838 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, 839 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT8, 840 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT9, 841 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT10, 842 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT11, 843 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT12, 844 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT13, 845 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT14, 846 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT15, 847 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT16, 848 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT17, 849 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT18, 850 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT19, 851 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT20, 852 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT21, 853 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT22, 854 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT23, 855 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT24, 856 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT25, 857 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT26, 858 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT27, 859 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT28, 860 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT29, 861 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT30, 862 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT31, 863 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT32, 864 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT0, 865 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT1, 866 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT2, 867 _CYHAL_TRIGGER_CPUSS_DMAC_TR_OUT3, 868 _CYHAL_TRIGGER_TCPWM0_TR_OUT1512, 869 _CYHAL_TRIGGER_TCPWM0_TR_OUT1513, 870 _CYHAL_TRIGGER_TCPWM0_TR_OUT1514, 871 _CYHAL_TRIGGER_TCPWM0_TR_OUT1515, 872 _CYHAL_TRIGGER_TCPWM0_TR_OUT1256, 873 _CYHAL_TRIGGER_TCPWM0_TR_OUT1257, 874 _CYHAL_TRIGGER_TCPWM0_TR_OUT1258, 875 _CYHAL_TRIGGER_TCPWM0_TR_OUT1259, 876 _CYHAL_TRIGGER_TCPWM0_TR_OUT1260, 877 _CYHAL_TRIGGER_TCPWM0_TR_OUT1261, 878 _CYHAL_TRIGGER_TCPWM0_TR_OUT1262, 879 _CYHAL_TRIGGER_TCPWM0_TR_OUT1263, 880 _CYHAL_TRIGGER_TCPWM0_TR_OUT1264, 881 _CYHAL_TRIGGER_TCPWM0_TR_OUT1265, 882 _CYHAL_TRIGGER_TCPWM0_TR_OUT1266, 883 _CYHAL_TRIGGER_TCPWM0_TR_OUT1267, 884 _CYHAL_TRIGGER_TCPWM0_TR_OUT10, 885 _CYHAL_TRIGGER_TCPWM0_TR_OUT11, 886 _CYHAL_TRIGGER_TCPWM0_TR_OUT12, 887 _CYHAL_TRIGGER_TCPWM0_TR_OUT13, 888 _CYHAL_TRIGGER_TCPWM0_TR_OUT14, 889 _CYHAL_TRIGGER_TCPWM0_TR_OUT15, 890 _CYHAL_TRIGGER_TCPWM0_TR_OUT16, 891 _CYHAL_TRIGGER_TCPWM0_TR_OUT17, 892 _CYHAL_TRIGGER_TCPWM0_TR_OUT18, 893 _CYHAL_TRIGGER_TCPWM0_TR_OUT19, 894 _CYHAL_TRIGGER_TCPWM0_TR_OUT110, 895 _CYHAL_TRIGGER_TCPWM0_TR_OUT111, 896 _CYHAL_TRIGGER_TCPWM0_TR_OUT112, 897 _CYHAL_TRIGGER_TCPWM0_TR_OUT113, 898 _CYHAL_TRIGGER_TCPWM0_TR_OUT114, 899 _CYHAL_TRIGGER_TCPWM0_TR_OUT115, 900 _CYHAL_TRIGGER_TCPWM0_TR_OUT116, 901 _CYHAL_TRIGGER_TCPWM0_TR_OUT117, 902 _CYHAL_TRIGGER_TCPWM0_TR_OUT118, 903 _CYHAL_TRIGGER_TCPWM0_TR_OUT119, 904 _CYHAL_TRIGGER_TCPWM0_TR_OUT120, 905 _CYHAL_TRIGGER_TCPWM0_TR_OUT121, 906 _CYHAL_TRIGGER_TCPWM0_TR_OUT122, 907 _CYHAL_TRIGGER_TCPWM0_TR_OUT123, 908 _CYHAL_TRIGGER_TCPWM0_TR_OUT124, 909 _CYHAL_TRIGGER_TCPWM0_TR_OUT125, 910 _CYHAL_TRIGGER_TCPWM0_TR_OUT126, 911 _CYHAL_TRIGGER_TCPWM0_TR_OUT127, 912 _CYHAL_TRIGGER_TCPWM0_TR_OUT128, 913 _CYHAL_TRIGGER_TCPWM0_TR_OUT129, 914 _CYHAL_TRIGGER_TCPWM0_TR_OUT130, 915 _CYHAL_TRIGGER_TCPWM0_TR_OUT131, 916 _CYHAL_TRIGGER_TCPWM0_TR_OUT132, 917 _CYHAL_TRIGGER_TCPWM0_TR_OUT133, 918 _CYHAL_TRIGGER_TCPWM0_TR_OUT134, 919 _CYHAL_TRIGGER_TCPWM0_TR_OUT135, 920 _CYHAL_TRIGGER_TCPWM0_TR_OUT136, 921 _CYHAL_TRIGGER_TCPWM0_TR_OUT137, 922 _CYHAL_TRIGGER_TCPWM0_TR_OUT138, 923 _CYHAL_TRIGGER_TCPWM0_TR_OUT139, 924 _CYHAL_TRIGGER_TCPWM0_TR_OUT140, 925 _CYHAL_TRIGGER_TCPWM0_TR_OUT141, 926 _CYHAL_TRIGGER_TCPWM0_TR_OUT142, 927 _CYHAL_TRIGGER_TCPWM0_TR_OUT143, 928 _CYHAL_TRIGGER_TCPWM0_TR_OUT144, 929 _CYHAL_TRIGGER_TCPWM0_TR_OUT145, 930 _CYHAL_TRIGGER_TCPWM0_TR_OUT146, 931 _CYHAL_TRIGGER_TCPWM0_TR_OUT147, 932 _CYHAL_TRIGGER_TCPWM0_TR_OUT148, 933 _CYHAL_TRIGGER_TCPWM0_TR_OUT149, 934 _CYHAL_TRIGGER_TCPWM0_TR_OUT150, 935 _CYHAL_TRIGGER_TCPWM0_TR_OUT151, 936 _CYHAL_TRIGGER_TCPWM0_TR_OUT152, 937 _CYHAL_TRIGGER_TCPWM0_TR_OUT153, 938 _CYHAL_TRIGGER_TCPWM0_TR_OUT154, 939 _CYHAL_TRIGGER_TCPWM0_TR_OUT155, 940 _CYHAL_TRIGGER_TCPWM0_TR_OUT156, 941 _CYHAL_TRIGGER_TCPWM0_TR_OUT157, 942 _CYHAL_TRIGGER_TCPWM0_TR_OUT158, 943 _CYHAL_TRIGGER_TCPWM0_TR_OUT159, 944 _CYHAL_TRIGGER_TCPWM0_TR_OUT160, 945 _CYHAL_TRIGGER_TCPWM0_TR_OUT161, 946 _CYHAL_TRIGGER_TCPWM0_TR_OUT162, 947 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT0, 948 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT1, 949 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT2, 950 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT3, 951 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT4, 952 _CYHAL_TRIGGER_PASS0_TR_SAR_GEN_OUT5, 953 _CYHAL_TRIGGER_EVTGEN0_TR_OUT0, 954 _CYHAL_TRIGGER_EVTGEN0_TR_OUT1, 955 _CYHAL_TRIGGER_EVTGEN0_TR_OUT2, 956 _CYHAL_TRIGGER_EVTGEN0_TR_OUT3, 957 _CYHAL_TRIGGER_EVTGEN0_TR_OUT4, 958 _CYHAL_TRIGGER_EVTGEN0_TR_OUT5, 959 _CYHAL_TRIGGER_EVTGEN0_TR_OUT6, 960 _CYHAL_TRIGGER_EVTGEN0_TR_OUT7, 961 _CYHAL_TRIGGER_EVTGEN0_TR_OUT8, 962 _CYHAL_TRIGGER_EVTGEN0_TR_OUT9, 963 _CYHAL_TRIGGER_EVTGEN0_TR_OUT10, 964 }; 965 966 const _cyhal_trigger_source_tviibe1m_t cyhal_mux11_sources[8] = 967 { 968 _CYHAL_TRIGGER_TCPWM0_TR_OUT00, 969 _CYHAL_TRIGGER_TCPWM0_TR_OUT01, 970 _CYHAL_TRIGGER_TCPWM0_TR_OUT02, 971 _CYHAL_TRIGGER_TCPWM0_TR_OUT03, 972 _CYHAL_TRIGGER_TCPWM0_TR_OUT04, 973 _CYHAL_TRIGGER_TCPWM0_TR_OUT05, 974 _CYHAL_TRIGGER_TCPWM0_TR_OUT06, 975 _CYHAL_TRIGGER_TCPWM0_TR_OUT07, 976 }; 977 978 const _cyhal_trigger_source_tviibe1m_t cyhal_mux12_sources[64] = 979 { 980 _CYHAL_TRIGGER_TCPWM0_TR_OUT1256, 981 _CYHAL_TRIGGER_TCPWM0_TR_OUT1259, 982 _CYHAL_TRIGGER_TCPWM0_TR_OUT1262, 983 _CYHAL_TRIGGER_TCPWM0_TR_OUT1265, 984 _CYHAL_TRIGGER_TCPWM0_TR_OUT10, 985 _CYHAL_TRIGGER_TCPWM0_TR_OUT11, 986 _CYHAL_TRIGGER_TCPWM0_TR_OUT12, 987 _CYHAL_TRIGGER_TCPWM0_TR_OUT13, 988 _CYHAL_TRIGGER_TCPWM0_TR_OUT14, 989 _CYHAL_TRIGGER_TCPWM0_TR_OUT15, 990 _CYHAL_TRIGGER_TCPWM0_TR_OUT16, 991 _CYHAL_TRIGGER_TCPWM0_TR_OUT17, 992 _CYHAL_TRIGGER_TCPWM0_TR_OUT18, 993 _CYHAL_TRIGGER_TCPWM0_TR_OUT19, 994 _CYHAL_TRIGGER_TCPWM0_TR_OUT110, 995 _CYHAL_TRIGGER_TCPWM0_TR_OUT111, 996 _CYHAL_TRIGGER_TCPWM0_TR_OUT112, 997 _CYHAL_TRIGGER_TCPWM0_TR_OUT113, 998 _CYHAL_TRIGGER_TCPWM0_TR_OUT114, 999 _CYHAL_TRIGGER_TCPWM0_TR_OUT115, 1000 _CYHAL_TRIGGER_TCPWM0_TR_OUT116, 1001 _CYHAL_TRIGGER_TCPWM0_TR_OUT117, 1002 _CYHAL_TRIGGER_TCPWM0_TR_OUT118, 1003 _CYHAL_TRIGGER_TCPWM0_TR_OUT119, 1004 _CYHAL_TRIGGER_TCPWM0_TR_OUT1257, 1005 _CYHAL_TRIGGER_TCPWM0_TR_OUT1260, 1006 _CYHAL_TRIGGER_TCPWM0_TR_OUT1263, 1007 _CYHAL_TRIGGER_TCPWM0_TR_OUT1266, 1008 _CYHAL_TRIGGER_TCPWM0_TR_OUT120, 1009 _CYHAL_TRIGGER_TCPWM0_TR_OUT121, 1010 _CYHAL_TRIGGER_TCPWM0_TR_OUT122, 1011 _CYHAL_TRIGGER_TCPWM0_TR_OUT123, 1012 _CYHAL_TRIGGER_TCPWM0_TR_OUT124, 1013 _CYHAL_TRIGGER_TCPWM0_TR_OUT125, 1014 _CYHAL_TRIGGER_TCPWM0_TR_OUT126, 1015 _CYHAL_TRIGGER_TCPWM0_TR_OUT127, 1016 _CYHAL_TRIGGER_TCPWM0_TR_OUT128, 1017 _CYHAL_TRIGGER_TCPWM0_TR_OUT129, 1018 _CYHAL_TRIGGER_TCPWM0_TR_OUT130, 1019 _CYHAL_TRIGGER_TCPWM0_TR_OUT131, 1020 _CYHAL_TRIGGER_TCPWM0_TR_OUT132, 1021 _CYHAL_TRIGGER_TCPWM0_TR_OUT133, 1022 _CYHAL_TRIGGER_TCPWM0_TR_OUT134, 1023 _CYHAL_TRIGGER_TCPWM0_TR_OUT135, 1024 _CYHAL_TRIGGER_TCPWM0_TR_OUT136, 1025 _CYHAL_TRIGGER_TCPWM0_TR_OUT137, 1026 _CYHAL_TRIGGER_TCPWM0_TR_OUT138, 1027 _CYHAL_TRIGGER_TCPWM0_TR_OUT139, 1028 _CYHAL_TRIGGER_TCPWM0_TR_OUT140, 1029 _CYHAL_TRIGGER_TCPWM0_TR_OUT141, 1030 _CYHAL_TRIGGER_TCPWM0_TR_OUT142, 1031 _CYHAL_TRIGGER_TCPWM0_TR_OUT143, 1032 _CYHAL_TRIGGER_TCPWM0_TR_OUT144, 1033 _CYHAL_TRIGGER_TCPWM0_TR_OUT145, 1034 _CYHAL_TRIGGER_TCPWM0_TR_OUT146, 1035 _CYHAL_TRIGGER_TCPWM0_TR_OUT147, 1036 _CYHAL_TRIGGER_TCPWM0_TR_OUT1258, 1037 _CYHAL_TRIGGER_TCPWM0_TR_OUT1261, 1038 _CYHAL_TRIGGER_TCPWM0_TR_OUT1264, 1039 _CYHAL_TRIGGER_TCPWM0_TR_OUT1267, 1040 _CYHAL_TRIGGER_TCPWM0_TR_OUT148, 1041 _CYHAL_TRIGGER_TCPWM0_TR_OUT149, 1042 _CYHAL_TRIGGER_TCPWM0_TR_OUT150, 1043 _CYHAL_TRIGGER_TCPWM0_TR_OUT151, 1044 }; 1045 1046 const _cyhal_trigger_source_tviibe1m_t cyhal_mux13_sources[64] = 1047 { 1048 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE0, 1049 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE1, 1050 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE2, 1051 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE3, 1052 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE4, 1053 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE5, 1054 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE6, 1055 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE7, 1056 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE8, 1057 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE9, 1058 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE10, 1059 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE11, 1060 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE12, 1061 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE13, 1062 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE14, 1063 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE15, 1064 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE16, 1065 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE17, 1066 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE18, 1067 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE19, 1068 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE20, 1069 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE21, 1070 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE22, 1071 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE23, 1072 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE32, 1073 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE33, 1074 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE34, 1075 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE35, 1076 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE36, 1077 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE37, 1078 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE38, 1079 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE39, 1080 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE40, 1081 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE41, 1082 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE42, 1083 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE43, 1084 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE44, 1085 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE45, 1086 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE46, 1087 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE47, 1088 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE48, 1089 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE49, 1090 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE50, 1091 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE51, 1092 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE52, 1093 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE53, 1094 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE54, 1095 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE55, 1096 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE56, 1097 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE57, 1098 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE58, 1099 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE59, 1100 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE60, 1101 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE61, 1102 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE62, 1103 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE63, 1104 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE64, 1105 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE65, 1106 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE66, 1107 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE67, 1108 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE68, 1109 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE69, 1110 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE70, 1111 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_DONE71, 1112 }; 1113 1114 const _cyhal_trigger_source_tviibe1m_t cyhal_mux14_sources[64] = 1115 { 1116 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO0, 1117 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO1, 1118 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO2, 1119 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO3, 1120 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO4, 1121 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO5, 1122 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO6, 1123 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO7, 1124 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO8, 1125 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO9, 1126 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO10, 1127 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO11, 1128 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO12, 1129 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO13, 1130 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO14, 1131 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO15, 1132 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO16, 1133 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO17, 1134 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO18, 1135 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO19, 1136 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO20, 1137 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO21, 1138 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO22, 1139 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO23, 1140 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO32, 1141 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO33, 1142 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO34, 1143 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO35, 1144 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO36, 1145 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO37, 1146 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO38, 1147 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO39, 1148 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO40, 1149 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO41, 1150 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO42, 1151 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO43, 1152 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO44, 1153 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO45, 1154 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO46, 1155 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO47, 1156 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO48, 1157 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO49, 1158 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO50, 1159 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO51, 1160 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO52, 1161 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO53, 1162 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO54, 1163 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO55, 1164 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO56, 1165 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO57, 1166 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO58, 1167 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO59, 1168 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO60, 1169 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO61, 1170 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO62, 1171 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO63, 1172 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO64, 1173 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO65, 1174 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO66, 1175 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO67, 1176 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO68, 1177 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO69, 1178 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO70, 1179 _CYHAL_TRIGGER_PASS0_TR_SAR_CH_RANGEVIO71, 1180 }; 1181 1182 const _cyhal_trigger_source_tviibe1m_t cyhal_mux15_sources[9] = 1183 { 1184 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ0, 1185 _CYHAL_TRIGGER_CANFD0_TR_FIFO00, 1186 _CYHAL_TRIGGER_CANFD0_TR_FIFO10, 1187 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ1, 1188 _CYHAL_TRIGGER_CANFD0_TR_FIFO01, 1189 _CYHAL_TRIGGER_CANFD0_TR_FIFO11, 1190 _CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ2, 1191 _CYHAL_TRIGGER_CANFD0_TR_FIFO02, 1192 _CYHAL_TRIGGER_CANFD0_TR_FIFO12, 1193 }; 1194 1195 const _cyhal_trigger_source_tviibe1m_t cyhal_mux16_sources[9] = 1196 { 1197 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ0, 1198 _CYHAL_TRIGGER_CANFD1_TR_FIFO00, 1199 _CYHAL_TRIGGER_CANFD1_TR_FIFO10, 1200 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ1, 1201 _CYHAL_TRIGGER_CANFD1_TR_FIFO01, 1202 _CYHAL_TRIGGER_CANFD1_TR_FIFO11, 1203 _CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_REQ2, 1204 _CYHAL_TRIGGER_CANFD1_TR_FIFO02, 1205 _CYHAL_TRIGGER_CANFD1_TR_FIFO12, 1206 }; 1207 1208 const _cyhal_trigger_source_tviibe1m_t cyhal_mux17_sources[3] = 1209 { 1210 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT16, 1211 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT19, 1212 _CYHAL_TRIGGER_CPUSS_DW0_TR_OUT22, 1213 }; 1214 1215 const _cyhal_trigger_source_tviibe1m_t cyhal_mux18_sources[3] = 1216 { 1217 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT24, 1218 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT27, 1219 _CYHAL_TRIGGER_CPUSS_DW1_TR_OUT30, 1220 }; 1221 1222 const _cyhal_trigger_source_tviibe1m_t cyhal_mux19_sources[16] = 1223 { 1224 _CYHAL_TRIGGER_SCB0_TR_TX_REQ, 1225 _CYHAL_TRIGGER_SCB0_TR_RX_REQ, 1226 _CYHAL_TRIGGER_SCB1_TR_TX_REQ, 1227 _CYHAL_TRIGGER_SCB1_TR_RX_REQ, 1228 _CYHAL_TRIGGER_SCB2_TR_TX_REQ, 1229 _CYHAL_TRIGGER_SCB2_TR_RX_REQ, 1230 _CYHAL_TRIGGER_SCB3_TR_TX_REQ, 1231 _CYHAL_TRIGGER_SCB3_TR_RX_REQ, 1232 _CYHAL_TRIGGER_SCB4_TR_TX_REQ, 1233 _CYHAL_TRIGGER_SCB4_TR_RX_REQ, 1234 _CYHAL_TRIGGER_SCB5_TR_TX_REQ, 1235 _CYHAL_TRIGGER_SCB5_TR_RX_REQ, 1236 _CYHAL_TRIGGER_SCB6_TR_TX_REQ, 1237 _CYHAL_TRIGGER_SCB6_TR_RX_REQ, 1238 _CYHAL_TRIGGER_SCB7_TR_TX_REQ, 1239 _CYHAL_TRIGGER_SCB7_TR_RX_REQ, 1240 }; 1241 1242 const _cyhal_trigger_source_tviibe1m_t* cyhal_mux_to_sources[20] = 1243 { 1244 cyhal_mux0_sources, 1245 cyhal_mux1_sources, 1246 cyhal_mux2_sources, 1247 cyhal_mux3_sources, 1248 cyhal_mux4_sources, 1249 cyhal_mux5_sources, 1250 cyhal_mux6_sources, 1251 cyhal_mux7_sources, 1252 cyhal_mux8_sources, 1253 cyhal_mux9_sources, 1254 cyhal_mux10_sources, 1255 cyhal_mux11_sources, 1256 cyhal_mux12_sources, 1257 cyhal_mux13_sources, 1258 cyhal_mux14_sources, 1259 cyhal_mux15_sources, 1260 cyhal_mux16_sources, 1261 cyhal_mux17_sources, 1262 cyhal_mux18_sources, 1263 cyhal_mux19_sources, 1264 }; 1265 1266 const uint8_t cyhal_dest_to_mux[333] = 1267 { 1268 134, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK0 */ 1269 134, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK1 */ 1270 134, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK2 */ 1271 135, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK0 */ 1272 135, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK1 */ 1273 135, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK2 */ 1274 7, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN0 */ 1275 7, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN1 */ 1276 7, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN2 */ 1277 7, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN0 */ 1278 7, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN1 */ 1279 7, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN2 */ 1280 8, /* CYHAL_TRIGGER_CPUSS_CTI_TR_IN0 */ 1281 8, /* CYHAL_TRIGGER_CPUSS_CTI_TR_IN1 */ 1282 2, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN0 */ 1283 2, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN1 */ 1284 2, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN2 */ 1285 2, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN3 */ 1286 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN0 */ 1287 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN1 */ 1288 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN2 */ 1289 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN3 */ 1290 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN4 */ 1291 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN5 */ 1292 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN6 */ 1293 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN7 */ 1294 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN8 */ 1295 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN9 */ 1296 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN10 */ 1297 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN11 */ 1298 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN12 */ 1299 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN13 */ 1300 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN14 */ 1301 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN15 */ 1302 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN16 */ 1303 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN17 */ 1304 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN18 */ 1305 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN19 */ 1306 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN20 */ 1307 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN21 */ 1308 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN22 */ 1309 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN23 */ 1310 132, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN24 */ 1311 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN25 */ 1312 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN26 */ 1313 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN27 */ 1314 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN28 */ 1315 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN29 */ 1316 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN30 */ 1317 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN31 */ 1318 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN32 */ 1319 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN33 */ 1320 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN34 */ 1321 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN35 */ 1322 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN36 */ 1323 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN37 */ 1324 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN38 */ 1325 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN39 */ 1326 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN40 */ 1327 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN41 */ 1328 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN42 */ 1329 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN43 */ 1330 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN44 */ 1331 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN45 */ 1332 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN46 */ 1333 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN47 */ 1334 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN48 */ 1335 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN49 */ 1336 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN50 */ 1337 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN51 */ 1338 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN52 */ 1339 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN53 */ 1340 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN54 */ 1341 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN55 */ 1342 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN56 */ 1343 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN57 */ 1344 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN58 */ 1345 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN59 */ 1346 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN60 */ 1347 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN61 */ 1348 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN62 */ 1349 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN63 */ 1350 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN64 */ 1351 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN65 */ 1352 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN66 */ 1353 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN67 */ 1354 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN68 */ 1355 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN69 */ 1356 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN70 */ 1357 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN71 */ 1358 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN72 */ 1359 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN73 */ 1360 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN74 */ 1361 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN75 */ 1362 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN76 */ 1363 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN77 */ 1364 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN78 */ 1365 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN79 */ 1366 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN80 */ 1367 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN81 */ 1368 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN82 */ 1369 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN83 */ 1370 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN84 */ 1371 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN85 */ 1372 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN86 */ 1373 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN87 */ 1374 130, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN88 */ 1375 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN0 */ 1376 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN1 */ 1377 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN2 */ 1378 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN3 */ 1379 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN4 */ 1380 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN5 */ 1381 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN6 */ 1382 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN7 */ 1383 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN8 */ 1384 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN9 */ 1385 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN10 */ 1386 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN11 */ 1387 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN12 */ 1388 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN13 */ 1389 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN14 */ 1390 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN15 */ 1391 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN16 */ 1392 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN17 */ 1393 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN18 */ 1394 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN19 */ 1395 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN20 */ 1396 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN21 */ 1397 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN22 */ 1398 136, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN23 */ 1399 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN24 */ 1400 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN25 */ 1401 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN26 */ 1402 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN27 */ 1403 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN28 */ 1404 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN29 */ 1405 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN30 */ 1406 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN31 */ 1407 133, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN32 */ 1408 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER0 */ 1409 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER1 */ 1410 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER2 */ 1411 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER3 */ 1412 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER4 */ 1413 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER5 */ 1414 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER6 */ 1415 128, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER7 */ 1416 8, /* CYHAL_TRIGGER_PASS0_TR_DEBUG_FREEZE */ 1417 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN0 */ 1418 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN1 */ 1419 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN2 */ 1420 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN3 */ 1421 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN4 */ 1422 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN5 */ 1423 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN6 */ 1424 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN7 */ 1425 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN8 */ 1426 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN9 */ 1427 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN10 */ 1428 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN11 */ 1429 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN12 */ 1430 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN13 */ 1431 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN14 */ 1432 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN15 */ 1433 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN16 */ 1434 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN17 */ 1435 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN18 */ 1436 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN19 */ 1437 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN20 */ 1438 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN21 */ 1439 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN22 */ 1440 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN23 */ 1441 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN32 */ 1442 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN33 */ 1443 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN34 */ 1444 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN35 */ 1445 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN36 */ 1446 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN37 */ 1447 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN38 */ 1448 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN39 */ 1449 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN40 */ 1450 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN41 */ 1451 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN42 */ 1452 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN43 */ 1453 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN44 */ 1454 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN45 */ 1455 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN46 */ 1456 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN47 */ 1457 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN48 */ 1458 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN49 */ 1459 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN50 */ 1460 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN51 */ 1461 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN52 */ 1462 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN53 */ 1463 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN54 */ 1464 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN55 */ 1465 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN56 */ 1466 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN57 */ 1467 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN58 */ 1468 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN59 */ 1469 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN60 */ 1470 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN61 */ 1471 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN62 */ 1472 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN63 */ 1473 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN64 */ 1474 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN65 */ 1475 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN66 */ 1476 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN67 */ 1477 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN68 */ 1478 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN69 */ 1479 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN70 */ 1480 129, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN71 */ 1481 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN0 */ 1482 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN1 */ 1483 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN2 */ 1484 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN3 */ 1485 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN4 */ 1486 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN5 */ 1487 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN6 */ 1488 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN7 */ 1489 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN8 */ 1490 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN9 */ 1491 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN10 */ 1492 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN11 */ 1493 8, /* CYHAL_TRIGGER_PERI_TR_DBG_FREEZE */ 1494 8, /* CYHAL_TRIGGER_PERI_TR_IO_OUTPUT0 */ 1495 8, /* CYHAL_TRIGGER_PERI_TR_IO_OUTPUT1 */ 1496 8, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_MCWDT0 */ 1497 8, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_MCWDT1 */ 1498 8, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_WDT */ 1499 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN0 */ 1500 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN1 */ 1501 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN2 */ 1502 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN3 */ 1503 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN4 */ 1504 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN5 */ 1505 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN6 */ 1506 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN7 */ 1507 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN8 */ 1508 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN9 */ 1509 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN10 */ 1510 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN11 */ 1511 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN12 */ 1512 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN13 */ 1513 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN14 */ 1514 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN15 */ 1515 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN16 */ 1516 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN17 */ 1517 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN18 */ 1518 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN19 */ 1519 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN20 */ 1520 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN21 */ 1521 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN22 */ 1522 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN23 */ 1523 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN24 */ 1524 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN25 */ 1525 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN26 */ 1526 8, /* CYHAL_TRIGGER_TCPWM0_TR_DEBUG_FREEZE */ 1527 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN2 */ 1528 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN5 */ 1529 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN8 */ 1530 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN11 */ 1531 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN14 */ 1532 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN17 */ 1533 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN20 */ 1534 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN23 */ 1535 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN26 */ 1536 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN29 */ 1537 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN32 */ 1538 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN35 */ 1539 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN38 */ 1540 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN41 */ 1541 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN44 */ 1542 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN47 */ 1543 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN50 */ 1544 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN53 */ 1545 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN56 */ 1546 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN59 */ 1547 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN62 */ 1548 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN65 */ 1549 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN68 */ 1550 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN71 */ 1551 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN74 */ 1552 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN77 */ 1553 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN80 */ 1554 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN83 */ 1555 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN86 */ 1556 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN89 */ 1557 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN92 */ 1558 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN95 */ 1559 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN98 */ 1560 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN101 */ 1561 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN104 */ 1562 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN107 */ 1563 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN110 */ 1564 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN113 */ 1565 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN116 */ 1566 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN119 */ 1567 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN122 */ 1568 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN125 */ 1569 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN128 */ 1570 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN131 */ 1571 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN134 */ 1572 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN137 */ 1573 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN140 */ 1574 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN143 */ 1575 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN146 */ 1576 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN149 */ 1577 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN152 */ 1578 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN155 */ 1579 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN770 */ 1580 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN773 */ 1581 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN776 */ 1582 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN779 */ 1583 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN782 */ 1584 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN785 */ 1585 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN788 */ 1586 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN791 */ 1587 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN794 */ 1588 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN797 */ 1589 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN800 */ 1590 131, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN803 */ 1591 9, /* CYHAL_TRIGGER_TR_GROUP8_INPUT1 */ 1592 9, /* CYHAL_TRIGGER_TR_GROUP8_INPUT2 */ 1593 9, /* CYHAL_TRIGGER_TR_GROUP8_INPUT3 */ 1594 9, /* CYHAL_TRIGGER_TR_GROUP8_INPUT4 */ 1595 9, /* CYHAL_TRIGGER_TR_GROUP8_INPUT5 */ 1596 10, /* CYHAL_TRIGGER_TR_GROUP8_INPUT6 */ 1597 10, /* CYHAL_TRIGGER_TR_GROUP8_INPUT7 */ 1598 10, /* CYHAL_TRIGGER_TR_GROUP8_INPUT8 */ 1599 10, /* CYHAL_TRIGGER_TR_GROUP8_INPUT9 */ 1600 10, /* CYHAL_TRIGGER_TR_GROUP8_INPUT10 */ 1601 }; 1602 1603 const uint8_t cyhal_mux_dest_index[333] = 1604 { 1605 0, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK0 */ 1606 1, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK1 */ 1607 2, /* CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK2 */ 1608 0, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK0 */ 1609 1, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK1 */ 1610 2, /* CYHAL_TRIGGER_CANFD1_TR_DBG_DMA_ACK2 */ 1611 0, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN0 */ 1612 1, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN1 */ 1613 2, /* CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN2 */ 1614 3, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN0 */ 1615 4, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN1 */ 1616 5, /* CYHAL_TRIGGER_CANFD1_TR_EVT_SWT_IN2 */ 1617 2, /* CYHAL_TRIGGER_CPUSS_CTI_TR_IN0 */ 1618 3, /* CYHAL_TRIGGER_CPUSS_CTI_TR_IN1 */ 1619 0, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN0 */ 1620 1, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN1 */ 1621 2, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN2 */ 1622 3, /* CYHAL_TRIGGER_CPUSS_DMAC_TR_IN3 */ 1623 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN0 */ 1624 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN1 */ 1625 2, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN2 */ 1626 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN3 */ 1627 4, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN4 */ 1628 5, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN5 */ 1629 6, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN6 */ 1630 7, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN7 */ 1631 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN8 */ 1632 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN9 */ 1633 2, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN10 */ 1634 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN11 */ 1635 4, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN12 */ 1636 5, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN13 */ 1637 6, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN14 */ 1638 7, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN15 */ 1639 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN16 */ 1640 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN17 */ 1641 2, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN18 */ 1642 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN19 */ 1643 4, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN20 */ 1644 5, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN21 */ 1645 6, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN22 */ 1646 7, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN23 */ 1647 8, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN24 */ 1648 0, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN25 */ 1649 1, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN26 */ 1650 2, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN27 */ 1651 3, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN28 */ 1652 4, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN29 */ 1653 5, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN30 */ 1654 6, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN31 */ 1655 7, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN32 */ 1656 8, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN33 */ 1657 9, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN34 */ 1658 10, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN35 */ 1659 11, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN36 */ 1660 12, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN37 */ 1661 13, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN38 */ 1662 14, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN39 */ 1663 15, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN40 */ 1664 16, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN41 */ 1665 17, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN42 */ 1666 18, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN43 */ 1667 19, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN44 */ 1668 20, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN45 */ 1669 21, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN46 */ 1670 22, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN47 */ 1671 23, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN48 */ 1672 24, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN49 */ 1673 25, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN50 */ 1674 26, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN51 */ 1675 27, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN52 */ 1676 28, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN53 */ 1677 29, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN54 */ 1678 30, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN55 */ 1679 31, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN56 */ 1680 32, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN57 */ 1681 33, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN58 */ 1682 34, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN59 */ 1683 35, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN60 */ 1684 36, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN61 */ 1685 37, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN62 */ 1686 38, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN63 */ 1687 39, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN64 */ 1688 40, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN65 */ 1689 41, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN66 */ 1690 42, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN67 */ 1691 43, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN68 */ 1692 44, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN69 */ 1693 45, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN70 */ 1694 46, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN71 */ 1695 47, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN72 */ 1696 48, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN73 */ 1697 49, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN74 */ 1698 50, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN75 */ 1699 51, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN76 */ 1700 52, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN77 */ 1701 53, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN78 */ 1702 54, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN79 */ 1703 55, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN80 */ 1704 56, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN81 */ 1705 57, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN82 */ 1706 58, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN83 */ 1707 59, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN84 */ 1708 60, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN85 */ 1709 61, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN86 */ 1710 62, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN87 */ 1711 63, /* CYHAL_TRIGGER_CPUSS_DW0_TR_IN88 */ 1712 0, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN0 */ 1713 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN1 */ 1714 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN2 */ 1715 3, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN3 */ 1716 4, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN4 */ 1717 5, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN5 */ 1718 6, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN6 */ 1719 7, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN7 */ 1720 0, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN8 */ 1721 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN9 */ 1722 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN10 */ 1723 3, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN11 */ 1724 4, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN12 */ 1725 5, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN13 */ 1726 6, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN14 */ 1727 7, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN15 */ 1728 8, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN16 */ 1729 9, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN17 */ 1730 10, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN18 */ 1731 11, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN19 */ 1732 12, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN20 */ 1733 13, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN21 */ 1734 14, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN22 */ 1735 15, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN23 */ 1736 0, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN24 */ 1737 1, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN25 */ 1738 2, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN26 */ 1739 3, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN27 */ 1740 4, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN28 */ 1741 5, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN29 */ 1742 6, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN30 */ 1743 7, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN31 */ 1744 8, /* CYHAL_TRIGGER_CPUSS_DW1_TR_IN32 */ 1745 0, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER0 */ 1746 1, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER1 */ 1747 2, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER2 */ 1748 3, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER3 */ 1749 4, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER4 */ 1750 5, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER5 */ 1751 6, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER6 */ 1752 7, /* CYHAL_TRIGGER_LIN0_TR_CMD_TX_HEADER7 */ 1753 5, /* CYHAL_TRIGGER_PASS0_TR_DEBUG_FREEZE */ 1754 0, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN0 */ 1755 1, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN1 */ 1756 2, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN2 */ 1757 3, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN3 */ 1758 4, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN4 */ 1759 5, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN5 */ 1760 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN6 */ 1761 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN7 */ 1762 8, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN8 */ 1763 9, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN9 */ 1764 10, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN10 */ 1765 11, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN11 */ 1766 12, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN12 */ 1767 13, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN13 */ 1768 14, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN14 */ 1769 15, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN15 */ 1770 16, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN16 */ 1771 17, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN17 */ 1772 18, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN18 */ 1773 19, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN19 */ 1774 20, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN20 */ 1775 21, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN21 */ 1776 22, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN22 */ 1777 23, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN23 */ 1778 24, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN32 */ 1779 25, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN33 */ 1780 26, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN34 */ 1781 27, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN35 */ 1782 28, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN36 */ 1783 29, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN37 */ 1784 30, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN38 */ 1785 31, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN39 */ 1786 32, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN40 */ 1787 33, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN41 */ 1788 34, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN42 */ 1789 35, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN43 */ 1790 36, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN44 */ 1791 37, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN45 */ 1792 38, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN46 */ 1793 39, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN47 */ 1794 40, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN48 */ 1795 41, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN49 */ 1796 42, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN50 */ 1797 43, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN51 */ 1798 44, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN52 */ 1799 45, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN53 */ 1800 46, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN54 */ 1801 47, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN55 */ 1802 48, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN56 */ 1803 49, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN57 */ 1804 50, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN58 */ 1805 51, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN59 */ 1806 52, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN60 */ 1807 53, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN61 */ 1808 54, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN62 */ 1809 55, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN63 */ 1810 56, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN64 */ 1811 57, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN65 */ 1812 58, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN66 */ 1813 59, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN67 */ 1814 60, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN68 */ 1815 61, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN69 */ 1816 62, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN70 */ 1817 63, /* CYHAL_TRIGGER_PASS0_TR_SAR_CH_IN71 */ 1818 0, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN0 */ 1819 1, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN1 */ 1820 2, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN2 */ 1821 3, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN3 */ 1822 4, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN4 */ 1823 5, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN5 */ 1824 6, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN6 */ 1825 7, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN7 */ 1826 8, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN8 */ 1827 9, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN9 */ 1828 10, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN10 */ 1829 11, /* CYHAL_TRIGGER_PASS0_TR_SAR_GEN_IN11 */ 1830 4, /* CYHAL_TRIGGER_PERI_TR_DBG_FREEZE */ 1831 0, /* CYHAL_TRIGGER_PERI_TR_IO_OUTPUT0 */ 1832 1, /* CYHAL_TRIGGER_PERI_TR_IO_OUTPUT1 */ 1833 7, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_MCWDT0 */ 1834 8, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_MCWDT1 */ 1835 6, /* CYHAL_TRIGGER_SRSS_TR_DEBUG_FREEZE_WDT */ 1836 0, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN0 */ 1837 1, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN1 */ 1838 2, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN2 */ 1839 3, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN3 */ 1840 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN4 */ 1841 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN5 */ 1842 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN6 */ 1843 7, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN7 */ 1844 8, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN8 */ 1845 9, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN9 */ 1846 10, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN10 */ 1847 11, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN11 */ 1848 12, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN12 */ 1849 13, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN13 */ 1850 14, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN14 */ 1851 15, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN15 */ 1852 0, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN16 */ 1853 1, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN17 */ 1854 2, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN18 */ 1855 3, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN19 */ 1856 4, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN20 */ 1857 5, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN21 */ 1858 6, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN22 */ 1859 7, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN23 */ 1860 8, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN24 */ 1861 9, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN25 */ 1862 10, /* CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN26 */ 1863 9, /* CYHAL_TRIGGER_TCPWM0_TR_DEBUG_FREEZE */ 1864 4, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN2 */ 1865 5, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN5 */ 1866 6, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN8 */ 1867 7, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN11 */ 1868 8, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN14 */ 1869 9, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN17 */ 1870 10, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN20 */ 1871 11, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN23 */ 1872 12, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN26 */ 1873 13, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN29 */ 1874 14, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN32 */ 1875 15, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN35 */ 1876 16, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN38 */ 1877 17, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN41 */ 1878 18, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN44 */ 1879 19, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN47 */ 1880 20, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN50 */ 1881 21, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN53 */ 1882 22, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN56 */ 1883 23, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN59 */ 1884 28, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN62 */ 1885 29, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN65 */ 1886 30, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN68 */ 1887 31, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN71 */ 1888 32, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN74 */ 1889 33, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN77 */ 1890 34, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN80 */ 1891 35, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN83 */ 1892 36, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN86 */ 1893 37, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN89 */ 1894 38, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN92 */ 1895 39, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN95 */ 1896 40, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN98 */ 1897 41, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN101 */ 1898 42, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN104 */ 1899 43, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN107 */ 1900 44, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN110 */ 1901 45, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN113 */ 1902 46, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN116 */ 1903 47, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN119 */ 1904 48, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN122 */ 1905 49, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN125 */ 1906 50, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN128 */ 1907 51, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN131 */ 1908 52, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN134 */ 1909 53, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN137 */ 1910 54, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN140 */ 1911 55, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN143 */ 1912 60, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN146 */ 1913 61, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN149 */ 1914 62, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN152 */ 1915 63, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN155 */ 1916 0, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN770 */ 1917 24, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN773 */ 1918 56, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN776 */ 1919 1, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN779 */ 1920 25, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN782 */ 1921 57, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN785 */ 1922 2, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN788 */ 1923 26, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN791 */ 1924 58, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN794 */ 1925 3, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN797 */ 1926 27, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN800 */ 1927 59, /* CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN803 */ 1928 0, /* CYHAL_TRIGGER_TR_GROUP8_INPUT1 */ 1929 1, /* CYHAL_TRIGGER_TR_GROUP8_INPUT2 */ 1930 2, /* CYHAL_TRIGGER_TR_GROUP8_INPUT3 */ 1931 3, /* CYHAL_TRIGGER_TR_GROUP8_INPUT4 */ 1932 4, /* CYHAL_TRIGGER_TR_GROUP8_INPUT5 */ 1933 0, /* CYHAL_TRIGGER_TR_GROUP8_INPUT6 */ 1934 1, /* CYHAL_TRIGGER_TR_GROUP8_INPUT7 */ 1935 2, /* CYHAL_TRIGGER_TR_GROUP8_INPUT8 */ 1936 3, /* CYHAL_TRIGGER_TR_GROUP8_INPUT9 */ 1937 4, /* CYHAL_TRIGGER_TR_GROUP8_INPUT10 */ 1938 }; 1939 1940 #endif /* CY_DEVICE_TVIIBE1M */ 1941
