1<?xml version="1.0" encoding="utf-8" standalone="no"?> 2<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="svd_schema.xsd"> 3 <peripheral> 4 <name>TMR0</name> 5 <description>Low-Power Configurable Timer</description> 6 <baseAddress>0x40010000</baseAddress> 7 <addressBlock> 8 <offset>0x00</offset> 9 <size>0x1000</size> 10 <usage>registers</usage> 11 </addressBlock> 12 <interrupt> 13 <name>TMR</name> 14 <!-- IRQ Name --> 15 <value>1</value> 16 <!-- IRQ Number Device Specific --> 17 </interrupt> 18 <registers> 19 <register> 20 <name>CNT</name> 21 <description>Timer Counter Register.</description> 22 <addressOffset>0x00</addressOffset> 23 <access>read-write</access> 24 <fields> 25 <field> 26 <name>COUNT</name> 27 <description>The current count value for the timer. This field increments as the timer counts.</description> 28 <bitOffset>0</bitOffset> 29 <bitWidth>32</bitWidth> 30 </field> 31 </fields> 32 </register> 33 <register> 34 <name>CMP</name> 35 <description>Timer Compare Register.</description> 36 <addressOffset>0x04</addressOffset> 37 <access>read-write</access> 38 <fields> 39 <field> 40 <name>COMPARE</name> 41 <description>The value in this register is used as the compare value for the timer's count value. The compare field meaning is determined by the specific mode of the timer.</description> 42 <bitOffset>0</bitOffset> 43 <bitWidth>32</bitWidth> 44 </field> 45 </fields> 46 </register> 47 <register> 48 <name>PWM</name> 49 <description>Timer PWM Register.</description> 50 <addressOffset>0x08</addressOffset> 51 <access>read-write</access> 52 <fields> 53 <field> 54 <name>PWM</name> 55 <description>Timer PWM Match: 56 In PWM Mode, this field sets the count value for the first transition period of the PWM cycle. At the end of the cycle where CNT equals PWM, the PWM output transitions to the second period of the PWM cycle. The second PWM period count is stored in the CMP register. The value set for PWM must me less than the value set in CMP for PWM mode operation. Timer Capture Value: 57 In Capture, Compare, and Capture/Compare modes, this field is used to store the CNT value when a Capture, Compare, or Capture/Compare event occurs.</description> 58 <bitOffset>0</bitOffset> 59 <bitWidth>32</bitWidth> 60 </field> 61 </fields> 62 </register> 63 <register> 64 <name>INTR</name> 65 <description>Timer Interrupt Status Register.</description> 66 <addressOffset>0x0C</addressOffset> 67 <access>read-write</access> 68 <fields> 69 <field> 70 <name>IRQ</name> 71 <description>Interrupt Flag for Timer A.</description> 72 <bitOffset>0</bitOffset> 73 <bitWidth>1</bitWidth> 74 </field> 75 </fields> 76 </register> 77 <register> 78 <name>CN</name> 79 <description>Timer Control Register.</description> 80 <addressOffset>0x10</addressOffset> 81 <access>read-write</access> 82 <fields> 83 <field> 84 <name>TMODE</name> 85 <description>Mode Select</description> 86 <bitOffset>0</bitOffset> 87 <bitWidth>3</bitWidth> 88 <enumeratedValues> 89 <enumeratedValue> 90 <name>ONE_SHOT</name> 91 <description>One-Shot Mode</description> 92 <value>0</value> 93 </enumeratedValue> 94 <enumeratedValue> 95 <name>CONTINUOUS</name> 96 <description>Continuous Mode</description> 97 <value>1</value> 98 </enumeratedValue> 99 <enumeratedValue> 100 <name>COUNTER</name> 101 <description>Counter Mode</description> 102 <value>2</value> 103 </enumeratedValue> 104 <enumeratedValue> 105 <name>PWM</name> 106 <description>PWM Mode</description> 107 <value>3</value> 108 </enumeratedValue> 109 <enumeratedValue> 110 <name>CAPTURE</name> 111 <description>Capture Mode</description> 112 <value>4</value> 113 </enumeratedValue> 114 <enumeratedValue> 115 <name>COMPARE</name> 116 <description>Compare Mode</description> 117 <value>5</value> 118 </enumeratedValue> 119 <enumeratedValue> 120 <name>GATED</name> 121 <description>Gated Mode</description> 122 <value>6</value> 123 </enumeratedValue> 124 <enumeratedValue> 125 <name>CAPCOMP</name> 126 <description>Capture/Compare Mode</description> 127 <value>7</value> 128 </enumeratedValue> 129 </enumeratedValues> 130 </field> 131 <field> 132 <name>PRES</name> 133 <description>Timer Prescaler Select</description> 134 <bitOffset>3</bitOffset> 135 <bitWidth>3</bitWidth> 136 <enumeratedValues> 137 <enumeratedValue> 138 <name>DIV_BY_1</name> 139 <description>Prescaler Divide-By-1</description> 140 <value>0</value> 141 </enumeratedValue> 142 <enumeratedValue> 143 <name>DIV_BY_2</name> 144 <description>Prescaler Divide-By-2</description> 145 <value>1</value> 146 </enumeratedValue> 147 <enumeratedValue> 148 <name>DIV_BY_4</name> 149 <description>Prescaler Divide-By-4</description> 150 <value>2</value> 151 </enumeratedValue> 152 <enumeratedValue> 153 <name>DIV_BY_8</name> 154 <description>Prescaler Divide-By-8</description> 155 <value>3</value> 156 </enumeratedValue> 157 <enumeratedValue> 158 <name>DIV_BY_16</name> 159 <description>Prescaler Divide-By-16</description> 160 <value>4</value> 161 </enumeratedValue> 162 <enumeratedValue> 163 <name>DIV_BY_32</name> 164 <description>Prescaler Divide-By-32</description> 165 <value>5</value> 166 </enumeratedValue> 167 <enumeratedValue> 168 <name>DIV_BY_64</name> 169 <description>Prescaler Divide-By-64</description> 170 <value>6</value> 171 </enumeratedValue> 172 <enumeratedValue> 173 <name>DIV_BY_128</name> 174 <description>Prescaler Divide-By-128</description> 175 <value>7</value> 176 </enumeratedValue> 177 <enumeratedValue> 178 <name>DIV_BY_256</name> 179 <description>Prescaler Divide-By-256</description> 180 <value>0</value> 181 </enumeratedValue> 182 <enumeratedValue> 183 <name>DIV_BY_512</name> 184 <description>Prescaler Divide-By-512</description> 185 <value>1</value> 186 </enumeratedValue> 187 <enumeratedValue> 188 <name>DIV_BY_1024</name> 189 <description>Prescaler Divide-By-1024</description> 190 <value>2</value> 191 </enumeratedValue> 192 <enumeratedValue> 193 <name>DIV_BY_2048</name> 194 <description>Prescaler Divide-By-2048</description> 195 <value>3</value> 196 </enumeratedValue> 197 <enumeratedValue> 198 <name>DIV_BY_4096</name> 199 <description>Prescaler Divide-By-4096</description> 200 <value>4</value> 201 </enumeratedValue> 202 <enumeratedValue> 203 <name>DIV_BY_8192</name> 204 <description>Prescaler Divide-By-8192</description> 205 <value>5</value> 206 </enumeratedValue> 207 </enumeratedValues> 208 </field> 209 <field> 210 <name>TPOL</name> 211 <description>Timer Polarity</description> 212 <bitOffset>6</bitOffset> 213 <bitWidth>1</bitWidth> 214 </field> 215 <field> 216 <name>TEN</name> 217 <description>Timer Enable</description> 218 <bitOffset>7</bitOffset> 219 <bitWidth>1</bitWidth> 220 </field> 221 <field> 222 <name>PRES3</name> 223 <description>Timer Prescale Select MSB</description> 224 <bitOffset>8</bitOffset> 225 <bitWidth>1</bitWidth> 226 </field> 227 <field> 228 <name>PWMSYNC</name> 229 <description>PWM Synchronization Mode</description> 230 <bitOffset>9</bitOffset> 231 <bitWidth>1</bitWidth> 232 </field> 233 <field> 234 <name>NOLHPOL</name> 235 <description>PWM Phase A (Non-Overlapping High) Polarity</description> 236 <bitOffset>10</bitOffset> 237 <bitWidth>1</bitWidth> 238 </field> 239 <field> 240 <name>NOLLPOL</name> 241 <description>PWM Phase A-prime (Non-Overlapping Low) Polarity</description> 242 <bitOffset>11</bitOffset> 243 <bitWidth>1</bitWidth> 244 </field> 245 <field> 246 <name>PWMCKBD</name> 247 <description>PWM Phase A-Prime Output Disable</description> 248 <bitOffset>12</bitOffset> 249 <bitWidth>1</bitWidth> 250 </field> 251 </fields> 252 </register> 253 </registers> 254 </peripheral> 255 <!-- LPTIMER Low-Power Configurable Timer --> 256</device>
