TMR0 Low-Power Configurable Timer 0x40010000 0x00 0x1000 registers TMR 1 CNT Timer Counter Register. 0x00 read-write COUNT The current count value for the timer. This field increments as the timer counts. 0 32 CMP Timer Compare Register. 0x04 read-write COMPARE The value in this register is used as the compare value for the timer's count value. The compare field meaning is determined by the specific mode of the timer. 0 32 PWM Timer PWM Register. 0x08 read-write PWM Timer PWM Match: In PWM Mode, this field sets the count value for the first transition period of the PWM cycle. At the end of the cycle where CNT equals PWM, the PWM output transitions to the second period of the PWM cycle. The second PWM period count is stored in the CMP register. The value set for PWM must me less than the value set in CMP for PWM mode operation. Timer Capture Value: In Capture, Compare, and Capture/Compare modes, this field is used to store the CNT value when a Capture, Compare, or Capture/Compare event occurs. 0 32 INTR Timer Interrupt Status Register. 0x0C read-write IRQ Interrupt Flag for Timer A. 0 1 CN Timer Control Register. 0x10 read-write TMODE Mode Select 0 3 ONE_SHOT One-Shot Mode 0 CONTINUOUS Continuous Mode 1 COUNTER Counter Mode 2 PWM PWM Mode 3 CAPTURE Capture Mode 4 COMPARE Compare Mode 5 GATED Gated Mode 6 CAPCOMP Capture/Compare Mode 7 PRES Timer Prescaler Select 3 3 DIV_BY_1 Prescaler Divide-By-1 0 DIV_BY_2 Prescaler Divide-By-2 1 DIV_BY_4 Prescaler Divide-By-4 2 DIV_BY_8 Prescaler Divide-By-8 3 DIV_BY_16 Prescaler Divide-By-16 4 DIV_BY_32 Prescaler Divide-By-32 5 DIV_BY_64 Prescaler Divide-By-64 6 DIV_BY_128 Prescaler Divide-By-128 7 DIV_BY_256 Prescaler Divide-By-256 0 DIV_BY_512 Prescaler Divide-By-512 1 DIV_BY_1024 Prescaler Divide-By-1024 2 DIV_BY_2048 Prescaler Divide-By-2048 3 DIV_BY_4096 Prescaler Divide-By-4096 4 DIV_BY_8192 Prescaler Divide-By-8192 5 TPOL Timer Polarity 6 1 TEN Timer Enable 7 1 PRES3 Timer Prescale Select MSB 8 1 PWMSYNC PWM Synchronization Mode 9 1 NOLHPOL PWM Phase A (Non-Overlapping High) Polarity 10 1 NOLLPOL PWM Phase A-prime (Non-Overlapping Low) Polarity 11 1 PWMCKBD PWM Phase A-Prime Output Disable 12 1