1/*
2 * Copyright (c) 2024 Analog Devices, Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <zephyr/dt-bindings/pinctrl/max32-pinctrl.h>
8
9/ {
10	soc {
11		pinctrl: pin-controller@40008000 {
12
13			/omit-if-no-ref/ uart0a_rx_p0_0: uart0a_rx_p0_0 {
14				pinmux = <MAX32_PINMUX(0, 0, AF1)>;
15			};
16
17			/omit-if-no-ref/ uart0a_tx_p0_1: uart0a_tx_p0_1 {
18				pinmux = <MAX32_PINMUX(0, 1, AF1)>;
19			};
20
21			/omit-if-no-ref/ tmr0a_ioa_p0_2: tmr0a_ioa_p0_2 {
22				pinmux = <MAX32_PINMUX(0, 2, AF1)>;
23			};
24
25			/omit-if-no-ref/ uart0b_cts_p0_2: uart0b_cts_p0_2 {
26				pinmux = <MAX32_PINMUX(0, 2, AF2)>;
27			};
28
29			/omit-if-no-ref/ ext_clk_p0_3: ext_clk_p0_3 {
30				pinmux = <MAX32_PINMUX(0, 3, AF1)>;
31			};
32
33			/omit-if-no-ref/ uart0b_rts_p0_3: uart0b_rts_p0_3 {
34				pinmux = <MAX32_PINMUX(0, 3, AF2)>;
35			};
36
37			/omit-if-no-ref/ spi0_ss0_p0_4: spi0_ss0_p0_4 {
38				pinmux = <MAX32_PINMUX(0, 4, AF1)>;
39			};
40
41			/omit-if-no-ref/ tmr0b_ioan_p0_4: tmr0b_ioan_p0_4 {
42				pinmux = <MAX32_PINMUX(0, 4, AF2)>;
43			};
44
45			/omit-if-no-ref/ spi0_mosi_p0_5: spi0_mosi_p0_5 {
46				pinmux = <MAX32_PINMUX(0, 5, AF1)>;
47			};
48
49			/omit-if-no-ref/ tmr0b_iobn_p0_5: tmr0b_iobn_p0_5 {
50				pinmux = <MAX32_PINMUX(0, 5, AF2)>;
51			};
52
53			/omit-if-no-ref/ spi0_miso_p0_6: spi0_miso_p0_6 {
54				pinmux = <MAX32_PINMUX(0, 6, AF1)>;
55			};
56
57			/omit-if-no-ref/ owm_io_p0_6: owm_io_p0_6 {
58				pinmux = <MAX32_PINMUX(0, 6, AF2)>;
59			};
60
61			/omit-if-no-ref/ spi0_sck_p0_7: spi0_sck_p0_7 {
62				pinmux = <MAX32_PINMUX(0, 7, AF1)>;
63			};
64
65			/omit-if-no-ref/ owm_pe_p0_7: owm_pe_p0_7 {
66				pinmux = <MAX32_PINMUX(0, 7, AF2)>;
67			};
68
69			/omit-if-no-ref/ spi0_sdio2_p0_8: spi0_sdio2_p0_8 {
70				pinmux = <MAX32_PINMUX(0, 8, AF1)>;
71			};
72
73			/omit-if-no-ref/ tmr0b_ioa_p0_8: tmr0b_ioa_p0_8 {
74				pinmux = <MAX32_PINMUX(0, 8, AF2)>;
75			};
76
77			/omit-if-no-ref/ spi0_sdio3_p0_9: spi0_sdio3_p0_9 {
78				pinmux = <MAX32_PINMUX(0, 9, AF1)>;
79			};
80
81			/omit-if-no-ref/ tmr0b_iob_p0_9: tmr0b_iob_p0_9 {
82				pinmux = <MAX32_PINMUX(0, 9, AF2)>;
83			};
84
85			/omit-if-no-ref/ i2c0_scl_p0_10: i2c0_scl_p0_10 {
86				pinmux = <MAX32_PINMUX(0, 10, AF1)>;
87			};
88
89			/omit-if-no-ref/ spi0_ss2_p0_10: spi0_ss2_p0_10 {
90				pinmux = <MAX32_PINMUX(0, 10, AF2)>;
91			};
92
93			/omit-if-no-ref/ i2c0_sda_p0_11: i2c0_sda_p0_11 {
94				pinmux = <MAX32_PINMUX(0, 11, AF1)>;
95			};
96
97			/omit-if-no-ref/ spi0_ss1_p0_11: spi0_ss1_p0_11 {
98				pinmux = <MAX32_PINMUX(0, 11, AF2)>;
99			};
100
101			/omit-if-no-ref/ uart1_rx_p0_12: uart1_rx_p0_12 {
102				pinmux = <MAX32_PINMUX(0, 12, AF1)>;
103			};
104
105			/omit-if-no-ref/ tmr1b_ioan_p0_12: tmr1b_ioan_p0_12 {
106				pinmux = <MAX32_PINMUX(0, 12, AF2)>;
107			};
108
109			/omit-if-no-ref/ uart1_tx_p0_13: uart1_tx_p0_13 {
110				pinmux = <MAX32_PINMUX(0, 13, AF1)>;
111			};
112
113			/omit-if-no-ref/ tmr1b_iobn_p0_13: tmr1b_iobn_p0_13 {
114				pinmux = <MAX32_PINMUX(0, 13, AF2)>;
115			};
116
117			/omit-if-no-ref/ tmr1a_ioa_p0_14: tmr1a_ioa_p0_14 {
118				pinmux = <MAX32_PINMUX(0, 14, AF1)>;
119			};
120
121			/omit-if-no-ref/ i2s_clkext_p0_14: i2s_clkext_p0_14 {
122				pinmux = <MAX32_PINMUX(0, 14, AF2)>;
123			};
124
125			/omit-if-no-ref/ tmr1a_iob_p0_15: tmr1a_iob_p0_15 {
126				pinmux = <MAX32_PINMUX(0, 15, AF1)>;
127			};
128
129			/omit-if-no-ref/ pcif_vsync_p0_15: pcif_vsync_p0_15 {
130				pinmux = <MAX32_PINMUX(0, 15, AF2)>;
131			};
132
133			/omit-if-no-ref/ i2c1_scl_p0_16: i2c1_scl_p0_16 {
134				pinmux = <MAX32_PINMUX(0, 16, AF1)>;
135			};
136
137			/omit-if-no-ref/ pt2_p0_16: pt2_p0_16 {
138				pinmux = <MAX32_PINMUX(0, 16, AF2)>;
139			};
140
141			/omit-if-no-ref/ i2c1_sda_p0_17: i2c1_sda_p0_17 {
142				pinmux = <MAX32_PINMUX(0, 17, AF1)>;
143			};
144
145			/omit-if-no-ref/ pt3_p0_17: pt3_p0_17 {
146				pinmux = <MAX32_PINMUX(0, 17, AF2)>;
147			};
148
149			/omit-if-no-ref/ pt0_p0_18: pt0_p0_18 {
150				pinmux = <MAX32_PINMUX(0, 18, AF1)>;
151			};
152
153			/omit-if-no-ref/ owm_io_p0_18: owm_io_p0_18 {
154				pinmux = <MAX32_PINMUX(0, 18, AF2)>;
155			};
156
157			/omit-if-no-ref/ pt1_p0_19: pt1_p0_19 {
158				pinmux = <MAX32_PINMUX(0, 19, AF1)>;
159			};
160
161			/omit-if-no-ref/ owm_pe_p0_19: owm_pe_p0_19 {
162				pinmux = <MAX32_PINMUX(0, 19, AF2)>;
163			};
164
165			/omit-if-no-ref/ spi1_ss0_p0_20: spi1_ss0_p0_20 {
166				pinmux = <MAX32_PINMUX(0, 20, AF1)>;
167			};
168
169			/omit-if-no-ref/ pcif_d0_p0_20: pcif_d0_p0_20 {
170				pinmux = <MAX32_PINMUX(0, 20, AF2)>;
171			};
172
173			/omit-if-no-ref/ spi1_mosi_p0_21: spi1_mosi_p0_21 {
174				pinmux = <MAX32_PINMUX(0, 21, AF1)>;
175			};
176
177			/omit-if-no-ref/ pcif_d1_p0_21: pcif_d1_p0_21 {
178				pinmux = <MAX32_PINMUX(0, 21, AF2)>;
179			};
180
181			/omit-if-no-ref/ spi1_miso_p0_22: spi1_miso_p0_22 {
182				pinmux = <MAX32_PINMUX(0, 22, AF1)>;
183			};
184
185			/omit-if-no-ref/ pcif_d2_p0_22: pcif_d2_p0_22 {
186				pinmux = <MAX32_PINMUX(0, 22, AF2)>;
187			};
188
189			/omit-if-no-ref/ spi1_sck_p0_23: spi1_sck_p0_23 {
190				pinmux = <MAX32_PINMUX(0, 23, AF1)>;
191			};
192
193			/omit-if-no-ref/ pcif_d3_p0_23: pcif_d3_p0_23 {
194				pinmux = <MAX32_PINMUX(0, 23, AF2)>;
195			};
196
197			/omit-if-no-ref/ spi1_sdio2_p0_24: spi1_sdio2_p0_24 {
198				pinmux = <MAX32_PINMUX(0, 24, AF1)>;
199			};
200
201			/omit-if-no-ref/ pcif_d4_p0_24: pcif_d4_p0_24 {
202				pinmux = <MAX32_PINMUX(0, 24, AF2)>;
203			};
204
205			/omit-if-no-ref/ spi1_sdio3_p0_25: spi1_sdio3_p0_25 {
206				pinmux = <MAX32_PINMUX(0, 25, AF1)>;
207			};
208
209			/omit-if-no-ref/ pcif_d5_p0_25: pcif_d5_p0_25 {
210				pinmux = <MAX32_PINMUX(0, 25, AF2)>;
211			};
212
213			/omit-if-no-ref/ tmr2_ioa_p0_26: tmr2_ioa_p0_26 {
214				pinmux = <MAX32_PINMUX(0, 26, AF1)>;
215			};
216
217			/omit-if-no-ref/ pcif_d6_p0_26: pcif_d6_p0_26 {
218				pinmux = <MAX32_PINMUX(0, 26, AF2)>;
219			};
220
221			/omit-if-no-ref/ tmr2_iob_p0_27: tmr2_iob_p0_27 {
222				pinmux = <MAX32_PINMUX(0, 27, AF1)>;
223			};
224
225			/omit-if-no-ref/ pcif_d7_p0_27: pcif_d7_p0_27 {
226				pinmux = <MAX32_PINMUX(0, 27, AF2)>;
227			};
228
229			/omit-if-no-ref/ swdio_p0_28: swdio_p0_28 {
230				pinmux = <MAX32_PINMUX(0, 28, AF1)>;
231			};
232
233			/omit-if-no-ref/ swclk_p0_29: swclk_p0_29 {
234				pinmux = <MAX32_PINMUX(0, 29, AF1)>;
235			};
236
237			/omit-if-no-ref/ i2c2_scl_p0_30: i2c2_scl_p0_30 {
238				pinmux = <MAX32_PINMUX(0, 30, AF1)>;
239			};
240
241			/omit-if-no-ref/ pcif_d8_p0_30: pcif_d8_p0_30 {
242				pinmux = <MAX32_PINMUX(0, 30, AF2)>;
243			};
244
245			/omit-if-no-ref/ i2c2_sda_p0_31: i2c2_sda_p0_31 {
246				pinmux = <MAX32_PINMUX(0, 31, AF1)>;
247			};
248
249			/omit-if-no-ref/ pcif_d9_p0_31: pcif_d9_p0_31 {
250				pinmux = <MAX32_PINMUX(0, 31, AF2)>;
251			};
252
253			/omit-if-no-ref/ uart2_rx_p1_0: uart2_rx_p1_0 {
254				pinmux = <MAX32_PINMUX(1, 0, AF1)>;
255			};
256
257			/omit-if-no-ref/ rv_tck_p1_0: rv_tck_p1_0 {
258				pinmux = <MAX32_PINMUX(1, 0, AF2)>;
259			};
260
261			/omit-if-no-ref/ uart2_tx_p1_1: uart2_tx_p1_1 {
262				pinmux = <MAX32_PINMUX(1, 1, AF1)>;
263			};
264
265			/omit-if-no-ref/ rv_tms_p1_1: rv_tms_p1_1 {
266				pinmux = <MAX32_PINMUX(1, 1, AF2)>;
267			};
268
269			/omit-if-no-ref/ i2s_sck_p1_2: i2s_sck_p1_2 {
270				pinmux = <MAX32_PINMUX(1, 2, AF1)>;
271			};
272
273			/omit-if-no-ref/ rv_tdi_p1_2: rv_tdi_p1_2 {
274				pinmux = <MAX32_PINMUX(1, 2, AF2)>;
275			};
276
277			/omit-if-no-ref/ i2s_ws_p1_3: i2s_ws_p1_3 {
278				pinmux = <MAX32_PINMUX(1, 3, AF1)>;
279			};
280
281			/omit-if-no-ref/ rv_tdo_p1_3: rv_tdo_p1_3 {
282				pinmux = <MAX32_PINMUX(1, 3, AF2)>;
283			};
284
285			/omit-if-no-ref/ i2s_sdi_p1_4: i2s_sdi_p1_4 {
286				pinmux = <MAX32_PINMUX(1, 4, AF1)>;
287			};
288
289			/omit-if-no-ref/ tmr3b_ioa_p1_4: tmr3b_ioa_p1_4 {
290				pinmux = <MAX32_PINMUX(1, 4, AF2)>;
291			};
292
293			/omit-if-no-ref/ i2s_sdo_p1_5: i2s_sdo_p1_5 {
294				pinmux = <MAX32_PINMUX(1, 5, AF1)>;
295			};
296
297			/omit-if-no-ref/ tmr3b_iob_p1_5: tmr3b_iob_p1_5 {
298				pinmux = <MAX32_PINMUX(1, 5, AF2)>;
299			};
300
301			/omit-if-no-ref/ tmr3a_ioa_p1_6: tmr3a_ioa_p1_6 {
302				pinmux = <MAX32_PINMUX(1, 6, AF1)>;
303			};
304
305			/omit-if-no-ref/ pcif_d10_p1_6: pcif_d10_p1_6 {
306				pinmux = <MAX32_PINMUX(1, 6, AF2)>;
307			};
308
309			/omit-if-no-ref/ tmr3a_iob_p1_7: tmr3a_iob_p1_7 {
310				pinmux = <MAX32_PINMUX(1, 7, AF1)>;
311			};
312
313			/omit-if-no-ref/ pcif_d11_p1_7: pcif_d11_p1_7 {
314				pinmux = <MAX32_PINMUX(1, 7, AF2)>;
315			};
316
317			/omit-if-no-ref/ pcif_hsync_p1_8: pcif_hsync_p1_8 {
318				pinmux = <MAX32_PINMUX(1, 8, AF1)>;
319			};
320
321			/omit-if-no-ref/ rxev0_p1_8: rxev0_p1_8 {
322				pinmux = <MAX32_PINMUX(1, 8, AF2)>;
323			};
324
325			/omit-if-no-ref/ pcif_pclk_p1_9: pcif_pclk_p1_9 {
326				pinmux = <MAX32_PINMUX(1, 9, AF1)>;
327			};
328
329			/omit-if-no-ref/ txev0_p1_9: txev0_p1_9 {
330				pinmux = <MAX32_PINMUX(1, 9, AF2)>;
331			};
332
333			/omit-if-no-ref/ sdhc_cdn_p1_10: sdhc_cdn_p1_10 {
334				pinmux = <MAX32_PINMUX(1, 10, AF1)>;
335			};
336
337			/omit-if-no-ref/ adc_clk_ext_p1_10: adc_clk_ext_p1_10 {
338				pinmux = <MAX32_PINMUX(1, 10, AF2)>;
339			};
340
341			/omit-if-no-ref/ sdhc_dat3_p1_11: sdhc_dat3_p1_11 {
342				pinmux = <MAX32_PINMUX(1, 11, AF1)>;
343			};
344
345			/omit-if-no-ref/ sdhc_dat2_p1_12: sdhc_dat2_p1_12 {
346				pinmux = <MAX32_PINMUX(1, 12, AF1)>;
347			};
348
349			/omit-if-no-ref/ adc_hw_trig_a_p1_12: adc_hw_trig_a_p1_12 {
350				pinmux = <MAX32_PINMUX(1, 12, AF2)>;
351			};
352
353			/omit-if-no-ref/ sdhc_dat1_p1_13: sdhc_dat1_p1_13 {
354				pinmux = <MAX32_PINMUX(1, 13, AF1)>;
355			};
356
357			/omit-if-no-ref/ adc_hw_trig_b_p1_13: adc_hw_trig_b_p1_13 {
358				pinmux = <MAX32_PINMUX(1, 13, AF2)>;
359			};
360
361			/omit-if-no-ref/ sdhc_dat0_p1_14: sdhc_dat0_p1_14 {
362				pinmux = <MAX32_PINMUX(1, 14, AF1)>;
363			};
364
365			/omit-if-no-ref/ adc_hw_trig_c_p1_14: adc_hw_trig_c_p1_14 {
366				pinmux = <MAX32_PINMUX(1, 14, AF2)>;
367			};
368
369			/omit-if-no-ref/ sdhc_wp_p1_15: sdhc_wp_p1_15 {
370				pinmux = <MAX32_PINMUX(1, 15, AF1)>;
371			};
372
373			/omit-if-no-ref/ sdhc_cmd_p1_16: sdhc_cmd_p1_16 {
374				pinmux = <MAX32_PINMUX(1, 16, AF1)>;
375			};
376
377			/omit-if-no-ref/ sdhc_clk_p1_17: sdhc_clk_p1_17 {
378				pinmux = <MAX32_PINMUX(1, 17, AF1)>;
379			};
380
381			/omit-if-no-ref/ ain0_p2_0: ain0_p2_0 {
382				pinmux = <MAX32_PINMUX(2, 0, AF1)>;
383			};
384
385			/omit-if-no-ref/ ain1_p2_1: ain1_p2_1 {
386				pinmux = <MAX32_PINMUX(2, 1, AF1)>;
387			};
388
389			/omit-if-no-ref/ ain2_p2_2: ain2_p2_2 {
390				pinmux = <MAX32_PINMUX(2, 2, AF1)>;
391			};
392
393			/omit-if-no-ref/ ain3_p2_3: ain3_p2_3 {
394				pinmux = <MAX32_PINMUX(2, 3, AF1)>;
395			};
396
397			/omit-if-no-ref/ ain4_p2_4: ain4_p2_4 {
398				pinmux = <MAX32_PINMUX(2, 4, AF1)>;
399			};
400
401			/omit-if-no-ref/ lptmr0b_ioa_p2_4: lptmr0b_ioa_p2_4 {
402				pinmux = <MAX32_PINMUX(2, 4, AF2)>;
403			};
404
405			/omit-if-no-ref/ ain5_p2_5: ain5_p2_5 {
406				pinmux = <MAX32_PINMUX(2, 5, AF1)>;
407			};
408
409			/omit-if-no-ref/ lptmr1b_ioa_p2_5: lptmr1b_ioa_p2_5 {
410				pinmux = <MAX32_PINMUX(2, 5, AF2)>;
411			};
412
413			/omit-if-no-ref/ ain6_p2_6: ain6_p2_6 {
414				pinmux = <MAX32_PINMUX(2, 6, AF1)>;
415			};
416
417			/omit-if-no-ref/ lptmr0_clk_p2_6: lptmr0_clk_p2_6 {
418				pinmux = <MAX32_PINMUX(2, 6, AF1)>;
419			};
420
421			/omit-if-no-ref/ lpuartb_rx_p2_6: lpuartb_rx_p2_6 {
422				pinmux = <MAX32_PINMUX(2, 6, AF2)>;
423			};
424
425			/omit-if-no-ref/ ain7_p2_7: ain7_p2_7 {
426				pinmux = <MAX32_PINMUX(2, 7, AF1)>;
427			};
428
429			/omit-if-no-ref/ lptmr1_clk_p2_7: lptmr1_clk_p2_7 {
430				pinmux = <MAX32_PINMUX(2, 7, AF1)>;
431			};
432
433			/omit-if-no-ref/ lpuartb_tx_p2_7: lpuartb_tx_p2_7 {
434				pinmux = <MAX32_PINMUX(2, 7, AF2)>;
435			};
436
437			/omit-if-no-ref/ pdown_p3_0: pdown_p3_0 {
438				pinmux = <MAX32_PINMUX(3, 0, AF1)>;
439			};
440
441			/omit-if-no-ref/ wakeup_p3_0: wakeup_p3_0 {
442				pinmux = <MAX32_PINMUX(3, 0, AF2)>;
443			};
444
445			/omit-if-no-ref/ sqwout_p3_1: sqwout_p3_1 {
446				pinmux = <MAX32_PINMUX(3, 1, AF1)>;
447			};
448
449			/omit-if-no-ref/ wakeup_p3_1: wakeup_p3_1 {
450				pinmux = <MAX32_PINMUX(3, 1, AF2)>;
451			};
452
453		};
454	};
455};
456