/*
 * Copyright (c) 2024 Analog Devices, Inc.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <zephyr/dt-bindings/pinctrl/max32-pinctrl.h>

/ {
	soc {
		pinctrl: pin-controller@40008000 {

			/omit-if-no-ref/ uart0a_rx_p0_0: uart0a_rx_p0_0 {
				pinmux = <MAX32_PINMUX(0, 0, AF1)>;
			};

			/omit-if-no-ref/ uart0a_tx_p0_1: uart0a_tx_p0_1 {
				pinmux = <MAX32_PINMUX(0, 1, AF1)>;
			};

			/omit-if-no-ref/ tmr0a_ioa_p0_2: tmr0a_ioa_p0_2 {
				pinmux = <MAX32_PINMUX(0, 2, AF1)>;
			};

			/omit-if-no-ref/ uart0b_cts_p0_2: uart0b_cts_p0_2 {
				pinmux = <MAX32_PINMUX(0, 2, AF2)>;
			};

			/omit-if-no-ref/ ext_clk_p0_3: ext_clk_p0_3 {
				pinmux = <MAX32_PINMUX(0, 3, AF1)>;
			};

			/omit-if-no-ref/ uart0b_rts_p0_3: uart0b_rts_p0_3 {
				pinmux = <MAX32_PINMUX(0, 3, AF2)>;
			};

			/omit-if-no-ref/ spi0_ss0_p0_4: spi0_ss0_p0_4 {
				pinmux = <MAX32_PINMUX(0, 4, AF1)>;
			};

			/omit-if-no-ref/ tmr0b_ioan_p0_4: tmr0b_ioan_p0_4 {
				pinmux = <MAX32_PINMUX(0, 4, AF2)>;
			};

			/omit-if-no-ref/ spi0_mosi_p0_5: spi0_mosi_p0_5 {
				pinmux = <MAX32_PINMUX(0, 5, AF1)>;
			};

			/omit-if-no-ref/ tmr0b_iobn_p0_5: tmr0b_iobn_p0_5 {
				pinmux = <MAX32_PINMUX(0, 5, AF2)>;
			};

			/omit-if-no-ref/ spi0_miso_p0_6: spi0_miso_p0_6 {
				pinmux = <MAX32_PINMUX(0, 6, AF1)>;
			};

			/omit-if-no-ref/ owm_io_p0_6: owm_io_p0_6 {
				pinmux = <MAX32_PINMUX(0, 6, AF2)>;
			};

			/omit-if-no-ref/ spi0_sck_p0_7: spi0_sck_p0_7 {
				pinmux = <MAX32_PINMUX(0, 7, AF1)>;
			};

			/omit-if-no-ref/ owm_pe_p0_7: owm_pe_p0_7 {
				pinmux = <MAX32_PINMUX(0, 7, AF2)>;
			};

			/omit-if-no-ref/ spi0_sdio2_p0_8: spi0_sdio2_p0_8 {
				pinmux = <MAX32_PINMUX(0, 8, AF1)>;
			};

			/omit-if-no-ref/ tmr0b_ioa_p0_8: tmr0b_ioa_p0_8 {
				pinmux = <MAX32_PINMUX(0, 8, AF2)>;
			};

			/omit-if-no-ref/ spi0_sdio3_p0_9: spi0_sdio3_p0_9 {
				pinmux = <MAX32_PINMUX(0, 9, AF1)>;
			};

			/omit-if-no-ref/ tmr0b_iob_p0_9: tmr0b_iob_p0_9 {
				pinmux = <MAX32_PINMUX(0, 9, AF2)>;
			};

			/omit-if-no-ref/ i2c0_scl_p0_10: i2c0_scl_p0_10 {
				pinmux = <MAX32_PINMUX(0, 10, AF1)>;
			};

			/omit-if-no-ref/ spi0_ss2_p0_10: spi0_ss2_p0_10 {
				pinmux = <MAX32_PINMUX(0, 10, AF2)>;
			};

			/omit-if-no-ref/ i2c0_sda_p0_11: i2c0_sda_p0_11 {
				pinmux = <MAX32_PINMUX(0, 11, AF1)>;
			};

			/omit-if-no-ref/ spi0_ss1_p0_11: spi0_ss1_p0_11 {
				pinmux = <MAX32_PINMUX(0, 11, AF2)>;
			};

			/omit-if-no-ref/ uart1_rx_p0_12: uart1_rx_p0_12 {
				pinmux = <MAX32_PINMUX(0, 12, AF1)>;
			};

			/omit-if-no-ref/ tmr1b_ioan_p0_12: tmr1b_ioan_p0_12 {
				pinmux = <MAX32_PINMUX(0, 12, AF2)>;
			};

			/omit-if-no-ref/ uart1_tx_p0_13: uart1_tx_p0_13 {
				pinmux = <MAX32_PINMUX(0, 13, AF1)>;
			};

			/omit-if-no-ref/ tmr1b_iobn_p0_13: tmr1b_iobn_p0_13 {
				pinmux = <MAX32_PINMUX(0, 13, AF2)>;
			};

			/omit-if-no-ref/ tmr1a_ioa_p0_14: tmr1a_ioa_p0_14 {
				pinmux = <MAX32_PINMUX(0, 14, AF1)>;
			};

			/omit-if-no-ref/ i2s_clkext_p0_14: i2s_clkext_p0_14 {
				pinmux = <MAX32_PINMUX(0, 14, AF2)>;
			};

			/omit-if-no-ref/ tmr1a_iob_p0_15: tmr1a_iob_p0_15 {
				pinmux = <MAX32_PINMUX(0, 15, AF1)>;
			};

			/omit-if-no-ref/ pcif_vsync_p0_15: pcif_vsync_p0_15 {
				pinmux = <MAX32_PINMUX(0, 15, AF2)>;
			};

			/omit-if-no-ref/ i2c1_scl_p0_16: i2c1_scl_p0_16 {
				pinmux = <MAX32_PINMUX(0, 16, AF1)>;
			};

			/omit-if-no-ref/ pt2_p0_16: pt2_p0_16 {
				pinmux = <MAX32_PINMUX(0, 16, AF2)>;
			};

			/omit-if-no-ref/ i2c1_sda_p0_17: i2c1_sda_p0_17 {
				pinmux = <MAX32_PINMUX(0, 17, AF1)>;
			};

			/omit-if-no-ref/ pt3_p0_17: pt3_p0_17 {
				pinmux = <MAX32_PINMUX(0, 17, AF2)>;
			};

			/omit-if-no-ref/ pt0_p0_18: pt0_p0_18 {
				pinmux = <MAX32_PINMUX(0, 18, AF1)>;
			};

			/omit-if-no-ref/ owm_io_p0_18: owm_io_p0_18 {
				pinmux = <MAX32_PINMUX(0, 18, AF2)>;
			};

			/omit-if-no-ref/ pt1_p0_19: pt1_p0_19 {
				pinmux = <MAX32_PINMUX(0, 19, AF1)>;
			};

			/omit-if-no-ref/ owm_pe_p0_19: owm_pe_p0_19 {
				pinmux = <MAX32_PINMUX(0, 19, AF2)>;
			};

			/omit-if-no-ref/ spi1_ss0_p0_20: spi1_ss0_p0_20 {
				pinmux = <MAX32_PINMUX(0, 20, AF1)>;
			};

			/omit-if-no-ref/ pcif_d0_p0_20: pcif_d0_p0_20 {
				pinmux = <MAX32_PINMUX(0, 20, AF2)>;
			};

			/omit-if-no-ref/ spi1_mosi_p0_21: spi1_mosi_p0_21 {
				pinmux = <MAX32_PINMUX(0, 21, AF1)>;
			};

			/omit-if-no-ref/ pcif_d1_p0_21: pcif_d1_p0_21 {
				pinmux = <MAX32_PINMUX(0, 21, AF2)>;
			};

			/omit-if-no-ref/ spi1_miso_p0_22: spi1_miso_p0_22 {
				pinmux = <MAX32_PINMUX(0, 22, AF1)>;
			};

			/omit-if-no-ref/ pcif_d2_p0_22: pcif_d2_p0_22 {
				pinmux = <MAX32_PINMUX(0, 22, AF2)>;
			};

			/omit-if-no-ref/ spi1_sck_p0_23: spi1_sck_p0_23 {
				pinmux = <MAX32_PINMUX(0, 23, AF1)>;
			};

			/omit-if-no-ref/ pcif_d3_p0_23: pcif_d3_p0_23 {
				pinmux = <MAX32_PINMUX(0, 23, AF2)>;
			};

			/omit-if-no-ref/ spi1_sdio2_p0_24: spi1_sdio2_p0_24 {
				pinmux = <MAX32_PINMUX(0, 24, AF1)>;
			};

			/omit-if-no-ref/ pcif_d4_p0_24: pcif_d4_p0_24 {
				pinmux = <MAX32_PINMUX(0, 24, AF2)>;
			};

			/omit-if-no-ref/ spi1_sdio3_p0_25: spi1_sdio3_p0_25 {
				pinmux = <MAX32_PINMUX(0, 25, AF1)>;
			};

			/omit-if-no-ref/ pcif_d5_p0_25: pcif_d5_p0_25 {
				pinmux = <MAX32_PINMUX(0, 25, AF2)>;
			};

			/omit-if-no-ref/ tmr2_ioa_p0_26: tmr2_ioa_p0_26 {
				pinmux = <MAX32_PINMUX(0, 26, AF1)>;
			};

			/omit-if-no-ref/ pcif_d6_p0_26: pcif_d6_p0_26 {
				pinmux = <MAX32_PINMUX(0, 26, AF2)>;
			};

			/omit-if-no-ref/ tmr2_iob_p0_27: tmr2_iob_p0_27 {
				pinmux = <MAX32_PINMUX(0, 27, AF1)>;
			};

			/omit-if-no-ref/ pcif_d7_p0_27: pcif_d7_p0_27 {
				pinmux = <MAX32_PINMUX(0, 27, AF2)>;
			};

			/omit-if-no-ref/ swdio_p0_28: swdio_p0_28 {
				pinmux = <MAX32_PINMUX(0, 28, AF1)>;
			};

			/omit-if-no-ref/ swclk_p0_29: swclk_p0_29 {
				pinmux = <MAX32_PINMUX(0, 29, AF1)>;
			};

			/omit-if-no-ref/ i2c2_scl_p0_30: i2c2_scl_p0_30 {
				pinmux = <MAX32_PINMUX(0, 30, AF1)>;
			};

			/omit-if-no-ref/ pcif_d8_p0_30: pcif_d8_p0_30 {
				pinmux = <MAX32_PINMUX(0, 30, AF2)>;
			};

			/omit-if-no-ref/ i2c2_sda_p0_31: i2c2_sda_p0_31 {
				pinmux = <MAX32_PINMUX(0, 31, AF1)>;
			};

			/omit-if-no-ref/ pcif_d9_p0_31: pcif_d9_p0_31 {
				pinmux = <MAX32_PINMUX(0, 31, AF2)>;
			};

			/omit-if-no-ref/ uart2_rx_p1_0: uart2_rx_p1_0 {
				pinmux = <MAX32_PINMUX(1, 0, AF1)>;
			};

			/omit-if-no-ref/ rv_tck_p1_0: rv_tck_p1_0 {
				pinmux = <MAX32_PINMUX(1, 0, AF2)>;
			};

			/omit-if-no-ref/ uart2_tx_p1_1: uart2_tx_p1_1 {
				pinmux = <MAX32_PINMUX(1, 1, AF1)>;
			};

			/omit-if-no-ref/ rv_tms_p1_1: rv_tms_p1_1 {
				pinmux = <MAX32_PINMUX(1, 1, AF2)>;
			};

			/omit-if-no-ref/ i2s_sck_p1_2: i2s_sck_p1_2 {
				pinmux = <MAX32_PINMUX(1, 2, AF1)>;
			};

			/omit-if-no-ref/ rv_tdi_p1_2: rv_tdi_p1_2 {
				pinmux = <MAX32_PINMUX(1, 2, AF2)>;
			};

			/omit-if-no-ref/ i2s_ws_p1_3: i2s_ws_p1_3 {
				pinmux = <MAX32_PINMUX(1, 3, AF1)>;
			};

			/omit-if-no-ref/ rv_tdo_p1_3: rv_tdo_p1_3 {
				pinmux = <MAX32_PINMUX(1, 3, AF2)>;
			};

			/omit-if-no-ref/ i2s_sdi_p1_4: i2s_sdi_p1_4 {
				pinmux = <MAX32_PINMUX(1, 4, AF1)>;
			};

			/omit-if-no-ref/ tmr3b_ioa_p1_4: tmr3b_ioa_p1_4 {
				pinmux = <MAX32_PINMUX(1, 4, AF2)>;
			};

			/omit-if-no-ref/ i2s_sdo_p1_5: i2s_sdo_p1_5 {
				pinmux = <MAX32_PINMUX(1, 5, AF1)>;
			};

			/omit-if-no-ref/ tmr3b_iob_p1_5: tmr3b_iob_p1_5 {
				pinmux = <MAX32_PINMUX(1, 5, AF2)>;
			};

			/omit-if-no-ref/ tmr3a_ioa_p1_6: tmr3a_ioa_p1_6 {
				pinmux = <MAX32_PINMUX(1, 6, AF1)>;
			};

			/omit-if-no-ref/ pcif_d10_p1_6: pcif_d10_p1_6 {
				pinmux = <MAX32_PINMUX(1, 6, AF2)>;
			};

			/omit-if-no-ref/ tmr3a_iob_p1_7: tmr3a_iob_p1_7 {
				pinmux = <MAX32_PINMUX(1, 7, AF1)>;
			};

			/omit-if-no-ref/ pcif_d11_p1_7: pcif_d11_p1_7 {
				pinmux = <MAX32_PINMUX(1, 7, AF2)>;
			};

			/omit-if-no-ref/ pcif_hsync_p1_8: pcif_hsync_p1_8 {
				pinmux = <MAX32_PINMUX(1, 8, AF1)>;
			};

			/omit-if-no-ref/ rxev0_p1_8: rxev0_p1_8 {
				pinmux = <MAX32_PINMUX(1, 8, AF2)>;
			};

			/omit-if-no-ref/ pcif_pclk_p1_9: pcif_pclk_p1_9 {
				pinmux = <MAX32_PINMUX(1, 9, AF1)>;
			};

			/omit-if-no-ref/ txev0_p1_9: txev0_p1_9 {
				pinmux = <MAX32_PINMUX(1, 9, AF2)>;
			};

			/omit-if-no-ref/ sdhc_cdn_p1_10: sdhc_cdn_p1_10 {
				pinmux = <MAX32_PINMUX(1, 10, AF1)>;
			};

			/omit-if-no-ref/ adc_clk_ext_p1_10: adc_clk_ext_p1_10 {
				pinmux = <MAX32_PINMUX(1, 10, AF2)>;
			};

			/omit-if-no-ref/ sdhc_dat3_p1_11: sdhc_dat3_p1_11 {
				pinmux = <MAX32_PINMUX(1, 11, AF1)>;
			};

			/omit-if-no-ref/ sdhc_dat2_p1_12: sdhc_dat2_p1_12 {
				pinmux = <MAX32_PINMUX(1, 12, AF1)>;
			};

			/omit-if-no-ref/ adc_hw_trig_a_p1_12: adc_hw_trig_a_p1_12 {
				pinmux = <MAX32_PINMUX(1, 12, AF2)>;
			};

			/omit-if-no-ref/ sdhc_dat1_p1_13: sdhc_dat1_p1_13 {
				pinmux = <MAX32_PINMUX(1, 13, AF1)>;
			};

			/omit-if-no-ref/ adc_hw_trig_b_p1_13: adc_hw_trig_b_p1_13 {
				pinmux = <MAX32_PINMUX(1, 13, AF2)>;
			};

			/omit-if-no-ref/ sdhc_dat0_p1_14: sdhc_dat0_p1_14 {
				pinmux = <MAX32_PINMUX(1, 14, AF1)>;
			};

			/omit-if-no-ref/ adc_hw_trig_c_p1_14: adc_hw_trig_c_p1_14 {
				pinmux = <MAX32_PINMUX(1, 14, AF2)>;
			};

			/omit-if-no-ref/ sdhc_wp_p1_15: sdhc_wp_p1_15 {
				pinmux = <MAX32_PINMUX(1, 15, AF1)>;
			};

			/omit-if-no-ref/ sdhc_cmd_p1_16: sdhc_cmd_p1_16 {
				pinmux = <MAX32_PINMUX(1, 16, AF1)>;
			};

			/omit-if-no-ref/ sdhc_clk_p1_17: sdhc_clk_p1_17 {
				pinmux = <MAX32_PINMUX(1, 17, AF1)>;
			};

			/omit-if-no-ref/ ain0_p2_0: ain0_p2_0 {
				pinmux = <MAX32_PINMUX(2, 0, AF1)>;
			};

			/omit-if-no-ref/ ain1_p2_1: ain1_p2_1 {
				pinmux = <MAX32_PINMUX(2, 1, AF1)>;
			};

			/omit-if-no-ref/ ain2_p2_2: ain2_p2_2 {
				pinmux = <MAX32_PINMUX(2, 2, AF1)>;
			};

			/omit-if-no-ref/ ain3_p2_3: ain3_p2_3 {
				pinmux = <MAX32_PINMUX(2, 3, AF1)>;
			};

			/omit-if-no-ref/ ain4_p2_4: ain4_p2_4 {
				pinmux = <MAX32_PINMUX(2, 4, AF1)>;
			};

			/omit-if-no-ref/ lptmr0b_ioa_p2_4: lptmr0b_ioa_p2_4 {
				pinmux = <MAX32_PINMUX(2, 4, AF2)>;
			};

			/omit-if-no-ref/ ain5_p2_5: ain5_p2_5 {
				pinmux = <MAX32_PINMUX(2, 5, AF1)>;
			};

			/omit-if-no-ref/ lptmr1b_ioa_p2_5: lptmr1b_ioa_p2_5 {
				pinmux = <MAX32_PINMUX(2, 5, AF2)>;
			};

			/omit-if-no-ref/ ain6_p2_6: ain6_p2_6 {
				pinmux = <MAX32_PINMUX(2, 6, AF1)>;
			};

			/omit-if-no-ref/ lptmr0_clk_p2_6: lptmr0_clk_p2_6 {
				pinmux = <MAX32_PINMUX(2, 6, AF1)>;
			};

			/omit-if-no-ref/ lpuartb_rx_p2_6: lpuartb_rx_p2_6 {
				pinmux = <MAX32_PINMUX(2, 6, AF2)>;
			};

			/omit-if-no-ref/ ain7_p2_7: ain7_p2_7 {
				pinmux = <MAX32_PINMUX(2, 7, AF1)>;
			};

			/omit-if-no-ref/ lptmr1_clk_p2_7: lptmr1_clk_p2_7 {
				pinmux = <MAX32_PINMUX(2, 7, AF1)>;
			};

			/omit-if-no-ref/ lpuartb_tx_p2_7: lpuartb_tx_p2_7 {
				pinmux = <MAX32_PINMUX(2, 7, AF2)>;
			};

			/omit-if-no-ref/ pdown_p3_0: pdown_p3_0 {
				pinmux = <MAX32_PINMUX(3, 0, AF1)>;
			};

			/omit-if-no-ref/ wakeup_p3_0: wakeup_p3_0 {
				pinmux = <MAX32_PINMUX(3, 0, AF2)>;
			};

			/omit-if-no-ref/ sqwout_p3_1: sqwout_p3_1 {
				pinmux = <MAX32_PINMUX(3, 1, AF1)>;
			};

			/omit-if-no-ref/ wakeup_p3_1: wakeup_p3_1 {
				pinmux = <MAX32_PINMUX(3, 1, AF2)>;
			};

		};
	};
};