1 /* 2 * Copyright (c) 2022, NXP 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef ZEPHYR_SOC_ARM_NXP_IMX_RT_PINCTRL_RT10XX_H_ 8 #define ZEPHYR_SOC_ARM_NXP_IMX_RT_PINCTRL_RT10XX_H_ 9 10 #include <zephyr/devicetree.h> 11 #include <zephyr/types.h> 12 #include "fsl_common.h" 13 14 #ifdef __cplusplus 15 extern "C" { 16 #endif 17 18 #define MCUX_IMX_INPUT_SCHMITT_ENABLE_SHIFT IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT 19 #define MCUX_IMX_BIAS_PULL_DOWN_SHIFT IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT 20 #define MCUX_IMX_BIAS_PULL_UP_SHIFT IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT 21 #define MCUX_IMX_BIAS_BUS_HOLD_SHIFT IOMUXC_SW_PAD_CTL_PAD_PUE_SHIFT 22 #define MCUX_IMX_PULL_ENABLE_SHIFT IOMUXC_SW_PAD_CTL_PAD_PKE_SHIFT 23 #define MCUX_IMX_DRIVE_OPEN_DRAIN_SHIFT IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT 24 #define MCUX_IMX_SPEED_SHIFT IOMUXC_SW_PAD_CTL_PAD_SPEED_SHIFT 25 #define MCUX_IMX_DRIVE_STRENGTH_SHIFT IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT 26 #define MCUX_IMX_SLEW_RATE_SHIFT IOMUXC_SW_PAD_CTL_PAD_SRE_SHIFT 27 #define MCUX_IMX_INPUT_ENABLE_SHIFT 31 /* Shift to a bit not used by IOMUXC_SW_PAD_CTL */ 28 #define MCUX_IMX_INPUT_ENABLE(x) ((x >> MCUX_IMX_INPUT_ENABLE_SHIFT) & 0x1) 29 30 #define Z_PINCTRL_MCUX_IMX_PINCFG_INIT(node_id) \ 31 ((DT_PROP(node_id, input_schmitt_enable) << MCUX_IMX_INPUT_SCHMITT_ENABLE_SHIFT) | \ 32 IF_ENABLED(DT_PROP(node_id, bias_pull_up), (DT_ENUM_IDX(node_id, bias_pull_up_value) \ 33 << MCUX_IMX_BIAS_PULL_UP_SHIFT) |) \ 34 IF_ENABLED(DT_PROP(node_id, bias_pull_down), (DT_ENUM_IDX(node_id, bias_pull_down_value)\ 35 << MCUX_IMX_BIAS_PULL_DOWN_SHIFT) |) \ 36 ((DT_PROP(node_id, bias_pull_down) | DT_PROP(node_id, bias_pull_up)) \ 37 << MCUX_IMX_BIAS_BUS_HOLD_SHIFT) | \ 38 ((!DT_PROP(node_id, bias_disable)) << MCUX_IMX_PULL_ENABLE_SHIFT) | \ 39 (DT_PROP(node_id, drive_open_drain) << MCUX_IMX_DRIVE_OPEN_DRAIN_SHIFT) | \ 40 (DT_ENUM_IDX(node_id, nxp_speed) << MCUX_IMX_SPEED_SHIFT) | \ 41 (DT_ENUM_IDX(node_id, drive_strength) << MCUX_IMX_DRIVE_STRENGTH_SHIFT) | \ 42 (DT_ENUM_IDX(node_id, slew_rate) << MCUX_IMX_SLEW_RATE_SHIFT) | \ 43 (DT_PROP(node_id, input_enable) << MCUX_IMX_INPUT_ENABLE_SHIFT)) 44 45 46 /* This struct must be present. It is used by the mcux gpio driver */ 47 struct pinctrl_soc_pinmux { 48 uint32_t mux_register; /* IOMUXC SW_PAD_MUX register */ 49 uint32_t config_register; /* IOMUXC SW_PAD_CTL register */ 50 uint32_t input_register; /* IOMUXC SELECT_INPUT DAISY register */ 51 uint32_t gpr_register; /* IOMUXC GPR register */ 52 uint8_t gpr_shift: 5; /* bitshift for GPR register write */ 53 uint8_t mux_mode: 4; /* Mux value for SW_PAD_MUX register */ 54 uint32_t input_daisy:4; /* Mux value for SELECT_INPUT_DAISY register */ 55 uint8_t gpr_val: 1; /* value to write to GPR register */ 56 }; 57 58 struct pinctrl_soc_pin { 59 struct pinctrl_soc_pinmux pinmux; 60 uint32_t pin_ctrl_flags; /* value to write to IOMUXC_SW_PAD_CTL register */ 61 }; 62 63 typedef struct pinctrl_soc_pin pinctrl_soc_pin_t; 64 65 /* This definition must be present. It is used by the mcux gpio driver */ 66 #define MCUX_IMX_PINMUX(node_id) \ 67 { \ 68 .mux_register = DT_PROP_BY_IDX(node_id, pinmux, 0), \ 69 .config_register = DT_PROP_BY_IDX(node_id, pinmux, 4), \ 70 .input_register = DT_PROP_BY_IDX(node_id, pinmux, 2), \ 71 .mux_mode = DT_PROP_BY_IDX(node_id, pinmux, 1), \ 72 .input_daisy = DT_PROP_BY_IDX(node_id, pinmux, 3), \ 73 IF_ENABLED(DT_PROP_HAS_IDX(node_id, gpr, 0), \ 74 (.gpr_register = DT_PROP_BY_IDX(node_id, gpr, 0),)) \ 75 IF_ENABLED(DT_PROP_HAS_IDX(node_id, gpr, 1), \ 76 (.gpr_shift = DT_PROP_BY_IDX(node_id, gpr, 1),)) \ 77 IF_ENABLED(DT_PROP_HAS_IDX(node_id, gpr, 2), \ 78 (.gpr_val = DT_PROP_BY_IDX(node_id, gpr, 2),)) \ 79 } 80 81 #define Z_PINCTRL_PINMUX(group_id, pin_prop, idx) \ 82 MCUX_IMX_PINMUX(DT_PHANDLE_BY_IDX(group_id, pin_prop, idx)) 83 84 #define Z_PINCTRL_STATE_PIN_INIT(group_id, pin_prop, idx) \ 85 { \ 86 .pinmux = Z_PINCTRL_PINMUX(group_id, pin_prop, idx), \ 87 .pin_ctrl_flags = Z_PINCTRL_MCUX_IMX_PINCFG_INIT(group_id), \ 88 }, 89 90 91 #define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \ 92 {DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), \ 93 DT_FOREACH_PROP_ELEM, pinmux, Z_PINCTRL_STATE_PIN_INIT)}; \ 94 95 96 #ifdef __cplusplus 97 } 98 #endif 99 100 #endif /* ZEPHYR_SOC_ARM_NXP_IMX_RT_PINCTRL_RT10XX_H_ */ 101
