1/*
2 * Copyright (c) 2020 TriaGnoSys GmbH
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <arm/armv8-m.dtsi>
8#include <dt-bindings/gpio/gpio.h>
9#include <arm/silabs/gpio_gecko.h>
10#include <dt-bindings/i2c/i2c.h>
11#include <dt-bindings/pinctrl/gecko-pinctrl.h>
12#include <dt-bindings/adc/adc.h>
13
14/ {
15	chosen {
16		zephyr,flash-controller = &msc;
17		zephyr,entropy = &se;
18	};
19
20	cpus {
21		#address-cells = <1>;
22		#size-cells = <0>;
23
24		cpu0: cpu@0 {
25			device_type = "cpu";
26			compatible = "arm,cortex-m33";
27			reg = <0>;
28			cpu-power-states = <&pstate_em1 &pstate_em2 &pstate_em3>;
29		};
30
31		power-states {
32			/*
33			 * EM1 is a basic "CPU WFI idle", all high-freq clocks remain
34			 * enabled.
35			 */
36			pstate_em1: em1 {
37				compatible = "zephyr,power-state";
38				power-state-name = "runtime-idle";
39				min-residency-us = <4>;
40				/* HFXO remains active */
41				exit-latency-us = <2>;
42			};
43
44			/*
45			 * EM2 is a deepsleep with HF clocks disabled by HW, voltages
46			 * scaled down, etc.
47			 */
48			pstate_em2: em2 {
49				compatible = "zephyr,power-state";
50				power-state-name = "suspend-to-idle";
51				min-residency-us = <260>;
52				exit-latency-us = <250>;
53			};
54
55			/*
56			 * EM3 seems to be exactly the same as EM2 except that
57			 * LFXO & LFRCO should be disabled, so you must use ULFRCO
58			 * as BURTC clock for the system to not lose track of time and
59			 * wake up.
60			 */
61			pstate_em3: em3 {
62				compatible = "zephyr,power-state";
63				power-state-name = "standby";
64				min-residency-us = <20000>;
65				exit-latency-us = <2000>;
66			};
67		};
68	};
69
70	sram0: memory@20000000 {
71		device_type = "memory";
72		compatible = "mmio-sram";
73	};
74
75	soc {
76		msc: flash-controller@50030000 {
77			compatible = "silabs,gecko-flash-controller";
78			reg = <0x50030000 0x3148>;
79			interrupts = <50 0>;
80
81			#address-cells = <1>;
82			#size-cells = <1>;
83
84			flash0: flash@0 {
85				compatible = "soc-nv-flash";
86				write-block-size = <4>;
87				erase-block-size = <8192>;
88			};
89		};
90
91		usart0: usart@5005c000 {
92			compatible = "silabs,gecko-usart";
93			reg = <0x5005C000 0x306c>;
94			interrupts = <9 0>, <10 0>;
95			interrupt-names = "rx", "tx";
96			peripheral-id = <0>;
97			status = "disabled";
98		};
99
100		burtc0: burtc@50064000 {
101			compatible = "silabs,gecko-burtc";
102			reg = <0x50064000 0x3034>;
103			interrupts = <17 0>;
104			status = "disabled";
105		};
106
107		se: semailbox@5c021000 {
108			compatible = "silabs,gecko-semailbox";
109			reg = <0x5c021000 0x1000>;
110			status = "disabled";
111			interrupts = <64 3>, <65 3>, <66 3>;
112			interrupt-names = "SETAMPERHOST", "SEMBRX", "SEMBTX";
113		};
114
115		i2c0: i2c@5b000000 {
116			compatible = "silabs,gecko-i2c";
117			clock-frequency = <I2C_BITRATE_STANDARD>;
118			#address-cells = <1>;
119			#size-cells = <0>;
120			reg = <0x5b000000 0x3044>;
121			interrupts = <27 0>;
122			status = "disabled";
123		};
124
125		stimer0: stimer@500a8000 {
126			compatible = "silabs,gecko-stimer";
127			reg = <0x500a8000 0x3054>;
128			interrupts = <67 0>;
129			clock-frequency = <32768>;
130			prescaler = <1>;
131			status = "disabled";
132		};
133
134		gpio: gpio@5003c000 {
135			compatible = "silabs,gecko-gpio";
136			reg = <0x5003c000 0x4000>;
137			interrupts = <26 2>, <25 2>;
138			interrupt-names = "GPIO_EVEN", "GPIO_ODD";
139
140			ranges;
141			#address-cells = <1>;
142			#size-cells = <1>;
143
144			gpioa: gpio@5003c030 {
145				compatible = "silabs,gecko-gpio-port";
146				reg = <0x5003c030 0x30>;
147				peripheral-id = <0>;
148				gpio-controller;
149				#gpio-cells = <2>;
150				status = "disabled";
151			};
152
153			gpiob: gpio@5003c060 {
154				compatible = "silabs,gecko-gpio-port";
155				reg = <0x5003c060 0x30>;
156				peripheral-id = <1>;
157				gpio-controller;
158				#gpio-cells = <2>;
159				status = "disabled";
160			};
161
162			gpioc: gpio@5003c090 {
163				compatible = "silabs,gecko-gpio-port";
164				reg = <0x5003c090 0x30>;
165				peripheral-id = <2>;
166				gpio-controller;
167				#gpio-cells = <2>;
168				status = "disabled";
169			};
170
171			gpiod: gpio@5003c0C0 {
172				compatible = "silabs,gecko-gpio-port";
173				reg = <0x5003c0C0 0x30>;
174				peripheral-id = <3>;
175				gpio-controller;
176				#gpio-cells = <2>;
177				status = "disabled";
178			};
179		};
180
181		wdog0: wdog@5b004000 {
182			compatible = "silabs,gecko-wdog";
183			reg = <0x5b004000 0x2C>;
184			peripheral-id = <0>;
185			interrupts = <42 0>;
186			status = "disabled";
187		};
188
189		wdog1: wdog@5b008000 {
190			compatible = "silabs,gecko-wdog";
191			reg = <0x5b008000 0x2C>;
192			peripheral-id = <1>;
193			interrupts = <43 0>;
194			status = "disabled";
195		};
196
197		adc0: adc@59004000 {
198			compatible = "silabs,gecko-iadc";
199			reg = <0x59004000 0x4000>;
200			interrupts = <49 0>;
201			status = "disabled";
202			#io-channel-cells = <1>;
203		};
204	};
205};
206
207/ {
208	pinctrl: pin-controller {
209		/* Pin controller is a "virtual" device since SiLabs SoCs do pin
210		 * control in a distributed way (GPIO registers and PSEL
211		 * registers on each peripheral).
212		 */
213		compatible = "silabs,gecko-pinctrl";
214	};
215
216	hwinfo: hwinfo {
217		compatible = "silabs,gecko-hwinfo";
218		status = "disabled";
219	};
220
221};
222
223&nvic {
224	arm,num-irq-priority-bits = <4>;
225};
226