1 /*
2 * Copyright (c) 2021 Vestas Wind Systems A/S
3 * Copyright (c) 2025 NXP
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8 #define DT_DRV_COMPAT nxp_lptmr
9
10 #include <zephyr/init.h>
11 #include <zephyr/drivers/timer/system_timer.h>
12 #include <zephyr/devicetree.h>
13 #include <zephyr/kernel.h>
14 #include <zephyr/sys/time_units.h>
15 #include <fsl_lptmr.h>
16 #include <zephyr/irq.h>
17
18 BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1,
19 "No LPTMR instance enabled in devicetree");
20
21 /* Prescaler clock mapping */
22 #define TO_LPTMR_CLK_SEL(val) _DO_CONCAT(kLPTMR_PrescalerClock_, val)
23
24 /* Devicetree properties */
25 #define LPTMR_BASE ((LPTMR_Type *)(DT_INST_REG_ADDR(0)))
26 #define LPTMR_CLK_SOURCE TO_LPTMR_CLK_SEL(DT_INST_PROP_OR(0, clk_source, 0))
27 #define LPTMR_PRESCALER DT_INST_PROP_OR(0, prescale_glitch_filter, 0)
28 #define LPTMR_IRQN DT_INST_IRQN(0)
29 #define LPTMR_IRQ_PRIORITY DT_INST_IRQ(0, priority)
30
31 /* Timer cycles per tick */
32 #define CYCLES_PER_TICK ((uint32_t)((uint64_t)sys_clock_hw_cycles_per_sec() \
33 / (uint64_t)CONFIG_SYS_CLOCK_TICKS_PER_SEC))
34
35 /* 32 bit cycle counter */
36 static volatile uint32_t cycles;
37
sys_clock_set_timeout(int32_t ticks,bool idle)38 void sys_clock_set_timeout(int32_t ticks, bool idle)
39 {
40 ARG_UNUSED(idle);
41
42 if (idle && (ticks == K_TICKS_FOREVER)) {
43 LPTMR_DisableInterrupts(LPTMR_BASE, kLPTMR_TimerInterruptEnable);
44 }
45 }
46
sys_clock_idle_exit(void)47 void sys_clock_idle_exit(void)
48 {
49 if (LPTMR_GetEnabledInterrupts(LPTMR_BASE) != kLPTMR_TimerInterruptEnable) {
50 LPTMR_EnableInterrupts(LPTMR_BASE, kLPTMR_TimerInterruptEnable);
51 }
52 }
53
sys_clock_disable(void)54 void sys_clock_disable(void)
55 {
56 LPTMR_DisableInterrupts(LPTMR_BASE, kLPTMR_TimerInterruptEnable);
57 LPTMR_StopTimer(LPTMR_BASE);
58 }
59
sys_clock_elapsed(void)60 uint32_t sys_clock_elapsed(void)
61 {
62 return 0;
63 }
64
sys_clock_cycle_get_32(void)65 uint32_t sys_clock_cycle_get_32(void)
66 {
67 return LPTMR_GetCurrentTimerCount(LPTMR_BASE) + cycles;
68 }
69
mcux_lptmr_timer_isr(const void * arg)70 static void mcux_lptmr_timer_isr(const void *arg)
71 {
72 ARG_UNUSED(arg);
73
74 cycles += CYCLES_PER_TICK;
75
76 sys_clock_announce(1);
77 LPTMR_ClearStatusFlags(LPTMR_BASE, kLPTMR_TimerCompareFlag);
78 }
79
sys_clock_driver_init(void)80 static int sys_clock_driver_init(void)
81 {
82 lptmr_config_t config;
83
84 LPTMR_GetDefaultConfig(&config);
85 config.timerMode = kLPTMR_TimerModeTimeCounter;
86 config.enableFreeRunning = false;
87 config.prescalerClockSource = LPTMR_CLK_SOURCE;
88 config.bypassPrescaler = (LPTMR_PRESCALER == 0);
89 config.value = (LPTMR_PRESCALER == 0) ? 0 : (LPTMR_PRESCALER - 1);
90
91 LPTMR_Init(LPTMR_BASE, &config);
92
93 IRQ_CONNECT(LPTMR_IRQN, LPTMR_IRQ_PRIORITY, mcux_lptmr_timer_isr, NULL, 0);
94 irq_enable(LPTMR_IRQN);
95
96 LPTMR_EnableInterrupts(LPTMR_BASE, kLPTMR_TimerInterruptEnable);
97 LPTMR_SetTimerPeriod(LPTMR_BASE, CYCLES_PER_TICK);
98 LPTMR_StartTimer(LPTMR_BASE);
99
100 return 0;
101 }
102
103 SYS_INIT(sys_clock_driver_init, PRE_KERNEL_2,
104 CONFIG_SYSTEM_CLOCK_INIT_PRIORITY);
105
