Home
last modified time | relevance | path

Searched refs:sys_write8 (Results 1 – 25 of 43) sorted by relevance

12

/Zephyr-latest/soc/litex/litex_vexriscv/
Dsoc.h74 sys_write8(value, addr); in litex_write8()
83 sys_write8(value >> 8, addr); in litex_write16()
84 sys_write8(value, addr + 0x4); in litex_write16()
95 sys_write8(value >> 24, addr); in litex_write32()
96 sys_write8(value >> 16, addr + 0x4); in litex_write32()
97 sys_write8(value >> 8, addr + 0x8); in litex_write32()
98 sys_write8(value, addr + 0xC); in litex_write32()
109 sys_write8(value >> 56, addr); in litex_write64()
110 sys_write8(value >> 48, addr + 0x4); in litex_write64()
111 sys_write8(value >> 40, addr + 0x8); in litex_write64()
[all …]
/Zephyr-latest/drivers/crypto/
Dcrypto_it8xxx2_sha_v2.c81 sys_write8(((uint32_t)&chip_ctx) & 0xc0, in it8xxx2_sha256_init()
83 sys_write8(((uint32_t)&chip_ctx) >> 8, in it8xxx2_sha256_init()
111 sys_write8(sha_ctrl, IT8XXX2_SHA_REGS_BASE + IT8XXX2_REG_SHACR); in it8xxx2_sha256_module_calculation()
128 sys_write8(IT8XXX2_SHAIS, IT8XXX2_SHA_REGS_BASE + IT8XXX2_REG_SHASR); in it8xxx2_sha256_module_calculation()
168 sys_write8(IT8XXX2_SHAEXEC_1KByte, in it8xxx2_hash_handler()
188 sys_write8(IT8XXX2_SHAEXEC_64Byte, in it8xxx2_hash_handler()
218 sys_write8(IT8XXX2_SHAEXEC_64Byte, in it8xxx2_hash_handler()
237 sys_write8(IT8XXX2_SHAEXEC_64Byte, IT8XXX2_SHA_REGS_BASE + IT8XXX2_REG_SHAECR); in it8xxx2_hash_handler()
246 sys_write8(((uint32_t)&chip_ctx.h) & 0xc0, in it8xxx2_hash_handler()
248 sys_write8(((uint32_t)&chip_ctx.h) >> 8, in it8xxx2_hash_handler()
[all …]
Dcrypto_it8xxx2_sha.c124 sys_write8(hash_ctrl | IT8XXX2_SHA_START_SHA256, in it8xxx2_sha256_module_calculation()
209 sys_write8(((uint32_t)&chip_ctx >> 6) & 0xfc, in it8xxx2_sha_init()
212 sys_write8(((uint32_t)&chip_ctx.k >> 6) & 0xfc, in it8xxx2_sha_init()
/Zephyr-latest/drivers/i2c/
Di2c_mchp_mss.c138 sys_write8((ctrl | PCLK_DIV_960), cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_configure()
141 sys_write8((ctrl | PCLK_DIV_256), cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_configure()
177 sys_write8((ctrl | CTRL_STA), cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_read()
206 sys_write8((ctrl | CTRL_STA), cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_write()
210 sys_write8((ctrl & ~CTRL_SI), cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_write()
248 sys_write8((ctrl & ~CTRL_ENS1), cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_reset()
252 sys_write8((ctrl | CTRL_ENS1), cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_reset()
270 sys_write8((ctrl & ~CTRL_STA), cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_irq_handler()
272 sys_write8(data->target_addr | data->dir, cfg->i2c_base_addr + CORE_I2C_DATA); in mss_i2c_irq_handler()
281 sys_write8((ctrl | CTRL_STA), cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_irq_handler()
[all …]
Di2c_sifive.c90 sys_write8((addr | rw_flag), I2C_REG(config, REG_TRANSMIT)); in i2c_sifive_send_addr()
96 sys_write8(command, I2C_REG(config, REG_COMMAND)); in i2c_sifive_send_addr()
129 sys_write8((msg->buf)[i], I2C_REG(config, REG_TRANSMIT)); in i2c_sifive_write_msg()
143 sys_write8(command, I2C_REG(config, REG_COMMAND)); in i2c_sifive_write_msg()
186 sys_write8(command, I2C_REG(config, REG_COMMAND)); in i2c_sifive_read_msg()
219 sys_write8(0, I2C_REG(config, REG_CONTROL)); in i2c_sifive_configure()
241 sys_write8((uint8_t) (0xFF & prescale), I2C_REG(config, REG_PRESCALE_LOW)); in i2c_sifive_configure()
242 sys_write8((uint8_t) (0xFF & (prescale >> 8)), in i2c_sifive_configure()
261 sys_write8(SF_CONTROL_EN, I2C_REG(config, REG_CONTROL)); in i2c_sifive_configure()
/Zephyr-latest/drivers/spi/
Dspi_oc_simple.c82 sys_write8((DIVIDERS[i] >> 4) & 0x3, SPI_OC_SIMPLE_SPER(info)); in spi_oc_simple_configure()
86 sys_write8(spcr | SPI_OC_SIMPLE_SPCR_SPE, SPI_OC_SIMPLE_SPCR(info)); in spi_oc_simple_configure()
116 sys_write8(1 << config->slave, SPI_OC_SIMPLE_SPSS(info)); in spi_oc_simple_transceive()
128 sys_write8(*ctx->tx_buf, in spi_oc_simple_transceive()
132 sys_write8(0, SPI_OC_SIMPLE_SPDR(info)); in spi_oc_simple_transceive()
154 sys_write8(0 << config->slave, SPI_OC_SIMPLE_SPSS(info)); in spi_oc_simple_transceive()
202 sys_write8(0, SPI_OC_SIMPLE_SPSS(info)); in spi_oc_simple_init()
213 sys_write8(SPI_OC_SIMPLE_SPCR_SPE, SPI_OC_SIMPLE_SPCR(info)); in spi_oc_simple_init()
214 sys_write8(0, SPI_OC_SIMPLE_SPDR(info)); in spi_oc_simple_init()
Dspi_it8xxx2.c118 sys_write8(sys_read8(cfg->base + SPI0D_CTRL5) | SCK_FREQ_DIV_1_EN, in spi_it8xxx2_set_freq()
127 sys_write8(sys_read8(cfg->base + SPI0D_CTRL5) & ~SCK_FREQ_DIV_1_EN, in spi_it8xxx2_set_freq()
131 sys_write8(reg_val, cfg->base + SPI01_CTRL1); in spi_it8xxx2_set_freq()
177 sys_write8(reg_val, cfg->base + SPI01_CTRL1); in spi_it8xxx2_configure()
196 sys_write8(reg_val, cfg->base + SPI0C_INT_STS); in spi_it8xxx2_configure()
355 sys_write8(BYTE_0(cmd_address), cfg->base + SPI05_CH0_CMD_ADDR_LB); in spi_it8xxx2_next_xfer()
356 sys_write8(BYTE_1(cmd_address), cfg->base + SPI06_CH0_CMD_ADDR_HB); in spi_it8xxx2_next_xfer()
357 sys_write8(BYTE_2(cmd_address), cfg->base + SPI21_CH0_CMD_ADDR_HB2); in spi_it8xxx2_next_xfer()
360 sys_write8(BYTE_0(mem_address), cfg->base + SPI0E_CH0_WR_MEM_ADDR_LB); in spi_it8xxx2_next_xfer()
361 sys_write8(BYTE_1(mem_address), cfg->base + SPI0F_CH0_WR_MEM_ADDR_HB); in spi_it8xxx2_next_xfer()
[all …]
/Zephyr-latest/drivers/can/
Dcan_rcar.c269 sys_write8((uint8_t)~RCAR_CAN_ECSR_ADEF, in can_rcar_error()
274 sys_write8((uint8_t)~RCAR_CAN_ECSR_BE0F, in can_rcar_error()
279 sys_write8((uint8_t)~RCAR_CAN_ECSR_BE1F, in can_rcar_error()
284 sys_write8((uint8_t)~RCAR_CAN_ECSR_CEF, in can_rcar_error()
289 sys_write8((uint8_t)~RCAR_CAN_ECSR_AEF, in can_rcar_error()
294 sys_write8((uint8_t)~RCAR_CAN_ECSR_FEF, in can_rcar_error()
299 sys_write8((uint8_t)~RCAR_CAN_ECSR_SEF, in can_rcar_error()
303 sys_write8((uint8_t)~RCAR_CAN_EIFR_BEIF, in can_rcar_error()
309 sys_write8((uint8_t)~RCAR_CAN_EIFR_EWIF, in can_rcar_error()
316 sys_write8((uint8_t)~RCAR_CAN_EIFR_EPIF, in can_rcar_error()
[all …]
/Zephyr-latest/drivers/dma/
Ddma_pl330.c141 sys_write8(OP_DMA_MOV, buf); in dma_pl330_gen_mov()
142 sys_write8(type, buf + 1); in dma_pl330_gen_mov()
143 sys_write8(val, buf + 2); in dma_pl330_gen_mov()
144 sys_write8(val >> 8, buf + 3); in dma_pl330_gen_mov()
145 sys_write8(val >> 16, buf + 4); in dma_pl330_gen_mov()
146 sys_write8(val >> 24, buf + 5); in dma_pl330_gen_mov()
153 sys_write8(opcode, addr); in dma_pl330_gen_op()
154 sys_write8(val, addr + 1); in dma_pl330_gen_op()
200 sys_write8(OP_DMA_LD, dma_exec_addr + offset); in dma_pl330_setup_ch()
201 sys_write8(OP_DMA_ST, dma_exec_addr + offset + 1); in dma_pl330_setup_ch()
[all …]
/Zephyr-latest/drivers/hwspinlock/
Dsqn_hwspinlock.c64 sys_write8(cpuid, get_lock_addr(dev, id)); in sqn_hwspinlock_trylock()
90 sys_write8(cpuid, get_lock_addr(dev, id)); in sqn_hwspinlock_lock()
95 sys_write8(cpuid, get_lock_addr(dev, id)); in sqn_hwspinlock_lock()
116 sys_write8(cpuid, get_lock_addr(dev, id)); in sqn_hwspinlock_unlock()
/Zephyr-latest/drivers/pinctrl/renesas/rz/
Dpinctrl_rzt2m.c41 sys_write8(rselp | BIT(pin->pin), RSELP(pin->port)); in pinctrl_configure_pin()
42 sys_write8(DRCTL_CONFIG( in pinctrl_configure_pin()
51 sys_write8(pmc | BIT(pin->pin), PMC(pin->port)); in pinctrl_configure_pin()
/Zephyr-latest/include/zephyr/arch/nios2/
Dasm_inline_gcc.h34 static ALWAYS_INLINE void sys_write8(uint8_t data, mm_reg_t addr) in sys_write8() function
/Zephyr-latest/include/zephyr/arch/common/
Dsys_io.h28 static ALWAYS_INLINE void sys_write8(uint8_t data, mem_addr_t addr) in sys_write8() function
/Zephyr-latest/include/zephyr/arch/arc/
Dsys-io-common.h34 static ALWAYS_INLINE void sys_write8(uint8_t data, mem_addr_t addr) in sys_write8() function
/Zephyr-latest/include/zephyr/arch/arm/cortex_a_r/
Dsys_io.h37 static ALWAYS_INLINE void sys_write8(uint8_t data, mem_addr_t addr) in sys_write8() function
/Zephyr-latest/drivers/misc/renesas_ra_external_interrupt/
Drenesas_ra_external_interrupt.c91 sys_write8(irqcr, config->reg); in gpio_ra_interrupt_set()
134 sys_write8(irqcr, config->reg); in gpio_ra_interrupt_init()
/Zephyr-latest/include/zephyr/arch/arm64/
Dsys_io.h47 static ALWAYS_INLINE void sys_write8(uint8_t data, mem_addr_t addr) in sys_write8() function
/Zephyr-latest/drivers/serial/
Duart_efinix_sapphire.c46 sys_write8(c, UART0_DATA_REG_ADDR); in uart_efinix_sapphire_poll_out()
/Zephyr-latest/include/zephyr/arch/riscv/
Dsys_io.h42 static ALWAYS_INLINE void sys_write8(uint8_t data, mem_addr_t addr) in sys_write8() function
/Zephyr-latest/arch/x86/core/
Dearly_serial.c41 #define OUT(reg, val) sys_write8(val, BASE + reg)
/Zephyr-latest/drivers/syscon/
Dsyscon.c101 sys_write8(val, (base_address + reg)); in syscon_generic_write_reg()
/Zephyr-latest/drivers/interrupt_controller/
Dintc_renesas_ra_icu.c79 sys_write8(reg | (intcfg & IRQCRi_IRQMD_MASK), IRQCRi_REG(irqn)); in ra_icu_irq_configure()
Dintc_vim.c75 sys_write8(prio, VIM_PRI_INT(irq)); in z_vim_irq_priority_set()
/Zephyr-latest/drivers/flash/
Dsoc_flash_nrf_mram.c82 sys_write8(sys_read8(addr_end), addr_end); in commit_changes()
/Zephyr-latest/drivers/reset/
Dreset_rpi_pico.c51 sys_write8(value, base_address + offset); in reset_rpi_write_register()

12