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Searched refs:sys_read8 (Results 1 – 25 of 39) sorted by relevance

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/Zephyr-latest/soc/litex/litex_vexriscv/
Dsoc.h19 return sys_read8(addr); in litex_read8()
28 return (sys_read8(addr) << 8) in litex_read16()
29 | sys_read8(addr + 0x4); in litex_read16()
40 return (sys_read8(addr) << 24) in litex_read32()
41 | (sys_read8(addr + 0x4) << 16) in litex_read32()
42 | (sys_read8(addr + 0x8) << 8) in litex_read32()
43 | sys_read8(addr + 0xc); in litex_read32()
54 return (((uint64_t)sys_read8(addr)) << 56) in litex_read64()
55 | ((uint64_t)sys_read8(addr + 0x4) << 48) in litex_read64()
56 | ((uint64_t)sys_read8(addr + 0x8) << 40) in litex_read64()
[all …]
/Zephyr-latest/drivers/hwspinlock/
Dsqn_hwspinlock.c60 if (sys_read8(get_lock_addr(dev, id)) == cpuid) { in sqn_hwspinlock_trylock()
65 if (sys_read8(get_lock_addr(dev, id)) == cpuid) { in sqn_hwspinlock_trylock()
89 if (sys_read8(get_lock_addr(dev, id)) == 0) { in sqn_hwspinlock_lock()
93 while (sys_read8(get_lock_addr(dev, id)) != cpuid) { in sqn_hwspinlock_lock()
/Zephyr-latest/drivers/i2c/
Di2c_mchp_mss.c134 uint8_t ctrl = sys_read8(cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_configure()
168 uint8_t ctrl = sys_read8(cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_read()
187 uint8_t ctrl = sys_read8(cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_write()
246 uint8_t ctrl = sys_read8(cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_reset()
250 ctrl = sys_read8(cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_reset()
261 uint8_t ctrl = sys_read8(cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_irq_handler()
263 uint8_t status = sys_read8(cfg->i2c_base_addr + CORE_I2C_STATUS); in mss_i2c_irq_handler()
329 sys_read8(cfg->i2c_base_addr + CORE_I2C_DATA); in mss_i2c_irq_handler()
343 sys_read8(cfg->i2c_base_addr + CORE_I2C_DATA); in mss_i2c_irq_handler()
359 ctrl = sys_read8(cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_irq_handler()
Di2c_sifive.c23 #define IS_SET(config, reg, value) (sys_read8(I2C_REG(config, reg)) & (value))
193 (msg->buf)[i] = sys_read8(I2C_REG(config, REG_RECEIVE)); in i2c_sifive_read_msg()
/Zephyr-latest/drivers/pcie/endpoint/
Dpcie_ep_common.c113 sys_read8(mapped_addr); in pcie_ep_xfer_data_memcpy()
158 sys_read8(mapped_addr); in pcie_ep_xfer_data_memcpy()
198 sys_read8(mapped_addr); in pcie_ep_xfer_data_dma()
257 sys_read8(mapped_addr); in pcie_ep_xfer_data_dma()
/Zephyr-latest/drivers/spi/
Dspi_oc_simple.c136 while (sys_read8(SPI_OC_SIMPLE_SPSR(info)) & 0x1) { in spi_oc_simple_transceive()
140 rx_byte = sys_read8(SPI_OC_SIMPLE_SPDR(info)); in spi_oc_simple_transceive()
215 while (sys_read8(SPI_OC_SIMPLE_SPSR(info)) & 0x1) { in spi_oc_simple_init()
218 sys_read8(SPI_OC_SIMPLE_SPDR(info)); in spi_oc_simple_init()
Dspi_it8xxx2.c118 sys_write8(sys_read8(cfg->base + SPI0D_CTRL5) | SCK_FREQ_DIV_1_EN, in spi_it8xxx2_set_freq()
127 sys_write8(sys_read8(cfg->base + SPI0D_CTRL5) & ~SCK_FREQ_DIV_1_EN, in spi_it8xxx2_set_freq()
129 reg_val = sys_read8(cfg->base + SPI01_CTRL1); in spi_it8xxx2_set_freq()
171 reg_val = sys_read8(cfg->base + SPI01_CTRL1); in spi_it8xxx2_configure()
194 reg_val = sys_read8(cfg->base + SPI0C_INT_STS); in spi_it8xxx2_configure()
376 sys_write8(sys_read8(cfg->base + SPI01_CTRL1) | INTERRUPT_EN, cfg->base + SPI01_CTRL1); in spi_it8xxx2_next_xfer()
378 reg_val = sys_read8(cfg->base + SPI0D_CTRL5); in spi_it8xxx2_next_xfer()
454 reg_val = sys_read8(cfg->base + SPI0C_INT_STS); in it8xxx2_spi_isr()
461 reg_val = sys_read8(cfg->base + SPI0D_CTRL5); in it8xxx2_spi_isr()
491 sys_write8(sys_read8(cfg->base + SPI04_CTRL3) & ~AUTO_MODE, cfg->base + SPI04_CTRL3); in spi_it8xxx2_init()
/Zephyr-latest/drivers/pinctrl/renesas/rz/
Dpinctrl_rzt2m.c36 uint8_t rselp = sys_read8(RSELP(pin->port)); in pinctrl_configure_pin()
38 uint8_t pmc = sys_read8(PMC(pin->port)); in pinctrl_configure_pin()
/Zephyr-latest/drivers/crypto/
Dcrypto_it8xxx2_sha_v2.c94 sha_ctrl = sys_read8(IT8XXX2_SHA_REGS_BASE + IT8XXX2_REG_SHACR); in it8xxx2_sha256_module_calculation()
122 if ((sys_read8(IT8XXX2_SHA_REGS_BASE + IT8XXX2_REG_SHASR) & IT8XXX2_SHAIS)) { in it8xxx2_sha256_module_calculation()
254 sha_ctrl = sys_read8(IT8XXX2_SHA_REGS_BASE + IT8XXX2_REG_SHACR); in it8xxx2_hash_handler()
263 if ((sys_read8(IT8XXX2_SHA_REGS_BASE + IT8XXX2_REG_SHASR) in it8xxx2_hash_handler()
Dcrypto_it8xxx2_sha.c123 hash_ctrl = sys_read8(IT8XXX2_SHA_REGS_BASE + IT8XXX2_REG_HASHCTRLR); in it8xxx2_sha256_module_calculation()
126 hash_ctrl = sys_read8(IT8XXX2_SHA_REGS_BASE + IT8XXX2_REG_HASHCTRLR); in it8xxx2_sha256_module_calculation()
/Zephyr-latest/include/zephyr/arch/nios2/
Dasm_inline_gcc.h39 static ALWAYS_INLINE uint8_t sys_read8(mm_reg_t addr) in sys_read8() function
/Zephyr-latest/drivers/can/
Dcan_rcar.c230 err_cnt->tx_err_cnt = sys_read8(config->reg_addr + RCAR_CAN_TECR); in can_rcar_get_error_count()
231 err_cnt->rx_err_cnt = sys_read8(config->reg_addr + RCAR_CAN_RECR); in can_rcar_get_error_count()
262 eifr = sys_read8(config->reg_addr + RCAR_CAN_EIFR); in can_rcar_error()
266 ecsr = sys_read8(config->reg_addr + RCAR_CAN_ECSR); in can_rcar_error()
413 frame.data[i] = sys_read8(config->reg_addr + in can_rcar_rx_isr()
419 frame.timestamp = sys_read8(config->reg_addr + in can_rcar_rx_isr()
422 frame.timestamp |= sys_read8(config->reg_addr + in can_rcar_rx_isr()
437 isr = sys_read8(config->reg_addr + RCAR_CAN_ISR); in can_rcar_isr()
447 unsent = sys_read8(config->reg_addr + RCAR_CAN_TFCR); in can_rcar_isr()
457 isr = sys_read8(config->reg_addr + RCAR_CAN_ISR); in can_rcar_isr()
[all …]
/Zephyr-latest/include/zephyr/arch/common/
Dsys_io.h23 static ALWAYS_INLINE uint8_t sys_read8(mem_addr_t addr) in sys_read8() function
/Zephyr-latest/include/zephyr/arch/arc/
Dsys-io-common.h23 static ALWAYS_INLINE uint8_t sys_read8(mem_addr_t addr) in sys_read8() function
/Zephyr-latest/include/zephyr/arch/arm/cortex_a_r/
Dsys_io.h27 static ALWAYS_INLINE uint8_t sys_read8(mem_addr_t addr) in sys_read8() function
/Zephyr-latest/include/zephyr/arch/arm64/
Dsys_io.h37 static ALWAYS_INLINE uint8_t sys_read8(mem_addr_t addr) in sys_read8() function
/Zephyr-latest/drivers/serial/
Duart_efinix_sapphire.c53 *c = (unsigned char)sys_read8(UART0_DATA_REG_ADDR); in uart_efinix_sapphire_poll_in()
/Zephyr-latest/include/zephyr/arch/riscv/
Dsys_io.h37 static ALWAYS_INLINE uint8_t sys_read8(mem_addr_t addr) in sys_read8() function
/Zephyr-latest/arch/x86/core/
Dearly_serial.c40 #define IN(reg) sys_read8(BASE + reg)
/Zephyr-latest/drivers/syscon/
Dsyscon.c65 *val = sys_read8(base_address + reg); in syscon_generic_read_reg()
/Zephyr-latest/drivers/interrupt_controller/
Dintc_renesas_ra_icu.c77 uint8_t reg = sys_read8(IRQCRi_REG(irqn)) & ~(IRQCRi_IRQMD_MASK); in ra_icu_irq_configure()
/Zephyr-latest/subsys/shell/modules/
Ddevmem_service.c66 value = sys_read8(addr + data_offset); in memory_dump()
265 value = sys_read8(addr); in memory_read()
/Zephyr-latest/drivers/flash/
Dsoc_flash_nrf_mram.c82 sys_write8(sys_read8(addr_end), addr_end); in commit_changes()
/Zephyr-latest/drivers/clock_control/
Dclock_control_nrf_auxpll.c116 nrf_auxpll_trim_ctune_set(config->auxpll, sys_read8(config->ficr_ctune)); in clock_control_nrf_auxpll_init()
/Zephyr-latest/drivers/reset/
Dreset_rpi_pico.c29 *value = sys_read8(base_address + offset); in reset_rpi_read_register()

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