Searched refs:quad (Results 1 – 25 of 55) sorted by relevance
123
| /Zephyr-latest/arch/arm64/core/ |
| D | header.S | 29 .quad 0 // Image load offset from start
32 .quad _flash_used // Effective size of kernel
35 .quad HEADER_FLAGS // Informative flags,
38 .quad 0 // reserved
39 .quad 0 // reserved
40 .quad 0 // reserved
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| /Zephyr-latest/boards/renesas/da1469x_dk_pro/dts/ |
| D | da1469x_dk_pro_psram.overlay | 35 rx-inst-mode = "quad-spi";
36 rx-addr-mode = "quad-spi";
37 rx-data-mode = "quad-spi";
38 rx-dummy-mode = "quad-spi";
39 rx-extra-mode = "quad-spi";
40 tx-inst-mode = "quad-spi";
41 tx-addr-mode = "quad-spi";
42 tx-data-mode = "quad-spi";
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| /Zephyr-latest/samples/boards/nxp/adsp/number_crunching/ |
| D | README.rst | 92 [Library Test] == Bi-quad Real Block IIR test ==
94 [Library Test] Bi-quad Real Block IIR takes 506702 cycles
95 [Library Test] == Bi-quad Real Block IIR end ==
130 [Library Test] == Bi-quad Real Block IIR test ==
132 [Library Test] Bi-quad Real Block IIR takes 13501 cycles
133 [Library Test] == Bi-quad Real Block IIR end ==
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| /Zephyr-latest/drivers/gpio/ |
| D | Kconfig.max14906 | 12 Enabe MAX14906 quad industrial digital
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| /Zephyr-latest/dts/arm/nuvoton/ |
| D | npcx4m3f.dtsi | 38 /* quad spi bus configuration of nor flash device */
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| D | npcx4m8f.dtsi | 38 /* quad spi bus configuration of nor flash device */
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| D | npcx9m3f.dtsi | 38 /* quad spi bus configuration of nor flash device */
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| D | npcx9m6f.dtsi | 38 /* quad spi bus configuration of nor flash device */
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| D | npcx9m7f.dtsi | 36 /* quad spi bus configuration of nor flash device */
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| D | npcx7m6fb.dtsi | 44 /* quad spi bus configuration of nor flash device */
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| D | npcx7m6fc.dtsi | 44 /* quad spi bus configuration of nor flash device */
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| D | npcx9m7fb.dtsi | 36 /* quad spi bus configuration of nor flash device */
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| D | npcx7m7fc.dtsi | 48 /* quad spi bus configuration of nor flash device */
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| D | npcx9mfp.dtsi | 55 /* quad spi bus configuration of nor flash device */
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| /Zephyr-latest/boards/nordic/nrf7002dk/ |
| D | nrf7002dk_nrf5340_cpuapp_nrf7001.dts | 32 qspi-quad-mode;
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| D | nrf7002dk_nrf5340_cpuapp.dts | 32 qspi-quad-mode;
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| /Zephyr-latest/doc/hardware/peripherals/ |
| D | espi.rst | 11 and target select) and three configurations: single IO, dual IO and quad IO.
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| /Zephyr-latest/arch/xtensa/core/ |
| D | README_WINDOWS.rst | 15 The first quad (A0-A3) is pointed to by a special register called
51 WINDOWSTART stores a bitmask with one bit per hardware quad (so it's 8
60 So the CPU executing RETW checks to make sure that the register quad
67 register's quad and WINDOWBASE. If there is, the CPU traps to a spill
71 to spill a second quad, and even a third time at maximum.
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| /Zephyr-latest/samples/drivers/jesd216/boards/ |
| D | nrf52840dk_nrf52840_spi.overlay | 14 * to provide quad-spi feature. In individual specifications each of the spi
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| /Zephyr-latest/soc/nuvoton/npcx/ |
| D | Kconfig | 80 Reading modes supported are normal, fast, dual, and quad.
92 bool "SPI flash operates with quad reading mode"
100 default "quad" if NPCX_HEADER_SPI_READ_MODE_QUAD
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| /Zephyr-latest/samples/subsys/fs/littlefs/boards/ |
| D | nrf52840dk_nrf52840_spi.overlay | 14 * to provide quad-spi feature. In individual specifications each of the spi
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| /Zephyr-latest/boards/adafruit/feather_nrf52840/ |
| D | adafruit_feather_nrf52840_common.dtsi | 121 quad-enable-requirements = "S2B1v1";
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| /Zephyr-latest/boards/seeed/xiao_ble/ |
| D | xiao_ble_common.dtsi | 123 quad-enable-requirements = "S2B1v1";
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| /Zephyr-latest/soc/microchip/mec/ |
| D | Kconfig | 62 Reading modes supported are normal, fast, dual, and quad.
74 bool "SPI flash operates with quad data reading mode"
83 default "quad" if MCHP_MEC_HEADER_SPI_READ_MODE_QUAD
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| /Zephyr-latest/boards/adafruit/itsybitsy/ |
| D | adafruit_itsybitsy_nrf52840.dts | 130 quad-enable-requirements = "S2B1v1";
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