Searched refs:csrw (Results 1 – 15 of 15) sorted by relevance
| /Zephyr-latest/soc/neorv32/ |
| D | reset.S | 17 csrw mstatus, x0
18 csrw mie, x0
22 csrw mcounteren, x0
27 csrw mcountinhibit, x11
30 csrw mcycle, x0
31 csrw mcycleh, x0
32 csrw minstret, x0
33 csrw minstreth, x0
|
| /Zephyr-latest/soc/common/riscv-privileged/ |
| D | vector.S | 50 csrw mtvec, t0
65 csrw 0x307, t0 /* mtvt */
83 csrw mtvec, t0
93 csrw mtvec, t0
104 csrw mtvec, t0
|
| /Zephyr-latest/soc/openisa/rv32m1/ |
| D | soc_irq.S | 73 csrw RI5CY_LPSTART0, t0
74 csrw RI5CY_LPEND0, t1
75 csrw RI5CY_LPCOUNT0, t2
79 csrw RI5CY_LPSTART1, t0
80 csrw RI5CY_LPEND1, t1
81 csrw RI5CY_LPCOUNT1, t2
|
| D | vector.S | 78 csrw 0x305, t0
|
| /Zephyr-latest/soc/andestech/ae350/ |
| D | soc_irq.S | 45 csrw NDS_MXSTATUS, t0
48 csrw NDS_UCODE, t1
|
| D | start.S | 22 csrw NDS_UITB, t0
|
| /Zephyr-latest/soc/telink/tlsr/tlsr951x/ |
| D | soc_irq.S | 49 csrw NDS_MXSTATUS, t0
52 csrw ucode, t1
|
| D | start.S | 38 csrw NDS_MCACHE_CTL, t0
|
| /Zephyr-latest/arch/riscv/core/ |
| D | pmp.S | 52 csrw (CSR_PMPADDR_BASE + _index), t0
81 csrw (CSR_PMPCFG_BASE + RV_REGSIZE/4 * _index), t0
102 csrw (CSR_PMPCFG_BASE + RV_REGSIZE/4 * _index), zero
|
| D | isr.S | 750 csrw mcause, t1
753 csrw mepc, t0
754 csrw mstatus, t2
|
| /Zephyr-latest/soc/nordic/common/vpr/ |
| D | soc_context.S | 20 csrw 0x347, t0
|
| D | soc_isr_stacking.h | 111 csrw mscratch, t0; \
|
| /Zephyr-latest/soc/wch/ch32v/qingke_v2a/ |
| D | vector.S | 28 csrw mtvec, a0
|
| /Zephyr-latest/soc/wch/ch32v/qingke_v4c/ |
| D | vector.S | 28 csrw mtvec, a0
|
| /Zephyr-latest/soc/ite/ec/common/ |
| D | vector.S | 59 csrw mtvec, t0
|
