| /hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/ |
| D | core-isa.h | 243 #define XCHAL_INTLEVEL2_MASK 0x00000100 macro
|
| /hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/ |
| D | core-isa.h | 345 #define XCHAL_INTLEVEL2_MASK 0x000000F0 macro
|
| /hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/ |
| D | core-isa.h | 345 #define XCHAL_INTLEVEL2_MASK 0x000000F0 macro
|
| /hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/ |
| D | core-isa.h | 345 #define XCHAL_INTLEVEL2_MASK 0x000000F0 macro
|
| /hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/ |
| D | core-isa.h | 368 #define XCHAL_INTLEVEL2_MASK 0x000000F0 macro
|
| /hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/ |
| D | core-isa.h | 364 #define XCHAL_INTLEVEL2_MASK 0x00000100 macro
|
| /hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/ |
| D | core-isa.h | 333 #define XCHAL_INTLEVEL2_MASK 0x7FFFFEF4 macro
|
| /hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/ |
| D | core-isa.h | 333 #define XCHAL_INTLEVEL2_MASK 0x7FFFFEF4 macro
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| /hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/ |
| D | core-isa.h | 459 #define XCHAL_INTLEVEL2_MASK 0x0000001C macro
|
| /hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/ |
| D | core-isa.h | 459 #define XCHAL_INTLEVEL2_MASK 0x0000001C macro
|
| /hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/ |
| D | core-isa.h | 431 #define XCHAL_INTLEVEL2_MASK 0x0142FF00 macro
|
| /hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/ |
| D | core-isa.h | 360 #define XCHAL_INTLEVEL2_MASK 0x00FF0006 macro
|
| /hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/ |
| D | core-isa.h | 438 #define XCHAL_INTLEVEL2_MASK 0x00000100 macro
|
| D | core.h | 225 XCHAL_SEP XCHAL_INTLEVEL2_MASK \
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| /hal_xtensa-latest/src/hal/ |
| D | interrupts.c | 281 {0,0,0,0, XCHAL_INTLEVEL2_MASK,0,0,0, 0,0,0,0, 0,0,0,0},
|
| /hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/ |
| D | core-isa.h | 460 #define XCHAL_INTLEVEL2_MASK 0x00FF0006 macro
|
| /hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/ |
| D | core-isa.h | 474 #define XCHAL_INTLEVEL2_MASK 0x00FF0006 macro
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| /hal_xtensa-latest/include/xtensa/config/ |
| D | core.h | 188 XCHAL_SEP XCHAL_INTLEVEL2_MASK \
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