Home
last modified time | relevance | path

Searched refs:EUSCI_A_CTLW0_MST (Results 1 – 9 of 9) sorted by relevance

/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/driverlib/
Dspi.c96 …_A_CTLW0_CKPH + EUSCI_A_CTLW0_CKPL + EUSCI_A_CTLW0_SEVENBIT + EUSCI_A_CTLW0_MSB + EUSCI_A_CTLW0_MST in SPI_initMaster()
100 + EUSCI_A_CTLW0_MST + EUSCI_A_CTLW0_SYNC + config->spiMode); in SPI_initMaster()
152 …_A_CTLW0_CKPH + EUSCI_A_CTLW0_CKPL + EUSCI_A_CTLW0_SEVENBIT + EUSCI_A_CTLW0_MSB + EUSCI_A_CTLW0_MST in SPI_initMaster()
156 + EUSCI_A_CTLW0_MST + EUSCI_A_CTLW0_SYNC + config->spiMode); in SPI_initMaster()
230 …& ~(EUSCI_A_CTLW0_MSB + EUSCI_A_CTLW0_SEVENBIT + EUSCI_A_CTLW0_MST + EUSCI_A_CTLW0_CKPL + EUSCI_A_… in SPI_initSlave()
266 …& ~(EUSCI_A_CTLW0_MSB + EUSCI_A_CTLW0_SEVENBIT + EUSCI_A_CTLW0_MST + EUSCI_A_CTLW0_CKPL + EUSCI_A_… in SPI_initSlave()
661 …& ~(EUSCI_A_CTLW0_MSB + EUSCI_A_CTLW0_SEVENBIT + EUSCI_A_CTLW0_MST + EUSCI_A_CTLW0_CKPL + EUSCI_A_… in EUSCI_B_SPI_slaveInit()
1072 …& ~(EUSCI_A_CTLW0_MSB + EUSCI_A_CTLW0_SEVENBIT + EUSCI_A_CTLW0_MST + EUSCI_A_CTLW0_CKPL + EUSCI_A_… in EUSCI_A_SPI_slaveInit()
/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/inc/
Dmsp432p401m_classic.h2559 #define UCMST EUSCI_A_CTLW0_MST /*!< Master mode s…
Dmsp432p401r_classic.h2559 #define UCMST EUSCI_A_CTLW0_MST /*!< Master mode s…
Dmsp432p401m.h3590 #define EUSCI_A_CTLW0_MST ((uint16_t)0x0800) /*!< Master mode s… macro
Dmsp432p401r.h3590 #define EUSCI_A_CTLW0_MST ((uint16_t)0x0800) /*!< Master mode s… macro
Dmsp432p4111.h3570 #define EUSCI_A_CTLW0_MST ((uint16_t)0x0800) /*!< Master mode s… macro
Dmsp432p411v.h3570 #define EUSCI_A_CTLW0_MST ((uint16_t)0x0800) /*!< Master mode s… macro
Dmsp432p411y.h3570 #define EUSCI_A_CTLW0_MST ((uint16_t)0x0800) /*!< Master mode s… macro
Dmsp432p4xx.h2967 #define EUSCI_A_CTLW0_MST ((uint16_t)0x0800) /*!< Master mode s… macro