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Searched refs:DMA_INT0_SRCFLG_CH20 (Results 1 – 6 of 6) sorted by relevance

/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/inc/
Dmsp432p401m.h3196 #define DMA_INT0_SRCFLG_CH20 ((uint32_t)0x00100000) /*!< Channel 20 wa… macro
Dmsp432p401r.h3196 #define DMA_INT0_SRCFLG_CH20 ((uint32_t)0x00100000) /*!< Channel 20 wa… macro
Dmsp432p4111.h3176 #define DMA_INT0_SRCFLG_CH20 ((uint32_t)0x00100000) /*!< Channel 20 wa… macro
Dmsp432p411v.h3176 #define DMA_INT0_SRCFLG_CH20 ((uint32_t)0x00100000) /*!< Channel 20 wa… macro
Dmsp432p411y.h3176 #define DMA_INT0_SRCFLG_CH20 ((uint32_t)0x00100000) /*!< Channel 20 wa… macro
Dmsp432p4xx.h2696 #define DMA_INT0_SRCFLG_CH20 ((uint32_t)0x00100000) /*!< Channel 20 wa… macro