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Searched refs:CTL0 (Results 1 – 19 of 19) sorted by relevance

/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/driverlib/
Dref_a.c39 REF_A->CTL0 = (REF_A->CTL0 & ~REF_A_CTL0_VSEL_3) | referenceVoltageSelect; in REF_A_setReferenceVoltage()
44 BITBAND_PERI(REF_A->CTL0,REF_A_CTL0_TCOFF_OFS) = 1; in REF_A_disableTempSensor()
49 BITBAND_PERI(REF_A->CTL0,REF_A_CTL0_TCOFF_OFS) = 0; in REF_A_enableTempSensor()
54 BITBAND_PERI(REF_A->CTL0,REF_A_CTL0_OUT_OFS) = 1; in REF_A_enableReferenceVoltageOutput()
59 BITBAND_PERI(REF_A->CTL0,REF_A_CTL0_OUT_OFS) = 0; in REF_A_disableReferenceVoltageOutput()
64 BITBAND_PERI(REF_A->CTL0,REF_A_CTL0_ON_OFS) = 1; in REF_A_enableReferenceVoltage()
69 BITBAND_PERI(REF_A->CTL0,REF_A_CTL0_ON_OFS) = 0; in REF_A_disableReferenceVoltage()
74 return (REF_A->CTL0 & REF_A_CTL0_BGMODE); in REF_A_getBandgapMode()
79 return BITBAND_PERI(REF_A->CTL0,REF_A_CTL0_BGACT_OFS); in REF_A_isBandgapActive()
84 return BITBAND_PERI(REF_A->CTL0,REF_A_CTL0_GENBUSY_OFS); in REF_A_isRefGenBusy()
[all …]
Drtc_c.c39 RTC_C->CTL0 = (RTC_C->CTL0 & ~RTC_C_CTL0_KEY_MASK) | RTC_C_KEY; in RTC_C_startClock()
41 BITBAND_PERI(RTC_C->CTL0, RTC_C_CTL0_KEY_OFS) = 0; in RTC_C_startClock()
46 RTC_C->CTL0 = (RTC_C->CTL0 & ~RTC_C_CTL0_KEY_MASK) | RTC_C_KEY; in RTC_C_holdClock()
48 BITBAND_PERI(RTC_C->CTL0, RTC_C_CTL0_KEY_OFS) = 0; in RTC_C_holdClock()
53 RTC_C->CTL0 = (RTC_C->CTL0 & ~RTC_C_CTL0_KEY_MASK) | RTC_C_KEY; in RTC_C_setCalibrationFrequency()
55 BITBAND_PERI(RTC_C->CTL0, RTC_C_CTL0_KEY_OFS) = 0; in RTC_C_setCalibrationFrequency()
61 RTC_C->CTL0 = (RTC_C->CTL0 & ~RTC_C_CTL0_KEY_MASK) | RTC_C_KEY; in RTC_C_setCalibrationData()
63 BITBAND_PERI(RTC_C->CTL0, RTC_C_CTL0_KEY_OFS) = 0; in RTC_C_setCalibrationData()
83 RTC_C->CTL0 = (RTC_C->CTL0 & ~RTC_C_CTL0_KEY_MASK) | RTC_C_KEY; in RTC_C_initCalendar()
100 BITBAND_PERI(RTC_C->CTL0, RTC_C_CTL0_KEY_OFS) = 0; in RTC_C_initCalendar()
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Dpss.c56 BITBAND_PERI(PSS->CTL0, PSS_CTL0_DCDC_FORCE_OFS) = 1; in PSS_enableForcedDCDCOperation()
65 BITBAND_PERI(PSS->CTL0, PSS_CTL0_DCDC_FORCE_OFS) = 0; in PSS_disableForcedDCDCOperation()
76 PSS->CTL0 |= (PSS_CTL0_SVMHOE | PSS_CTL0_SVMHOUTPOLAL); in PSS_enableHighSidePinToggle()
79 BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVMHOUTPOLAL_OFS) = 0; in PSS_enableHighSidePinToggle()
80 BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVMHOE_OFS) = 1; in PSS_enableHighSidePinToggle()
90 BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVMHOE_OFS) = 0; in PSS_disableHighSidePinToggle()
99 BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHOFF_OFS) = 0; in PSS_enableHighSide()
108 BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHOFF_OFS) = 1; in PSS_disableHighSide()
118 BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHLP_OFS) = 0; in PSS_setHighSidePerformanceMode()
120 BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHLP_OFS) = 1; in PSS_setHighSidePerformanceMode()
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Daes256.c42 AES256_CMSIS(moduleInstance)->CTL0 |= 0; in AES256_setCipherKey()
47 AES256_CMSIS(moduleInstance)->CTL0 |= AES256_CTL0_KL__128BIT; in AES256_setCipherKey()
51 AES256_CMSIS(moduleInstance)->CTL0 |= AES256_CTL0_KL__192BIT; in AES256_setCipherKey()
55 AES256_CMSIS(moduleInstance)->CTL0 |= AES256_CTL0_KL__256BIT; in AES256_setCipherKey()
85 AES256_CMSIS(moduleInstance)->CTL0 &= ~AES256_CTL0_OP_MASK; in AES256_encryptData()
120 AES256_CMSIS(moduleInstance)->CTL0 |= (AES256_CTL0_OP_3); in AES256_decryptData()
154 AES256_CMSIS(moduleInstance)->CTL0 = in AES256_setDecipherKey()
155 (AES256_CMSIS(moduleInstance)->CTL0 & ~AES256_CTL0_OP_MASK) | AES256_CTL0_OP1; in AES256_setDecipherKey()
160 AES256_CMSIS(moduleInstance)->CTL0 |= AES256_CTL0_KL__128BIT; in AES256_setDecipherKey()
164 AES256_CMSIS(moduleInstance)->CTL0 |= AES256_CTL0_KL__192BIT; in AES256_setDecipherKey()
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Dadc14.c143 return BITBAND_PERI(ADC14->CTL0, ADC14_CTL0_BUSY_OFS); in ADCIsConversionRunning()
148 BITBAND_PERI(ADC14->CTL0, ADC14_CTL0_ON_OFS) = 1; in ADC14_enableModule()
156 BITBAND_PERI(ADC14->CTL0, ADC14_CTL0_ON_OFS) = 0; in ADC14_disableModule()
166 BITBAND_PERI(ADC14->CTL0, ADC14_CTL0_SHP_OFS) = 1; in ADC14_enableSampleTimer()
170 BITBAND_PERI(ADC14->CTL0, ADC14_CTL0_MSC_OFS) = 0; in ADC14_enableSampleTimer()
173 BITBAND_PERI(ADC14->CTL0, ADC14_CTL0_MSC_OFS) = 1; in ADC14_enableSampleTimer()
184 BITBAND_PERI(ADC14->CTL0, ADC14_CTL0_SHP_OFS) = 0; in ADC14_disableSampleTimer()
223 ADC14->CTL0 = (ADC14->CTL0 in ADC14_initModule()
265 ADC14->CTL0 = (ADC14->CTL0 in ADC14_setSampleHoldTrigger()
270 ADC14->CTL0 = (ADC14->CTL0 in ADC14_setSampleHoldTrigger()
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Dpcm.c64 regValue = PCM->CTL0; in __PCM_setCoreVoltageLevelAdvanced()
71 PCM->CTL0 = (PCM_KEY | (PCM_AM_LDO_VCORE1) in __PCM_setCoreVoltageLevelAdvanced()
77 PCM->CTL0 = (PCM_KEY | (PCM_AM_LDO_VCORE0) in __PCM_setCoreVoltageLevelAdvanced()
215 regValue = PCM->CTL0; in __PCM_setPowerModeAdvanced()
221 PCM->CTL0 = (PCM_KEY | PCM_AM_LDO_VCORE0 in __PCM_setPowerModeAdvanced()
226 PCM->CTL0 = (PCM_KEY | PCM_AM_LDO_VCORE1 in __PCM_setPowerModeAdvanced()
233 PCM->CTL0 = (PCM_KEY | PCM_AM_DCDC_VCORE1 in __PCM_setPowerModeAdvanced()
237 PCM->CTL0 = (PCM_KEY | PCM_AM_LF_VCORE1 in __PCM_setPowerModeAdvanced()
248 PCM->CTL0 = (PCM_KEY | PCM_AM_DCDC_VCORE0 in __PCM_setPowerModeAdvanced()
252 PCM->CTL0 = (PCM_KEY | PCM_AM_LF_VCORE0 in __PCM_setPowerModeAdvanced()
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Dcs.c178 switch (CS->CTL0 & CS_CTL0_DCORSEL_MASK) in _CSGetDOCFrequency()
533 BITBAND_PERI(CS->CTL0,CS_CTL0_DCORES_OFS) = 1; in CS_enableDCOExternalResistor()
547 rselVal = (CS->CTL0 | CS_CTL0_DCORSEL_MASK) >> CS_CTL0_DCORSEL_OFS; in CS_setDCOExternalResistorCalibration()
549 CS->CTL0 &= ~CS_CTL0_DCORSEL_MASK; in CS_setDCOExternalResistorCalibration()
561 CS->CTL0 |= (rselVal) << CS_CTL0_DCORSEL_OFS; in CS_setDCOExternalResistorCalibration()
573 BITBAND_PERI(CS->CTL0,CS_CTL0_DCORES_OFS) = 0; in CS_disableDCOExternalResistor()
592 CS->CTL0 = ((CS->CTL0 & ~CS_CTL0_DCORSEL_MASK) | dcoFreq); in CS_setDCOCenteredFrequency()
610 CS->CTL0 = ((CS->CTL0 & ~dcoTuneMask) | (tuneParameter & dcoTuneMask) in CS_tuneDCOFrequency()
614 CS->CTL0 = ((CS->CTL0 & ~dcoTuneMask) | (tuneParameter & dcoTuneMask)); in CS_tuneDCOFrequency()
648 dcoTune = CS->CTL0 & 0x3FF; in CS_getDCOFrequency()
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Dcomp_e.c96 COMP_E_CMSIS(comparator)->CTL0 = 0; in COMP_E_initModule()
103 COMP_E_CMSIS(comparator)->CTL0 |= COMP_E_CTL0_IPEN in COMP_E_initModule()
118 COMP_E_CMSIS(comparator)->CTL0 |= COMP_E_CTL0_IMEN in COMP_E_initModule()
/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/startup_system_files/
Dsystem_msp432p4111.c161 dcoTune = (CS->CTL0 & CS_CTL0_DCOTUNE_MASK) >> CS_CTL0_DCOTUNE_OFS; in SystemCoreClockUpdate()
163 switch(CS->CTL0 & CS_CTL0_DCORSEL_MASK) in SystemCoreClockUpdate()
197 if (BITBAND_PERI(CS->CTL0, CS_CTL0_DCORES_OFS)) in SystemCoreClockUpdate()
297 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
305 CS->CTL0 = CS_CTL0_DCORSEL_0; // Set DCO to 1.5MHz in SystemInit()
319 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
327 …CS->CTL0 = CS_CTL0_DCORSEL_1; // Set DCO to 1.5MHz in SystemInit()
341 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
349 … CS->CTL0 = CS_CTL0_DCORSEL_3; // Set DCO to 12MHz in SystemInit()
363 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
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Dsystem_msp432p411v.c161 dcoTune = (CS->CTL0 & CS_CTL0_DCOTUNE_MASK) >> CS_CTL0_DCOTUNE_OFS; in SystemCoreClockUpdate()
163 switch(CS->CTL0 & CS_CTL0_DCORSEL_MASK) in SystemCoreClockUpdate()
197 if (BITBAND_PERI(CS->CTL0, CS_CTL0_DCORES_OFS)) in SystemCoreClockUpdate()
297 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
305 CS->CTL0 = CS_CTL0_DCORSEL_0; // Set DCO to 1.5MHz in SystemInit()
319 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
327 …CS->CTL0 = CS_CTL0_DCORSEL_1; // Set DCO to 1.5MHz in SystemInit()
341 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
349 … CS->CTL0 = CS_CTL0_DCORSEL_3; // Set DCO to 12MHz in SystemInit()
363 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
[all …]
Dsystem_msp432p411y.c161 dcoTune = (CS->CTL0 & CS_CTL0_DCOTUNE_MASK) >> CS_CTL0_DCOTUNE_OFS; in SystemCoreClockUpdate()
163 switch(CS->CTL0 & CS_CTL0_DCORSEL_MASK) in SystemCoreClockUpdate()
197 if (BITBAND_PERI(CS->CTL0, CS_CTL0_DCORES_OFS)) in SystemCoreClockUpdate()
297 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
305 CS->CTL0 = CS_CTL0_DCORSEL_0; // Set DCO to 1.5MHz in SystemInit()
319 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
327 …CS->CTL0 = CS_CTL0_DCORSEL_1; // Set DCO to 1.5MHz in SystemInit()
341 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
349 … CS->CTL0 = CS_CTL0_DCORSEL_3; // Set DCO to 12MHz in SystemInit()
363 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
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Dsystem_msp432p401m.c161 dcoTune = (CS->CTL0 & CS_CTL0_DCOTUNE_MASK) >> CS_CTL0_DCOTUNE_OFS; in SystemCoreClockUpdate()
163 switch(CS->CTL0 & CS_CTL0_DCORSEL_MASK) in SystemCoreClockUpdate()
197 if (BITBAND_PERI(CS->CTL0, CS_CTL0_DCORES_OFS)) in SystemCoreClockUpdate()
287 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
295 CS->CTL0 = CS_CTL0_DCORSEL_0; // Set DCO to 1.5MHz in SystemInit()
310 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
318 CS->CTL0 = CS_CTL0_DCORSEL_1; // Set DCO to 1.5MHz in SystemInit()
333 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
341 CS->CTL0 = CS_CTL0_DCORSEL_3; // Set DCO to 12MHz in SystemInit()
356 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
[all …]
Dsystem_msp432p401r.c161 dcoTune = (CS->CTL0 & CS_CTL0_DCOTUNE_MASK) >> CS_CTL0_DCOTUNE_OFS; in SystemCoreClockUpdate()
163 switch(CS->CTL0 & CS_CTL0_DCORSEL_MASK) in SystemCoreClockUpdate()
197 if (BITBAND_PERI(CS->CTL0, CS_CTL0_DCORES_OFS)) in SystemCoreClockUpdate()
287 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
295 CS->CTL0 = CS_CTL0_DCORSEL_0; // Set DCO to 1.5MHz in SystemInit()
310 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
318 CS->CTL0 = CS_CTL0_DCORSEL_1; // Set DCO to 1.5MHz in SystemInit()
333 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
341 CS->CTL0 = CS_CTL0_DCORSEL_3; // Set DCO to 12MHz in SystemInit()
356 PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_4; in SystemInit()
[all …]
/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/inc/
Dmsp432p401m.h351 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
379 …__IO uint16_t CTL0; /*!< AES Accelerato… member
413 …__IO uint16_t CTL0; /*!< Comparator Con… member
460 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
979 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
1027 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
1044 …__IO uint16_t CTL0; /*!< REF Control Re… member
1087 …__IO uint16_t CTL0; /*!< RTCCTL0 Regist… member
Dmsp432p401r.h351 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
379 …__IO uint16_t CTL0; /*!< AES Accelerato… member
413 …__IO uint16_t CTL0; /*!< Comparator Con… member
460 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
979 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
1027 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
1044 …__IO uint16_t CTL0; /*!< REF Control Re… member
1087 …__IO uint16_t CTL0; /*!< RTCCTL0 Regist… member
Dmsp432p4111.h343 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
371 …__IO uint16_t CTL0; /*!< AES Accelerato… member
405 …__IO uint16_t CTL0; /*!< Comparator Con… member
452 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
1019 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
1067 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
1084 …__IO uint16_t CTL0; /*!< REF Control Re… member
1127 …__IO uint16_t CTL0; /*!< RTCCTL0 Regist… member
Dmsp432p411v.h343 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
371 …__IO uint16_t CTL0; /*!< AES Accelerato… member
405 …__IO uint16_t CTL0; /*!< Comparator Con… member
452 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
1019 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
1067 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
1084 …__IO uint16_t CTL0; /*!< REF Control Re… member
1127 …__IO uint16_t CTL0; /*!< RTCCTL0 Regist… member
Dmsp432p411y.h343 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
371 …__IO uint16_t CTL0; /*!< AES Accelerato… member
405 …__IO uint16_t CTL0; /*!< Comparator Con… member
452 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
1019 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
1067 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
1084 …__IO uint16_t CTL0; /*!< REF Control Re… member
1127 …__IO uint16_t CTL0; /*!< RTCCTL0 Regist… member
Dmsp432p4xx.h343 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
362 …__IO uint16_t CTL0; /*!< AES Accelerato… member
378 …__IO uint16_t CTL0; /*!< Comparator Con… member
407 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
889 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
919 …__IO uint32_t CTL0; /*!< Control 0 Regi… member
927 …__IO uint16_t CTL0; /*!< REF Control Re… member
962 …__IO uint16_t CTL0; /*!< RTCCTL0 Regist… member