Searched refs:TIM1_OR2_BKCMP1E_Pos (Results 1 – 25 of 29) sorted by relevance
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2135 bkin_enable_bitpos = TIM1_OR2_BKCMP1E_Pos; in HAL_TIMEx_ConfigBreakInput()
2145 bkin_enable_bitpos = TIM1_OR2_BKCMP1E_Pos; in HAL_TIMEx_ConfigBreakInput()
8731 #define TIM1_OR2_BKCMP1E_Pos (1U) macro8732 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
8506 #define TIM1_OR2_BKCMP1E_Pos (1U) macro8507 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
13212 #define TIM1_OR2_BKCMP1E_Pos (1U) macro13213 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
13317 #define TIM1_OR2_BKCMP1E_Pos (1U) macro13318 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
12378 #define TIM1_OR2_BKCMP1E_Pos (1U) macro12379 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
12983 #define TIM1_OR2_BKCMP1E_Pos (1U) macro12984 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
12153 #define TIM1_OR2_BKCMP1E_Pos (1U) macro12154 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
13437 #define TIM1_OR2_BKCMP1E_Pos (1U) macro13438 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
14335 #define TIM1_OR2_BKCMP1E_Pos (1U) macro14336 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
13395 #define TIM1_OR2_BKCMP1E_Pos (1U) macro13396 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
13620 #define TIM1_OR2_BKCMP1E_Pos (1U) macro13621 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
14499 #define TIM1_OR2_BKCMP1E_Pos (1U) macro14500 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
14656 #define TIM1_OR2_BKCMP1E_Pos (1U) macro14657 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
14875 #define TIM1_OR2_BKCMP1E_Pos (1U) macro14876 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
14724 #define TIM1_OR2_BKCMP1E_Pos (1U) macro14725 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
16206 #define TIM1_OR2_BKCMP1E_Pos (1U) macro16207 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
15866 #define TIM1_OR2_BKCMP1E_Pos (1U) macro15867 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
16340 #define TIM1_OR2_BKCMP1E_Pos (1U) macro16341 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
16839 #define TIM1_OR2_BKCMP1E_Pos (1U) macro16840 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
16687 #define TIM1_OR2_BKCMP1E_Pos (1U) macro16688 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
17186 #define TIM1_OR2_BKCMP1E_Pos (1U) macro17187 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
14854 #define TIM1_OR2_BKCMP1E_Pos (1U) macro14855 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
15593 #define TIM1_OR2_BKCMP1E_Pos (1U) macro15594 #define TIM1_OR2_BKCMP1E_Msk (0x1UL << TIM1_OR2_BKCMP1E_Pos) /*!< 0x00000002 */
