Home
last modified time | relevance | path

Searched refs:PWR_PUCRC_PC5_Pos (Results 1 – 25 of 44) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h5733 #define PWR_PUCRC_PC5_Pos (5U) macro
5734 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32wle5xx.h5733 #define PWR_PUCRC_PC5_Pos (5U) macro
5734 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32wl5mxx.h6521 #define PWR_PUCRC_PC5_Pos (5U) macro
6522 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32wl54xx.h6521 #define PWR_PUCRC_PC5_Pos (5U) macro
6522 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32wl55xx.h6521 #define PWR_PUCRC_PC5_Pos (5U) macro
6522 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h6706 #define PWR_PUCRC_PC5_Pos (5U) macro
6707 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32g411xc.h6871 #define PWR_PUCRC_PC5_Pos (5U) macro
6872 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32g441xx.h7060 #define PWR_PUCRC_PC5_Pos (5U) macro
7061 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32gbk1cb.h6825 #define PWR_PUCRC_PC5_Pos (5U) macro
6826 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32g431xx.h6839 #define PWR_PUCRC_PC5_Pos (5U) macro
6840 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32g4a1xx.h7224 #define PWR_PUCRC_PC5_Pos (5U) macro
7225 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32g491xx.h7003 #define PWR_PUCRC_PC5_Pos (5U) macro
7004 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32g473xx.h7588 #define PWR_PUCRC_PC5_Pos (5U) macro
7589 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32g471xx.h7074 #define PWR_PUCRC_PC5_Pos (5U) macro
7075 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32g483xx.h7809 #define PWR_PUCRC_PC5_Pos (5U) macro
7810 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h5404 #define PWR_PUCRC_PC5_Pos (5U) macro
5405 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32l412xx.h5188 #define PWR_PUCRC_PC5_Pos (5U) macro
5189 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32l433xx.h8960 #define PWR_PUCRC_PC5_Pos (5U) macro
8961 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32l451xx.h9125 #define PWR_PUCRC_PC5_Pos (5U) macro
9126 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32l431xx.h8868 #define PWR_PUCRC_PC5_Pos (5U) macro
8869 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32l443xx.h9176 #define PWR_PUCRC_PC5_Pos (5U) macro
9177 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32l471xx.h9832 #define PWR_PUCRC_PC5_Pos (5U) macro
9833 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb35xx.h6671 #define PWR_PUCRC_PC5_Pos (5U) macro
6672 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32wb55xx.h6759 #define PWR_PUCRC_PC5_Pos (5U) macro
6760 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */
Dstm32wb5mxx.h6759 #define PWR_PUCRC_PC5_Pos (5U) macro
6760 #define PWR_PUCRC_PC5_Msk (0x1UL << PWR_PUCRC_PC5_Pos) /*!< 0x00000020 */

12