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Searched refs:GTZC_CFGR4_GPDMA1_Pos (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_gtzc.h210 #define GTZC_PERIPH_GPDMA1 (GTZC_PERIPH_REG4 | GTZC_CFGR4_GPDMA1_Pos)
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_gtzc.h363 #define GTZC_PERIPH_GPDMA1 (GTZC1_PERIPH_REG4 | GTZC_CFGR4_GPDMA1_Pos)
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_gtzc.h300 #define GTZC_PERIPH_GPDMA1 (GTZC1_PERIPH_REG4 | GTZC_CFGR4_GPDMA1_Pos)
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h15843 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
15844 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
16207 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
16357 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
16507 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
Dstm32h562xx.h17197 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
17198 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
17675 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
17863 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
18051 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
Dstm32h533xx.h16398 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
16399 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
16782 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
16940 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
17098 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
Dstm32h573xx.h19854 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
19855 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
20370 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
20572 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
20774 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
Dstm32h563xx.h19299 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
19300 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
19795 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
19989 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
20183 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
Dstm32h503xx.h10903 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
10904 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h18471 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
18472 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
18883 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
19053 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
19221 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
Dstm32u535xx.h17913 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
17914 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
18305 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
18467 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
18627 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
Dstm32u575xx.h19522 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
19523 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
19968 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
20154 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
20340 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
Dstm32u585xx.h20138 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
20139 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
20606 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
20802 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
20998 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
Dstm32u595xx.h20705 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
20706 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
21187 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
21389 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
21591 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
Dstm32u5a5xx.h21321 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
21322 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
21825 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
22037 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
22249 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
Dstm32u5f7xx.h22310 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
22311 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
22832 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
23050 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
23268 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
Dstm32u599xx.h24489 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
24490 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
25001 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
25213 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
25425 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
Dstm32u5g7xx.h22926 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
22927 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
23470 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
23698 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
23926 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
Dstm32u5f9xx.h25453 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
25454 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
25981 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
26201 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
26421 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
Dstm32u5a9xx.h25105 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
25106 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
25639 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
25861 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
26083 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
Dstm32u5g9xx.h26069 #define GTZC_CFGR4_GPDMA1_Pos (0U) macro
26070 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
26619 #define GTZC_TZIC1_IER4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
26849 #define GTZC_TZIC1_SR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
27079 #define GTZC_TZIC1_FCR4_GPDMA1_Pos GTZC_CFGR4_GPDMA1_Pos
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba52xx.h5684 #define GTZC_CFGR4_GPDMA1_Pos GTZC_TZIC_IER4_GPDMA1IE_Pos macro
5685 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
Dstm32wba54xx.h5873 #define GTZC_CFGR4_GPDMA1_Pos GTZC_TZIC_IER4_GPDMA1IE_Pos macro
5874 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
Dstm32wba5mxx.h5873 #define GTZC_CFGR4_GPDMA1_Pos GTZC_TZIC_IER4_GPDMA1IE_Pos macro
5874 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)
Dstm32wba55xx.h5873 #define GTZC_CFGR4_GPDMA1_Pos GTZC_TZIC_IER4_GPDMA1IE_Pos macro
5874 #define GTZC_CFGR4_GPDMA1_Msk (0x01UL << GTZC_CFGR4_GPDMA1_Pos)