Searched refs:GTZC_CFGR3_GFXMMU_REG_Pos (Results 1 – 7 of 7) sorted by relevance
289 #define GTZC_PERIPH_GFXMMU_REG (GTZC1_PERIPH_REG3 | GTZC_CFGR3_GFXMMU_REG_Pos)
22300 #define GTZC_CFGR3_GFXMMU_REG_Pos (25U) macro22301 #define GTZC_CFGR3_GFXMMU_REG_Msk (0x01UL << GTZC_CFGR3_GFXMMU_REG_Pos)22518 #define GTZC_TZSC1_SECCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos22670 #define GTZC_TZSC1_PRIVCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos22822 #define GTZC_TZIC1_IER3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos23040 #define GTZC_TZIC1_SR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos23258 #define GTZC_TZIC1_FCR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos
24481 #define GTZC_CFGR3_GFXMMU_REG_Pos (25U) macro24482 #define GTZC_CFGR3_GFXMMU_REG_Msk (0x01UL << GTZC_CFGR3_GFXMMU_REG_Pos)24693 #define GTZC_TZSC1_SECCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos24843 #define GTZC_TZSC1_PRIVCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos24993 #define GTZC_TZIC1_IER3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos25205 #define GTZC_TZIC1_SR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos25417 #define GTZC_TZIC1_FCR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos
22916 #define GTZC_CFGR3_GFXMMU_REG_Pos (25U) macro22917 #define GTZC_CFGR3_GFXMMU_REG_Msk (0x01UL << GTZC_CFGR3_GFXMMU_REG_Pos)23144 #define GTZC_TZSC1_SECCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos23302 #define GTZC_TZSC1_PRIVCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos23460 #define GTZC_TZIC1_IER3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos23688 #define GTZC_TZIC1_SR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos23916 #define GTZC_TZIC1_FCR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos
25443 #define GTZC_CFGR3_GFXMMU_REG_Pos (25U) macro25444 #define GTZC_CFGR3_GFXMMU_REG_Msk (0x01UL << GTZC_CFGR3_GFXMMU_REG_Pos)25663 #define GTZC_TZSC1_SECCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos25817 #define GTZC_TZSC1_PRIVCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos25971 #define GTZC_TZIC1_IER3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos26191 #define GTZC_TZIC1_SR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos26411 #define GTZC_TZIC1_FCR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos
25097 #define GTZC_CFGR3_GFXMMU_REG_Pos (25U) macro25098 #define GTZC_CFGR3_GFXMMU_REG_Msk (0x01UL << GTZC_CFGR3_GFXMMU_REG_Pos)25319 #define GTZC_TZSC1_SECCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos25475 #define GTZC_TZSC1_PRIVCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos25631 #define GTZC_TZIC1_IER3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos25853 #define GTZC_TZIC1_SR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos26075 #define GTZC_TZIC1_FCR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos
26059 #define GTZC_CFGR3_GFXMMU_REG_Pos (25U) macro26060 #define GTZC_CFGR3_GFXMMU_REG_Msk (0x01UL << GTZC_CFGR3_GFXMMU_REG_Pos)26289 #define GTZC_TZSC1_SECCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos26449 #define GTZC_TZSC1_PRIVCFGR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos26609 #define GTZC_TZIC1_IER3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos26839 #define GTZC_TZIC1_SR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos27069 #define GTZC_TZIC1_FCR3_GFXMMU_REG_Pos GTZC_CFGR3_GFXMMU_REG_Pos
