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Searched refs:GTZC_CFGR1_TIM7_Pos (Results 1 – 21 of 21) sorted by relevance

/hal_stm32-3.5.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_gtzc.h175 #define GTZC_PERIPH_TIM7 (GTZC_PERIPH_REG1 | GTZC_CFGR1_TIM7_Pos)
/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_gtzc.h192 #define GTZC_PERIPH_TIM7 (GTZC1_PERIPH_REG1 | GTZC_CFGR1_TIM7_Pos)
/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_gtzc.h195 #define GTZC_PERIPH_TIM7 (GTZC1_PERIPH_REG1 | GTZC_CFGR1_TIM7_Pos)
/hal_stm32-3.5.0/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h16405 #define GTZC_CFGR1_TIM7_Pos (5U) macro
16406 #define GTZC_CFGR1_TIM7_Msk ( 0x01UL << GTZC_CFGR1_TIM7_Pos )
16545 #define GTZC_TZSC_SECCFGR1_TIM7SEC_Pos GTZC_CFGR1_TIM7_Pos
16647 #define GTZC_TZSC_PRIVCFGR1_TIM7PRIV_Pos GTZC_CFGR1_TIM7_Pos
16749 #define GTZC_TZIC_IER1_TIM7IE_Pos GTZC_CFGR1_TIM7_Pos
16889 #define GTZC_TZIC_SR1_TIM7F_Pos GTZC_CFGR1_TIM7_Pos
17029 #define GTZC_TZIC_FCR1_TIM7FC_Pos GTZC_CFGR1_TIM7_Pos
Dstm32l562xx.h17144 #define GTZC_CFGR1_TIM7_Pos (5U) macro
17145 #define GTZC_CFGR1_TIM7_Msk ( 0x01UL << GTZC_CFGR1_TIM7_Pos )
17290 #define GTZC_TZSC_SECCFGR1_TIM7SEC_Pos GTZC_CFGR1_TIM7_Pos
17396 #define GTZC_TZSC_PRIVCFGR1_TIM7PRIV_Pos GTZC_CFGR1_TIM7_Pos
17502 #define GTZC_TZIC_IER1_TIM7IE_Pos GTZC_CFGR1_TIM7_Pos
17648 #define GTZC_TZIC_SR1_TIM7F_Pos GTZC_CFGR1_TIM7_Pos
17794 #define GTZC_TZIC_FCR1_TIM7FC_Pos GTZC_CFGR1_TIM7_Pos
/hal_stm32-3.5.0/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h18408 #define GTZC_CFGR1_TIM7_Pos (5U) macro
18409 #define GTZC_CFGR1_TIM7_Msk (0x01UL << GTZC_CFGR1_TIM7_Pos)
18580 #define GTZC_TZSC1_SECCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
18700 #define GTZC_TZSC1_PRIVCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
18820 #define GTZC_TZIC1_IER1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
18990 #define GTZC_TZIC1_SR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
19160 #define GTZC_TZIC1_FCR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
Dstm32u535xx.h17856 #define GTZC_CFGR1_TIM7_Pos (5U) macro
17857 #define GTZC_CFGR1_TIM7_Msk (0x01UL << GTZC_CFGR1_TIM7_Pos)
18020 #define GTZC_TZSC1_SECCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
18134 #define GTZC_TZSC1_PRIVCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
18248 #define GTZC_TZIC1_IER1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
18410 #define GTZC_TZIC1_SR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
18572 #define GTZC_TZIC1_FCR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
Dstm32u575xx.h19419 #define GTZC_CFGR1_TIM7_Pos (5U) macro
19420 #define GTZC_CFGR1_TIM7_Msk (0x01UL << GTZC_CFGR1_TIM7_Pos)
19605 #define GTZC_TZSC1_SECCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
19735 #define GTZC_TZSC1_PRIVCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
19865 #define GTZC_TZIC1_IER1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
20051 #define GTZC_TZIC1_SR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
20237 #define GTZC_TZIC1_FCR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
Dstm32u5a5xx.h21200 #define GTZC_CFGR1_TIM7_Pos (5U) macro
21201 #define GTZC_CFGR1_TIM7_Msk (0x01UL << GTZC_CFGR1_TIM7_Pos)
21412 #define GTZC_TZSC1_SECCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
21558 #define GTZC_TZSC1_PRIVCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
21704 #define GTZC_TZIC1_IER1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
21916 #define GTZC_TZIC1_SR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
22128 #define GTZC_TZIC1_FCR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
Dstm32u585xx.h20029 #define GTZC_CFGR1_TIM7_Pos (5U) macro
20030 #define GTZC_CFGR1_TIM7_Msk (0x01UL << GTZC_CFGR1_TIM7_Pos)
20225 #define GTZC_TZSC1_SECCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
20361 #define GTZC_TZSC1_PRIVCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
20497 #define GTZC_TZIC1_IER1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
20693 #define GTZC_TZIC1_SR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
20889 #define GTZC_TZIC1_FCR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
Dstm32u5f7xx.h22183 #define GTZC_CFGR1_TIM7_Pos (5U) macro
22184 #define GTZC_CFGR1_TIM7_Msk (0x01UL << GTZC_CFGR1_TIM7_Pos)
22401 #define GTZC_TZSC1_SECCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
22553 #define GTZC_TZSC1_PRIVCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
22705 #define GTZC_TZIC1_IER1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
22923 #define GTZC_TZIC1_SR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
23141 #define GTZC_TZIC1_FCR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
Dstm32u595xx.h20590 #define GTZC_CFGR1_TIM7_Pos (5U) macro
20591 #define GTZC_CFGR1_TIM7_Msk (0x01UL << GTZC_CFGR1_TIM7_Pos)
20792 #define GTZC_TZSC1_SECCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
20932 #define GTZC_TZSC1_PRIVCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
21072 #define GTZC_TZIC1_IER1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
21274 #define GTZC_TZIC1_SR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
21476 #define GTZC_TZIC1_FCR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
Dstm32u599xx.h24364 #define GTZC_CFGR1_TIM7_Pos (5U) macro
24365 #define GTZC_CFGR1_TIM7_Msk (0x01UL << GTZC_CFGR1_TIM7_Pos)
24576 #define GTZC_TZSC1_SECCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
24726 #define GTZC_TZSC1_PRIVCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
24876 #define GTZC_TZIC1_IER1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
25088 #define GTZC_TZIC1_SR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
25300 #define GTZC_TZIC1_FCR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
Dstm32u5g7xx.h22793 #define GTZC_CFGR1_TIM7_Pos (5U) macro
22794 #define GTZC_CFGR1_TIM7_Msk (0x01UL << GTZC_CFGR1_TIM7_Pos)
23021 #define GTZC_TZSC1_SECCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
23179 #define GTZC_TZSC1_PRIVCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
23337 #define GTZC_TZIC1_IER1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
23565 #define GTZC_TZIC1_SR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
23793 #define GTZC_TZIC1_FCR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
Dstm32u5a9xx.h24974 #define GTZC_CFGR1_TIM7_Pos (5U) macro
24975 #define GTZC_CFGR1_TIM7_Msk (0x01UL << GTZC_CFGR1_TIM7_Pos)
25196 #define GTZC_TZSC1_SECCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
25352 #define GTZC_TZSC1_PRIVCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
25508 #define GTZC_TZIC1_IER1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
25730 #define GTZC_TZIC1_SR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
25952 #define GTZC_TZIC1_FCR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
Dstm32u5g9xx.h25934 #define GTZC_CFGR1_TIM7_Pos (5U) macro
25935 #define GTZC_CFGR1_TIM7_Msk (0x01UL << GTZC_CFGR1_TIM7_Pos)
26164 #define GTZC_TZSC1_SECCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
26324 #define GTZC_TZSC1_PRIVCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
26484 #define GTZC_TZIC1_IER1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
26714 #define GTZC_TZIC1_SR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
26944 #define GTZC_TZIC1_FCR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
Dstm32u5f9xx.h25324 #define GTZC_CFGR1_TIM7_Pos (5U) macro
25325 #define GTZC_CFGR1_TIM7_Msk (0x01UL << GTZC_CFGR1_TIM7_Pos)
25544 #define GTZC_TZSC1_SECCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
25698 #define GTZC_TZSC1_PRIVCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
25852 #define GTZC_TZIC1_IER1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
26072 #define GTZC_TZIC1_SR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
26292 #define GTZC_TZIC1_FCR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
/hal_stm32-3.5.0/stm32cube/stm32h5xx/soc/
Dstm32h562xx.h16980 #define GTZC_CFGR1_TIM7_Pos (5U) macro
16981 #define GTZC_CFGR1_TIM7_Msk (0x01UL << GTZC_CFGR1_TIM7_Pos)
17169 #define GTZC_TZSC1_SECCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
17314 #define GTZC_TZSC1_PRIVCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
17458 #define GTZC_TZIC1_IER1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
17647 #define GTZC_TZIC1_SR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
17835 #define GTZC_TZIC1_FCR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
Dstm32h563xx.h19076 #define GTZC_CFGR1_TIM7_Pos (5U) macro
19077 #define GTZC_CFGR1_TIM7_Msk (0x01UL << GTZC_CFGR1_TIM7_Pos)
19271 #define GTZC_TZSC1_SECCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
19422 #define GTZC_TZSC1_PRIVCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
19572 #define GTZC_TZIC1_IER1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
19767 #define GTZC_TZIC1_SR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
19961 #define GTZC_TZIC1_FCR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
Dstm32h573xx.h19657 #define GTZC_CFGR1_TIM7_Pos (5U) macro
19658 #define GTZC_CFGR1_TIM7_Msk (0x01UL << GTZC_CFGR1_TIM7_Pos)
19860 #define GTZC_TZSC1_SECCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
20017 #define GTZC_TZSC1_PRIVCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
20173 #define GTZC_TZIC1_IER1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
20376 #define GTZC_TZIC1_SR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
20578 #define GTZC_TZIC1_FCR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos
Dstm32h503xx.h11240 #define GTZC_CFGR1_TIM7_Pos (5U) macro
11241 #define GTZC_CFGR1_TIM7_Msk (0x01UL << GTZC_CFGR1_TIM7_Pos)
11350 #define GTZC_TZSC1_PRIVCFGR1_TIM7_Pos GTZC_CFGR1_TIM7_Pos