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/Zephyr-latest/arch/xtensa/core/
Dxtensa_intgen.py50 half = int(len(ints)/2)
53 for i in ints[0:half]:
56 emit_int_handler(ints[0:half])
58 emit_int_handler(ints[half:])
/Zephyr-latest/arch/arm/core/
DKconfig.vfp46 that supports half- and single-precision operations with 16
58 that supports half- and single-precision operations (including fused
81 that supports half-, single- and double-precision operations with 16
94 that supports half-, single- and double-precision operations
108 that supports half-, single-, double-precision operations (including
122 that supports half-, single- and double-precision operations
136 that supports half-, single-, double-precision operations (including
149 half-precision operations (half-precision extension).
/Zephyr-latest/doc/build/dts/
Dbindings.rst6 A devicetree on its own is only half the story for describing hardware, as it
8 half.
/Zephyr-latest/samples/boards/st/uart/single_wire/
DREADME.rst5 Use single-wire/half-duplex UART functionality of STM32 devices.
10 A simple application demonstrating how to use the single wire / half-duplex UART
/Zephyr-latest/samples/subsys/nvs/boards/
Dnucleo_wb55rg.overlay11 /* Set 12KB of storage at the end of 1st half of flash (dual core constraints) */
/Zephyr-latest/samples/subsys/fs/littlefs/boards/
Dnucleo_h7a3zi_q.overlay29 /* Use second half of flash for the filesystem. */
Dstm32f429i_disc1.overlay29 /* Use second half of flash for the filesystem. */
/Zephyr-latest/samples/sensor/ds18b20/boards/
Dnucleo_g0b1re.overlay12 * b) the UART TX pin only, while the single wire half-duplex mode is enabled.
/Zephyr-latest/drivers/usb/udc/
DKconfig.numaker18 Maximum number of messages the driver can queue for interrupt bottom half processing.
/Zephyr-latest/boards/raspberrypi/rpi_pico/
Drpi_pico_rp2040_w.dts59 spi-half-duplex;
/Zephyr-latest/tests/drivers/adc/adc_accuracy_test/
DREADME.txt14 The test then sets DAC to half its resolution and reads the ADC to see
/Zephyr-latest/subsys/modem/backends/
DKconfig34 A good value is ~90% the time it takes to fill half the receive buffer.
/Zephyr-latest/boards/shields/seeed_xiao_expansion_board/doc/
Dindex.rst10 for `Seeed Studio XIAO series`_ of only half Raspberry Pi 4 size. It enables
/Zephyr-latest/boards/st/stm32g081b_eval/
Dstm32g081b_eval.dts165 * a prescaler who's output feeds the 'half-bit' divider which is used
196 * a prescaler who's output feeds the 'half-bit' divider which is used
/Zephyr-latest/samples/drivers/spi_flash_at45/
DREADME.rst90 Writing the first half of the test region... OK
91 Writing the second half of the test region... OK
/Zephyr-latest/arch/arc/
DCMakeLists.txt34 # Instruct MWDT assembler not to warn when we load only lower half (32bit) of symbol
/Zephyr-latest/drivers/usb/device/
DKconfig218 Maximum number of messages the driver can queue for interrupt bottom half processing
225 for handling messages from the USB DC ISR, i.e. interrupt bottom half processing,
/Zephyr-latest/drivers/flash/
DKconfig.nrf68 Minimal timeout is 2ms maximum should not exceed half of
/Zephyr-latest/boards/st/b_g474e_dpow1/
Db_g474e_dpow1.dts159 * a prescaler who's output feeds the 'half-bit' divider which is used
/Zephyr-latest/boards/tdk/robokit1/
Drobokit1-common.dtsi200 * The first half of sector 0 (64 kbytes)
/Zephyr-latest/boards/st/stm32g071b_disco/
Dstm32g071b_disco.dts161 * a prescaler who's output feeds the 'half-bit' divider which is used
/Zephyr-latest/boards/atmel/sam/sam_e70_xplained/
Dsam_e70_xplained-common.dtsi160 * The first half of sector 0 (64 kbytes)
/Zephyr-latest/samples/boards/arc_secure_services/
DREADME.rst19 the other half is allocated to normal world.
/Zephyr-latest/doc/hardware/peripherals/
Dw1.rst9 1-Wire is a low speed half-duplex serial bus using only a single wire plus
/Zephyr-latest/doc/releases/
Dindex.rst39 Support and maintenance for an LTS release stops at least half a year

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