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Searched refs:AES_INT_ENA_REG (Results 1 – 10 of 10) sorted by relevance

/hal_espressif-latest/components/hal/esp32s3/include/hal/
Daes_ll.h210 REG_WRITE(AES_INT_ENA_REG, enable); in aes_ll_interrupt_enable()
/hal_espressif-latest/components/hal/esp32h2/include/hal/
Daes_ll.h210 REG_WRITE(AES_INT_ENA_REG, enable); in aes_ll_interrupt_enable()
/hal_espressif-latest/components/hal/esp32c6/include/hal/
Daes_ll.h210 REG_WRITE(AES_INT_ENA_REG, enable); in aes_ll_interrupt_enable()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Daes_ll.h210 REG_WRITE(AES_INT_ENA_REG, enable); in aes_ll_interrupt_enable()
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dhwcrypto_reg.h74 #define AES_INT_ENA_REG ((DR_REG_AES_BASE) + 0xB0) macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dhwcrypto_reg.h89 #define AES_INT_ENA_REG ((DR_REG_AES_BASE) + 0xB0) macro
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Daes_ll.h221 REG_WRITE(AES_INT_ENA_REG, enable); in aes_ll_interrupt_enable()
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Daes_reg.h381 #define AES_INT_ENA_REG (DR_REG_AES_BASE + 0xb0) macro
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Daes_reg.h381 #define AES_INT_ENA_REG (DR_REG_AES_BASE + 0xb0) macro
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dhwcrypto_reg.h78 #define AES_INT_ENA_REG ((DR_REG_AES_BASE) + 0xB0) macro