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/Zephyr-latest/dts/xtensa/nxp/
Dnxp_imx8qxp.dtsi19 compatible = "nxp,irqsteer-master";
27 compatible = "nxp,irqsteer-master";
35 compatible = "nxp,irqsteer-master";
43 compatible = "nxp,irqsteer-master";
51 compatible = "nxp,irqsteer-master";
59 compatible = "nxp,irqsteer-master";
67 compatible = "nxp,irqsteer-master";
75 compatible = "nxp,irqsteer-master";
Dnxp_imx8qm.dtsi20 compatible = "nxp,irqsteer-master";
28 compatible = "nxp,irqsteer-master";
36 compatible = "nxp,irqsteer-master";
44 compatible = "nxp,irqsteer-master";
52 compatible = "nxp,irqsteer-master";
60 compatible = "nxp,irqsteer-master";
68 compatible = "nxp,irqsteer-master";
76 compatible = "nxp,irqsteer-master";
Dnxp_imx8m.dtsi60 compatible = "nxp,irqsteer-master";
68 compatible = "nxp,irqsteer-master";
76 compatible = "nxp,irqsteer-master";
/Zephyr-latest/soc/intel/apollo_lake/doc/
Dsupported_features.txt19 configuration. The UARTs are fed a master clock which is fed into a PLL which
20 in turn outputs the baud master clock. The PLL is controlled by a per-UART
30 The resulting baud master clock frequency is ``(n/m)`` * master.
32 Typically, the master clock is 100MHz, and the firmware by default sets
34 results in the de-facto standard 1.8432MHz master clock and a max baud rate
36 Zephyr what the resulting master clock is.
56 and ``clock-frequency`` (the resulting baud master clock). The meaning of
/Zephyr-latest/drivers/w1/
DKconfig.ds24851 # Configuration options for the Zephyr DS2485 1-Wire master driver
7 bool "DS2485 1-wire master driver"
13 Enable the ds2485 w1 master driver.
DKconfig.max325 bool "MAX32xxx MCUs 1-Wire master driver"
10 This option enables the 1-Wire master driver for MAX32xxx MCUs
DKconfig.ds2477_851 # Common configuration options for DS2477 and DS2485 1-Wire master drivers
/Zephyr-latest/doc/contribute/coding_guidelines/
Dindex.rst73 …- `Dir 1.1 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_01_01.c>`_
80 …- `Dir 2.1 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_02_01.c>`_
87 …- `Dir 3.1 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_03_01.c>`_
94 …- `Dir 4.1 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_04_01.c>`_
101 …- `Dir 4.2 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_04_02.c>`_
108 …- `Dir 4.4 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_04_04.c>`_
115 …- `Dir 4.5 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_04_05.c>`_
122 …- `Dir 4.6 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_04_06.c>`_
129 …- `Dir 4.7 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_04_07.c>`_
136 …example 1 <https://gitlab.com/MISRA/MISRA-C/MISRA-C-2012/Example-Suite/-/blob/master/D_04_08_1.c>`_
[all …]
/Zephyr-latest/tests/drivers/build_all/interrupt_controller/common/boards/
Dimx8mp_evk_mimx8ml8_adsp.overlay22 compatible = "nxp,irqsteer-master";
30 compatible = "nxp,irqsteer-master";
38 compatible = "nxp,irqsteer-master";
/Zephyr-latest/drivers/dai/nxp/sai/
DKconfig.sai19 of the master clock. Master clock configuration
20 refers to enabling/disabling the master clock,
22 the master clock output.
37 the SAI is FSYNC/BCLK master, one of the directions
/Zephyr-latest/subsys/logging/
Dlog_output_syst.c29 static mipi_syst_u16 master = 128; variable
207 p->master = 0; in stp_write_version()
222 mipi_syst_u16 master, in stp_write_setMC() argument
231 if (p->master != master) { in stp_write_setMC()
234 stp_write_payload16(systh, p, master); in stp_write_setMC()
236 p->master = master; in stp_write_setMC()
327 systh->systh_platform.master,
350 systh->systh_platform.master,
366 systh->systh_platform.master,
452 ++master;
[all …]
/Zephyr-latest/tests/boards/altera_max10/i2c_master/
DREADME.txt2 Altera Nios-II I2C master soft IP core.
/Zephyr-latest/samples/modules/chre/
DREADME.rst68 .. _`chre_api/chre/nanoapp.h`: https://cs.android.com/android/platform/superproject/+/master:system…
69 .. _`pal/audio.h`: https://cs.android.com/android/platform/superproject/+/master:system/chre/pal/in…
70 .. _`pal/gnss.h`: https://cs.android.com/android/platform/superproject/+/master:system/chre/pal/inc…
71 .. _`pal/sensor.h`: https://cs.android.com/android/platform/superproject/+/master:system/chre/pal/i…
72 .. _`pal/system.h`: https://cs.android.com/android/platform/superproject/+/master:system/chre/pal/i…
73 .. _`pal/wifi.h`: https://cs.android.com/android/platform/superproject/+/master:system/chre/pal/inc…
74 .. _`pal/wwan.h`: https://cs.android.com/android/platform/superproject/+/master:system/chre/pal/inc…
/Zephyr-latest/boards/raspberrypi/rpi_4b/doc/
Dindex.rst47 …* `bcm2711-rpi-4-b.dtb <https://raw.githubusercontent.com/raspberrypi/firmware/master/boot/bcm2711…
48 …* `bootcode.bin <https://raw.githubusercontent.com/raspberrypi/firmware/master/boot/bootcode.bin>`_
49 * `start4.elf <https://raw.githubusercontent.com/raspberrypi/firmware/master/boot/start4.elf>`_
/Zephyr-latest/samples/net/dsa/src/
Dmain.c23 if (ifaces->master == NULL) { in iface_cb()
24 ifaces->master = iface; in iface_cb()
/Zephyr-latest/samples/subsys/ipc/rpmsg_service/
DREADME.rst51 serial port, one is master another is remote:
58 RPMsg Service [master] demo started
102 and network core images, the following messages (one for master and one for
110 RPMsg Service [master] demo started
147 RPMsg Service [master] demo started
/Zephyr-latest/subsys/logging/mipi_syst/
Dplatform.h29 mipi_syst_u16 master; member
63 mipi_syst_u32 master; member
/Zephyr-latest/drivers/i2s/
DKconfig.sam_ssc32 in master or slave mode.
43 in master or slave mode.
Di2s_ll_stm32.h50 bool master; member
/Zephyr-latest/boards/shields/rk055hdmipi4m/boards/
Dmimxrt595_evk_mimxrt595s_cm33.overlay8 * Configure FlexSPI2 to use 1KB of AHB RX buffer for GPU/Display master.
/Zephyr-latest/boards/shields/rk055hdmipi4ma0/boards/
Dmimxrt595_evk_mimxrt595s_cm33.overlay8 * Configure FlexSPI2 to use 1KB of AHB RX buffer for GPU/Display master.
/Zephyr-latest/samples/bluetooth/hci_spi/
DREADME.rst34 You will also need a separate chip acting as BT HCI SPI master. This
35 application is compatible with the HCI SPI master driver provided by
/Zephyr-latest/boards/quicklogic/quick_feather/doc/
Dindex.rst109 … https://github.com/QuickLogic-Corp/quick-feather-dev-board/blob/master/doc/quickfeather-board.pdf
112 https://sourceforge.net/p/openocd/code/ci/master/tree/tcl/board/quicklogic_quickfeather.cfg
115 …https://github.com/QuickLogic-Corp/quick-feather-dev-board/blob/master/doc/QuickFeather_UserGuide.…
/Zephyr-latest/boards/quicklogic/qomu/doc/
Dindex.rst61 https://github.com/QuickLogic-Corp/qomu-dev-board/blob/master/doc/Qomu_UserGuide.pdf
64 https://github.com/QuickLogic-Corp/qomu-dev-board/blob/master/doc/qomu-board.pdf
/Zephyr-latest/subsys/fb/
DREADME_fonts.txt4 https://android.googlesource.com/platform/frameworks/base/+/master/data/fonts/DroidSansMono.ttf

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