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Searched refs:z_arc_v2_aux_reg_write (Results 1 – 20 of 20) sorted by relevance

/Zephyr-latest/include/zephyr/arch/arc/v2/
Darcv2_irq_unit.h56 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq); in z_arc_v2_irq_unit_irq_enable_set()
57 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_ENABLE, enable); in z_arc_v2_irq_unit_irq_enable_set()
100 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq); in z_arc_v2_irq_unit_int_enabled()
121 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq); in z_arc_v2_irq_unit_prio_set()
123 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_PRIORITY, in z_arc_v2_irq_unit_prio_set()
127 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_PRIORITY, prio); in z_arc_v2_irq_unit_prio_set()
143 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq); in z_arc_v2_irq_uinit_secure_set()
146 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_PRIORITY, in z_arc_v2_irq_uinit_secure_set()
150 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_PRIORITY, in z_arc_v2_irq_uinit_secure_set()
173 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq); in z_arc_v2_irq_unit_sensitivity_set()
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Dsys_io.h28 z_arc_v2_aux_reg_write(port, data); in sys_out8()
40 z_arc_v2_aux_reg_write(port, data); in sys_out16()
52 z_arc_v2_aux_reg_write(port, data); in sys_out32()
Daux_regs.h239 #define z_arc_v2_aux_reg_write(reg, val) \ macro
245 #define z_arc_v2_aux_reg_write(reg, val) \ macro
Darc_connect.h174 z_arc_v2_aux_reg_write(_ARC_V2_CONNECT_CMD, regval.val); in z_arc_connect_cmd()
180 z_arc_v2_aux_reg_write(_ARC_V2_CONNECT_WDATA, data); in z_arc_connect_cmd_data()
Dirq.h103 z_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_HINT, 0); in arch_isr_direct_footer()
/Zephyr-latest/tests/arch/arc/arc_dsp_sharing/src/
Ddsp_regs_arc.h38 z_arc_v2_aux_reg_write(_ARC_V2_DSP_BFLY0, *temp++); in _load_all_dsp_registers()
39 z_arc_v2_aux_reg_write(_ARC_V2_AGU_AP0, *temp++); in _load_all_dsp_registers()
40 z_arc_v2_aux_reg_write(_ARC_V2_AGU_OS0, *temp++); in _load_all_dsp_registers()
/Zephyr-latest/drivers/interrupt_controller/
Dintc_arcv2_irq_unit.c93 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq); in arc_core_intc_init_nolock()
94 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_PRIORITY, ARC_IRQ_DEFAULT_PRIORITY); in arc_core_intc_init_nolock()
95 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_TRIGGER, _ARC_V2_INT_LEVEL); in arc_core_intc_init_nolock()
96 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_ENABLE, state); in arc_core_intc_init_nolock()
/Zephyr-latest/arch/arc/core/
Dprep_c.c47 z_arc_v2_aux_reg_write(_ARC_V2_IC_IVIC, 0);
49 z_arc_v2_aux_reg_write(_ARC_V2_IC_CTRL, 1);
68 z_arc_v2_aux_reg_write(_ARC_V2_DC_IVDC, 1);
Dcache.c54 z_arc_v2_aux_reg_write(_ARC_V2_DC_CTRL, dcache_en_mask); in dcache_dc_ctrl()
86 z_arc_v2_aux_reg_write(_ARC_V2_DC_FLDL, start_addr); in arch_dcache_flush_range()
121 z_arc_v2_aux_reg_write(_ARC_V2_DC_IVDL, start_addr); in arch_dcache_invd_range()
Dirq_offload.c48 z_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_HINT, IRQ_OFFLOAD_LINE); in arch_irq_offload()
/Zephyr-latest/arch/arc/core/secureshield/
Darc_sjli.c43 z_arc_v2_aux_reg_write(_ARC_V2_NSC_TABLE_BASE, _sjli_vector_table); in sjli_table_init()
44 z_arc_v2_aux_reg_write(_ARC_V2_NSC_TABLE_TOP, in sjli_table_init()
Dsecure_sys_services.c46 z_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_ACT, val | in arc_s_aux_write()
/Zephyr-latest/arch/arc/core/mpu/
Darc_mpu_v4_internal.h148 z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index); in _region_init()
149 z_arc_v2_aux_reg_write(_ARC_V2_MPU_RSTART, region_addr); in _region_init()
150 z_arc_v2_aux_reg_write(_ARC_V2_MPU_REND, in _region_init()
152 z_arc_v2_aux_reg_write(_ARC_V2_MPU_RPER, region_attr); in _region_init()
157 z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index); in _region_set_attr()
158 z_arc_v2_aux_reg_write(_ARC_V2_MPU_RPER, attr | in _region_set_attr()
164 z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index); in _region_get_attr()
171 z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index); in _region_get_start()
178 z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index); in _region_set_start()
179 z_arc_v2_aux_reg_write(_ARC_V2_MPU_RSTART, start); in _region_set_start()
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Darc_mpu_v6_internal.h70 z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN, val | bank); in _bank_select()
108 z_arc_v2_aux_reg_write(_ARC_V2_MPU_RDP0 + index, region_attr); in _region_init()
109 z_arc_v2_aux_reg_write(_ARC_V2_MPU_RDB0 + index, region_addr); in _region_init()
Darc_mpu_common_internal.h52 z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN, in arc_core_mpu_enable()
62 z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN, in arc_core_mpu_disable()
101 z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN, region_attr | val); in arc_core_mpu_default()
Darc_mpu_v2_internal.h74 z_arc_v2_aux_reg_write(_ARC_V2_MPU_RDP0 + index, region_attr); in _region_init()
75 z_arc_v2_aux_reg_write(_ARC_V2_MPU_RDB0 + index, region_addr); in _region_init()
/Zephyr-latest/include/zephyr/arch/arc/
Dcluster.h96 z_arc_v2_aux_reg_write(_ARC_CLNR_ADDR, reg); in arc_cln_read_reg_nolock()
102 z_arc_v2_aux_reg_write(_ARC_CLNR_ADDR, reg); in arc_cln_write_reg_nolock()
103 z_arc_v2_aux_reg_write(_ARC_CLNR_DATA, data); in arc_cln_write_reg_nolock()
/Zephyr-latest/drivers/timer/
Darcv2_timer0.c118 z_arc_v2_aux_reg_write(_ARC_V2_TMR0_COUNT, value); in timer0_count_register_set()
136 z_arc_v2_aux_reg_write(_ARC_V2_TMR0_CONTROL, value); in timer0_control_register_set()
154 z_arc_v2_aux_reg_write(_ARC_V2_TMR0_LIMIT, count); in timer0_limit_register_set()
195 z_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_HINT, in elapsed()
/Zephyr-latest/arch/arc/include/v2/
Dirq.h73 z_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_CTRL, aux_irq_ctrl_value); in z_irq_setup()
/Zephyr-latest/subsys/testsuite/include/zephyr/
Dinterrupt_util.h103 z_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_HINT, irq); in trigger_irq()