1 /*
2 * Copyright (c) 2014 Wind River Systems, Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 /**
8 * @file
9 * @brief Full C support initialization
10 *
11 *
12 * Initialization of full C support: zero the .bss, copy the .data if XIP,
13 * call z_cstart().
14 *
15 * Stack is available in this module, but not the global data/bss until their
16 * initialization is performed.
17 */
18
19 #include <zephyr/types.h>
20 #include <zephyr/toolchain.h>
21 #include <zephyr/linker/linker-defs.h>
22 #include <zephyr/arch/arc/v2/aux_regs.h>
23 #include <zephyr/arch/arc/cluster.h>
24 #include <zephyr/kernel_structs.h>
25 #include <kernel_internal.h>
26 #include <zephyr/platform/hooks.h>
27 #include <zephyr/arch/cache.h>
28
29 /* XXX - keep for future use in full-featured cache APIs */
30 #if 0
31 /**
32 * @brief Disable the i-cache if present
33 *
34 * For those ARC CPUs that have a i-cache present,
35 * invalidate the i-cache and then disable it.
36 */
37
38 static void disable_icache(void)
39 {
40 unsigned int val;
41
42 val = z_arc_v2_aux_reg_read(_ARC_V2_I_CACHE_BUILD);
43 val &= 0xff; /* version field */
44 if (val == 0) {
45 return; /* skip if i-cache is not present */
46 }
47 z_arc_v2_aux_reg_write(_ARC_V2_IC_IVIC, 0);
48 __builtin_arc_nop();
49 z_arc_v2_aux_reg_write(_ARC_V2_IC_CTRL, 1);
50 }
51
52 /**
53 * @brief Invalidate the data cache if present
54 *
55 * For those ARC CPUs that have a data cache present,
56 * invalidate the data cache.
57 */
58
59 static void invalidate_dcache(void)
60 {
61 unsigned int val;
62
63 val = z_arc_v2_aux_reg_read(_ARC_V2_D_CACHE_BUILD);
64 val &= 0xff; /* version field */
65 if (val == 0) {
66 return; /* skip if d-cache is not present */
67 }
68 z_arc_v2_aux_reg_write(_ARC_V2_DC_IVDC, 1);
69 }
70 #endif
71
72 #ifdef CONFIG_ISA_ARCV3
73 /* NOTE: it will be called from early C code - we must NOT use global / static variables in it! */
arc_cluster_scm_enable(void)74 static void arc_cluster_scm_enable(void)
75 {
76 unsigned int cluster_version;
77
78 /* Check that we have cluster and its version is supported */
79 cluster_version = z_arc_v2_aux_reg_read(_ARC_REG_CLN_BCR) & _ARC_CLN_BCR_VER_MAJOR_MASK;
80 if (cluster_version < _ARC_REG_CLN_BCR_VER_MAJOR_ARCV3_MIN) {
81 return;
82 }
83
84 /* Check that we have shared cache in cluster */
85 if (!(z_arc_v2_aux_reg_read(_ARC_CLNR_BCR_0) & _ARC_CLNR_BCR_0_HAS_SCM)) {
86 return;
87 }
88
89 /* Disable SCM, just in case. */
90 arc_cln_write_reg_nolock(ARC_CLN_CACHE_STATUS, 0);
91
92 /* Invalidate SCM before enabling. */
93 arc_cln_write_reg_nolock(ARC_CLN_CACHE_CMD,
94 ARC_CLN_CACHE_CMD_OP_REG_INV | ARC_CLN_CACHE_CMD_INCR);
95 while (arc_cln_read_reg_nolock(ARC_CLN_CACHE_STATUS) & ARC_CLN_CACHE_STATUS_BUSY)
96 ;
97
98 arc_cln_write_reg_nolock(ARC_CLN_CACHE_STATUS, ARC_CLN_CACHE_STATUS_EN);
99 }
100 #endif /* CONFIG_ISA_ARCV3 */
101
102 #ifdef __CCAC__
103 extern char __device_states_start[];
104 extern char __device_states_end[];
105 /**
106 * @brief Clear device_states section
107 *
108 * This routine clears the device_states section,
109 * as MW compiler marks the section with NOLOAD flag.
110 */
dev_state_zero(void)111 static void dev_state_zero(void)
112 {
113 z_early_memset(__device_states_start, 0, __device_states_end - __device_states_start);
114 }
115 #endif
116
117 extern FUNC_NORETURN void z_cstart(void);
118 extern void arc_mpu_init(void);
119 extern void arc_secureshield_init(void);
120
121 /**
122 * @brief Prepare to and run C code
123 *
124 * This routine prepares for the execution of and runs C code.
125 */
126
z_prep_c(void)127 void z_prep_c(void)
128 {
129 #if defined(CONFIG_SOC_PREP_HOOK)
130 soc_prep_hook();
131 #endif
132
133 #ifdef CONFIG_ISA_ARCV3
134 arc_cluster_scm_enable();
135 #endif
136
137 z_bss_zero();
138 #ifdef __CCAC__
139 dev_state_zero();
140 #endif
141 z_data_copy();
142 #if CONFIG_ARCH_CACHE
143 arch_cache_init();
144 #endif
145 #ifdef CONFIG_ARC_MPU
146 arc_mpu_init();
147 #endif
148 #ifdef CONFIG_ARC_SECURE_FIRMWARE
149 arc_secureshield_init();
150 #endif
151 z_cstart();
152 CODE_UNREACHABLE;
153 }
154
