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/Zephyr-latest/tests/subsys/mem_mgmt/mem_attr_heap/boards/
Dqemu_cortex_m3.overlay2 #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
3 #include <zephyr/dt-bindings/memory-attr/memory-attr-sw.h>
6 mem_cache: memory@20008000 {
7 compatible = "zephyr,memory-region", "mmio-sram";
9 zephyr,memory-region = "MEM_CACHEABLE";
10 zephyr,memory-attr = <( DT_MEM_CACHEABLE )>;
13 mem_cache_sw: memory@20009000 {
14 compatible = "zephyr,memory-region", "mmio-sram";
16 zephyr,memory-region = "MEM_CACHEABLE_SW";
17 zephyr,memory-attr = <( DT_MEM_CACHEABLE | DT_MEM_SW_ALLOC_CACHE )>;
[all …]
/Zephyr-latest/tests/lib/shared_multi_heap/boards/
Dmps2_an521_cpu0.overlay7 #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
8 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
11 /delete-node/ memory@38000000;
13 ssram2_3: memory@38000000 {
14 compatible = "zephyr,memory-region", "mmio-sram";
16 zephyr,memory-region = "SSRAM2_3";
19 res0: memory@38100000 {
20 compatible = "zephyr,memory-region", "mmio-sram";
22 zephyr,memory-region = "RES0";
23 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
[all …]
Dqemu_cortex_a53.overlay7 #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
8 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
12 res0: memory@42000000 {
13 compatible = "zephyr,memory-region", "mmio-sram";
15 zephyr,memory-region = "RES0";
16 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
19 res1: memory@43000000 {
20 compatible = "zephyr,memory-region", "mmio-sram";
22 zephyr,memory-region = "RES1";
23 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
[all …]
/Zephyr-latest/boards/nordic/nrf9280pdk/
Dnrf9280pdk_nrf9280-memory_map.dtsi6 #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
9 reserved-memory {
14 cpurad_ram0x_region: memory@2f011000 {
15 compatible = "nordic,owned-memory";
23 cpusec_cpurad_ipc_shm: memory@0 {
27 cpurad_cpusec_ipc_shm: memory@800 {
32 cpuapp_ram0x_region: memory@2f012000 {
33 compatible = "nordic,owned-memory";
41 cpusec_cpuapp_ipc_shm: memory@0 {
45 cpuapp_cpusec_ipc_shm: memory@800 {
[all …]
/Zephyr-latest/boards/nordic/nrf54h20dk/
Dnrf54h20dk_nrf54h20-memory_map.dtsi6 #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
9 reserved-memory {
10 cpurad_ram0x_region: memory@2f010000 {
11 compatible = "nordic,owned-memory";
19 cpusec_cpurad_ipc_shm: memory@0 {
23 cpurad_cpusec_ipc_shm: memory@800 {
28 cpuapp_ram0x_region: memory@2f011000 {
29 compatible = "nordic,owned-memory";
37 cpusec_cpuapp_ipc_shm: memory@0 {
41 cpuapp_cpusec_ipc_shm: memory@800 {
[all …]
/Zephyr-latest/tests/subsys/mem_mgmt/mem_attr/
Dapp.overlay6 #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
7 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
10 mem_ram: memory@10000000 {
11 compatible = "vnd,memory-attr";
13 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_FLASH) | DT_MEM_NON_VOLATILE )>;
16 mem_ram_nocache: memory@20000000 {
17 compatible = "vnd,memory-attr";
19 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
22 mem_ram_disabled: memory@30000000 {
23 compatible = "vnd,memory-attr";
[all …]
/Zephyr-latest/tests/lib/devicetree/memory_region_flags/
Dapp.overlay11 compatible = "zephyr,memory-region";
13 zephyr,memory-region = "TEST_REGION_R";
14 zephyr,memory-region-flags = "r";
18 compatible = "zephyr,memory-region";
20 zephyr,memory-region = "TEST_REGION_NRWXAIL";
21 zephyr,memory-region-flags = "!rwxail";
25 compatible = "zephyr,memory-region";
27 zephyr,memory-region = "TEST_REGION_NO_FLAGS";
31 compatible = "zephyr,memory-region";
33 zephyr,memory-region = "TEST_REGION_NONE";
[all …]
/Zephyr-latest/dts/arm/st/h5/
Dstm32h533Xe.dtsi10 sram1: memory@20000000 {
11 compatible = "zephyr,memory-region", "mmio-sram";
13 zephyr,memory-region = "SRAM1";
16 sram2: memory@20040000 {
17 compatible = "zephyr,memory-region", "mmio-sram";
19 zephyr,memory-region = "SRAM2";
22 sram3: memory@20050000 {
23 compatible = "zephyr,memory-region", "mmio-sram";
25 zephyr,memory-region = "SRAM3";
/Zephyr-latest/samples/subsys/ipc/ipc_service/icmsg/boards/
Dstm32h747i_disco_stm32h747xx_m7.overlay12 /* Define new memory regions for TX and RX */
13 /delete-node/ memory@38000000;
15 sram_tx: memory@38000000 {
16 zephyr,memory-region = "SRAM_TX";
17 compatible = "zephyr,memory-region", "mmio-sram";
19 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
22 sram_rx: memory@38008000 {
23 zephyr,memory-region = "SRAM_RX";
24 compatible = "zephyr,memory-region", "mmio-sram";
26 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
/Zephyr-latest/samples/subsys/ipc/openamp/boards/
Dmimxrt1170_evk_mimxrt1176_cm7_A.overlay7 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
14 /* OpenAMP fails with full 512K OCRAM2 memory region as shared memory.
16 * Note that shared memory must have specific MPU attributes set.
18 ocram2_overlay: memory@202c0000{
19 compatible = "zephyr,memory-region", "mmio-sram";
21 zephyr,memory-region="OCRAM2_OVERLAY";
22 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
Dmimxrt1170_evk_mimxrt1176_cm7_B.overlay7 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
14 /* OpenAMP fails with full 512K OCRAM2 memory region as shared memory.
16 * Note that shared memory must have specific MPU attributes set.
18 ocram2_overlay: memory@202c0000{
19 compatible = "zephyr,memory-region", "mmio-sram";
21 zephyr,memory-region="OCRAM2_OVERLAY";
22 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
Dmimxrt1160_evk_mimxrt1166_cm7.overlay7 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
14 /* OpenAMP fails with full 512K OCRAM2 memory region as shared memory.
16 * Note that shared memory must have specific MPU attributes set.
18 ocram2_overlay: memory@202c0000{
19 compatible = "zephyr,memory-region", "mmio-sram";
21 zephyr,memory-region="OCRAM2_OVERLAY";
22 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
/Zephyr-latest/samples/subsys/ipc/ipc_service/icmsg/remote/boards/
Dstm32h747i_disco_stm32h747xx_m4.overlay15 /* Define new memory regions for TX and RX */
16 /delete-node/ memory@38000000;
18 sram_rx: memory@38000000 {
19 zephyr,memory-region = "SRAM_RX";
20 compatible = "zephyr,memory-region", "mmio-sram";
22 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
25 sram_tx: memory@38008000 {
26 zephyr,memory-region = "SRAM_TX";
27 compatible = "zephyr,memory-region", "mmio-sram";
29 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
/Zephyr-latest/doc/services/mem_mgmt/
Dindex.rst6 It is possible in the devicetree to mark the memory regions with attributes by
7 using the ``zephyr,memory-attr`` property. This property and the related memory
12 and explained in :zephyr_file:`include/zephyr/dt-bindings/memory-attr/memory-attr.h`.
14 For example, to mark a memory region in the devicetree as non-volatile, cacheable,
19 mem: memory@10000000 {
22 zephyr,memory-attr = <( DT_MEM_NON_VOLATILE | DT_MEM_CACHEABLE | DT_MEM_OOO )>;
27 The ``zephyr,memory-attr`` usage does not result in any memory region
29 devicetree defined memory region, it is possible to use the compatible
30 :dtcompatible:`zephyr,memory-region` that will result (only when supported
33 The ``zephyr,memory-attr`` property can also be used to set
[all …]
/Zephyr-latest/doc/kernel/memory_management/
Dslabs.rst6 A :dfn:`memory slab` is a kernel object that allows memory blocks
7 to be dynamically allocated from a designated memory region.
8 All memory blocks in a memory slab have a single fixed size,
10 and avoiding memory fragmentation concerns.
19 Any number of memory slabs can be defined (limited only by available RAM). Each
20 memory slab is referenced by its memory address.
22 A memory slab has the following key properties:
30 * A **buffer** that provides the memory for the memory slab's blocks.
33 The memory slab's buffer must be aligned to an N-byte boundary, where
35 all memory blocks in the buffer are similarly aligned to this boundary,
[all …]
/Zephyr-latest/samples/subsys/ipc/ipc_service/static_vrings/boards/
Dlpcxpresso55s69_lpc55s69_cpu0.overlay8 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
19 /* Define memory regions for IPC
20 * Note that shared memory must have specific MPU attributes set.
22 sram4_ipc0: memory@20040000{
23 compatible = "zephyr,memory-region", "mmio-sram";
25 zephyr,memory-region="SRAM4_IPC0";
26 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO))>;
29 sram4_ipc1: memory@20042000{
30 compatible = "zephyr,memory-region", "mmio-sram";
32 zephyr,memory-region="SRAM4_IPC1";
[all …]
Dmimxrt1160_evk_mimxrt1166_cm7.overlay8 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
22 /* Define memory regions for IPC
23 * Note that shared memory must have specific MPU attributes set.
25 ocram2_ipc0: memory@202c0000{
26 compatible = "zephyr,memory-region", "mmio-sram";
28 zephyr,memory-region="OCRAM2_IPC0";
29 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO))>;
31 ocram2_ipc1: memory@202c8000{
32 compatible = "zephyr,memory-region", "mmio-sram";
34 zephyr,memory-region="OCRAM2_IPC1";
[all …]
Dmimxrt1170_evk_mimxrt1176_cm7.overlay8 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
22 /* Define memory regions for IPC
23 * Note that shared memory must have specific MPU attributes set.
25 ocram2_ipc0: memory@202c0000{
26 compatible = "zephyr,memory-region", "mmio-sram";
28 zephyr,memory-region="OCRAM2_IPC0";
29 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO))>;
31 ocram2_ipc1: memory@202c8000{
32 compatible = "zephyr,memory-region", "mmio-sram";
34 zephyr,memory-region="OCRAM2_IPC1";
[all …]
Dmimxrt1170_evk_mimxrt1176_cm7_B.overlay8 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
22 /* Define memory regions for IPC
23 * Note that shared memory must have specific MPU attributes set.
25 ocram2_ipc0: memory@202c0000{
26 compatible = "zephyr,memory-region", "mmio-sram";
28 zephyr,memory-region="OCRAM2_IPC0";
29 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO))>;
31 ocram2_ipc1: memory@202c8000{
32 compatible = "zephyr,memory-region", "mmio-sram";
34 zephyr,memory-region="OCRAM2_IPC1";
[all …]
/Zephyr-latest/samples/subsys/ipc/ipc_service/static_vrings/remote/boards/
Dlpcxpresso55s69_lpc55s69_cpu1.overlay8 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
19 /* Define memory regions for IPC
20 * Note that shared memory must have specific MPU attributes set.
22 sram4_ipc0: memory@20040000{
23 compatible = "zephyr,memory-region", "mmio-sram";
25 zephyr,memory-region="SRAM4_IPC0";
26 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO))>;
29 sram4_ipc1: memory@20042000{
30 compatible = "zephyr,memory-region", "mmio-sram";
32 zephyr,memory-region="SRAM4_IPC1";
[all …]
/Zephyr-latest/dts/arm/st/h7/
Dstm32h743.dtsi66 sram0: memory@24000000 {
72 sram1: memory@30000000 {
74 compatible = "zephyr,memory-region", "mmio-sram";
75 zephyr,memory-region = "SRAM1";
79 sram2: memory@30020000 {
80 compatible = "zephyr,memory-region", "mmio-sram";
82 zephyr,memory-region = "SRAM2";
86 sram3: memory@30040000 {
87 compatible = "zephyr,memory-region", "mmio-sram";
89 zephyr,memory-region = "SRAM3";
[all …]
/Zephyr-latest/modules/lz4/
DKconfig15 int "Lz4 memory usage"
19 Increasing memory usage improves compression ratio, but usually at the
24 bool "Disable dynamic memory allocation"
26 Disable lz4 functions that use dynamic memory allocation functions.
29 prompt "How stateless compression functions allocate memory for their hash table"
33 bool "in memory stack"
35 Allocate memory from stack (fastest).
38 bool "in memory heap"
41 Allocate memory from heap (requires malloc()).
53 prompt "How stateless HC compression functions allocate memory for their workspace"
[all …]
/Zephyr-latest/tests/drivers/uart/uart_async_api/boards/
Dnucleo_f746zg_nocachemem.overlay7 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
11 sram_nocache: memory@2004c000 {
12 compatible = "zephyr,memory-region", "mmio-sram";
14 zephyr,memory-region = "RAM_NOCACHE";
15 zephyr,memory-attr = <DT_MEM_ARM_MPU_RAM_NOCACHE>;
/Zephyr-latest/tests/drivers/dma/chan_blen_transfer/boards/
Ds32z2xxdc2_s32z270_rtu0.overlay7 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
11 sram_nocache: memory@31870000 {
12 compatible = "zephyr,memory-region", "mmio-sram";
14 zephyr,memory-region = "SRAMNOCACHE";
15 zephyr,memory-attr = <(DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE))>;
Ds32z2xxdc2_s32z270_rtu1.overlay7 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
11 sram_nocache: memory@35870000 {
12 compatible = "zephyr,memory-region", "mmio-sram";
14 zephyr,memory-region = "SRAMNOCACHE";
15 zephyr,memory-attr = <(DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE))>;

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