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122 * configuration, as it will conflict with flash chip.
56 external cache controller with a provided driver.
61 * submit the modified patches as their *own* work (i.e. with their
97 Do not mess with it unless you know what you are doing.
118 /* These aliases are provided for compatibility with samples */
154 message, or when sending a message buffer with no actual data. When156 zero if the message data is not wanted. The mailbox updates this field with167 when receiving a message. The mailbox updates this field with174 with the actual sender's address when the message is put into349 to fill all of the buffer with data, the unused portion of the message buffer is
80 on the Linux host. Other hardware features are not currently supported with102 The WiFi/BLE Module connected to UART3 isn't working with Zephyr yet. UART3
189 Will allow returning the build date and time of the firmware by using the info with190 format option 'b' (will also be returned with all responses by using 'a').
91 bool "Use Xtensa specific arch_spin_relax() with more NOPs"252 # Need to verify functionalities with targets supporting these.
99 with ``aarch64`` in order to download the 64-bit ARM Linux SDK.155 ``x86_64`` with ``aarch64`` in order to download the 64-bit ARM macOS SDK.
117 value is sufficient for the standard headers included with a response,170 This means that instead of specifying multiple resources with exact
48 sys_clock_set_timeout() with a number of ticks greater than
101 * NOTE: FLPR has a direct bridge with RAM21 that bypasses MPC.
309 #error Xtensa core with no interrupt support is used
116 /* These aliases are provided for compatibility with samples */
28 /* These aliases are provided for compatibility with samples */
14 when an update is available. Security is a concern with OTA updates; firmware
5 # This CMake module works together with the list_hardware.py script to obtain
12 # Outputs with examples::
102 /* These aliases are provided for compatibility with samples */
33 /* Dummy pinctrl node, filled with pin mux options at board level */
26 /* These aliases are provided for compatibility with samples */
11 80 MHz with the following features:
89 Do not mess with it unless you know what you are doing.
10 With this we refer to SW components which are built together with the embedded SW