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/Zephyr-latest/boards/qorvo/decawave_dwm3001cdk/
Ddecawave_dwm3001cdk.dts54 // will reset the board
/Zephyr-latest/boards/ezurio/bt510/
Dbt510.dts163 * Storage partition will be used by FCB/LittleFS/NVS
/Zephyr-latest/boards/ezurio/rm1xx_dvk/
Drm1xx_dvk.dts134 * Storage partition will be used by FCB/LittleFS/NVS
/Zephyr-latest/tests/kernel/fpu_sharing/generic/
DREADME.txt47 will increase the test's speed, but at the expense of the calculation's
/Zephyr-latest/kernel/
DKconfig.mem_domain54 memory management hardware will be reprogrammed on context switch
/Zephyr-latest/boards/nxp/mimxrt1160_evk/
Dmimxrt1160_evk_mimxrt1166_cm7.dts100 * timer will be used instead of systick, as allows the core clock to
/Zephyr-latest/arch/arm/core/cortex_m/tz/
DKconfig72 The library will typically come from building the Secure
/Zephyr-latest/doc/hardware/porting/
Dboard_porting.rst52 :ref:`zephyr module <modules>` or ``SOC_ROOT``). This will allow your board,
425 Only one ``.dts`` file will be used, and the most specific file which exists
426 will be used.
437 followed by trial and error. If you want to understand details, you will need
588 all matching files will be used.
716 not assume that a user will have prior knowledge/configuration or (if using
718 device for all platforms as this will not be compatible with Windows or
790 for ``plank@0.7.0``, the build system will target revision ``0.5.0``.
792 The build system will print this at CMake configuration time:
802 and the user builds for ``plank@E``, the build system will target revision ``D``
[all …]
/Zephyr-latest/doc/services/ipc/ipc_service/backends/
Dipc_service_icbmsg.rst30 …The size of the ICMsg queue is large enough to hold messages for all blocks, so it will never over…
56 Unstable behavior will appear sooner or later.
208 The allocated size for ICMsg ensures that the maximum possible number of control messages will fit …
209 so sending over the ICMsg will never fail because of buffer overflow.
353 Usually, it will be ``MSG_RELEASE_BOUND``, but ``MSG_DATA`` is also allowed.
/Zephyr-latest/boards/intel/socfpga_std/cyclonev_socdk/doc/
Dindex.rst57 You will need the Intel® Quartus® Prime SDK in order to work with this device. The
152 port on the board (J8/UART) (it will show up in /dev as a ttyUSB node), and then running
165 The usual ``flash`` target will work with the ``cyclonev_socdk`` board
184 After it completes the kernel will immediately boot using the GSRD preloader.
224 You will see output similar to the following:
/Zephyr-latest/boards/nordic/nrf9160dk/doc/
Dindex.rst183 The Zephyr build system will perform the following steps automatically:
196 When building a Secure/Non-Secure application, the Secure application will
358 to. Usually, under Linux it will be ``/dev/ttyACM1``. The ``/dev/ttyACM0``
392 will be compiled and run automatically after the Kernel has been initialized.
394 By default, the board controller firmware will route the following:
/Zephyr-latest/arch/arm/core/cortex_m/
DKconfig319 the system for its own use. These interrupts will not be masked
321 When connecting interrupts the kernel will offset all interrupts
324 highest interrupt priority which will not be blocked by interrupt
326 Since Zero-latency ISRs will run in the same priority or possibly at
364 Another image has enabled SW_VECTOR_RELAY, and will be forwarding
/Zephyr-latest/doc/connectivity/networking/api/
Dnet_if.rst16 created at runtime. A special linker section will contain information about them
21 instead as it will create VLAN interfaces automatically if
/Zephyr-latest/doc/develop/api/
Ddesign_guidelines.rst33 will be embedded in another structure. An example of such a case is
92 the unsupported API will result in a link-time error.
/Zephyr-latest/samples/drivers/counter/maxim_ds3231/
DREADME.rst44 is set, the civil time will be advanced to the start of the next hour,
45 and the clock will be set to align that time with the time of the boot,
/Zephyr-latest/boards/renesas/rcar_spider_s4/doc/
Drcar_spider_r52.rst67 More features will be supported soon.
171 You will then get access to a GDB session for debugging.
/Zephyr-latest/samples/shields/x_nucleo_iks02a1/microphone/
DREADME.rst82 At the end of the acquisition the PCM data will be printed on the terminal
91 as a USB CDC class, and will use ``/dev/ttyACM0``
/Zephyr-latest/doc/services/
Dsecure_storage.rst37 * does not guarantee that the data it stores will be secure at rest in all cases.
60 However, this does not guarantee that the data stored will be secure at rest in all cases,
/Zephyr-latest/boards/m5stack/stamp_c3/doc/
Dindex.rst123 With ``--sysbuild`` option the bootloader will be re-build and re-flash
149 The usual ``flash`` target will work with the ``stamp_c3`` board
/Zephyr-latest/boards/ite/it8xxx2_evb/doc/
Dindex.rst144 #. The file :file:`zephyr.bin` will be created by west.
173 it will work if you turn on ITE board. You can use a terminal program
/Zephyr-latest/boards/amd/kv260_r5/doc/
Dindex.rst54 all the code plus data of the application will be loaded in the sram0 region,
105 controller, meaning when the Zephyr application is started it will takeover the
/Zephyr-latest/boards/nxp/mimxrt1010_evk/doc/
Dindex.rst142 oscillator on the board will be used as a source for the GPT timer to
179 Regardless of your choice in debug probe, we will use the OpenSDA
/Zephyr-latest/boards/nxp/frdm_ke15z/doc/
Dindex.rst89 Linkserver is the default for this board, ``west flash`` and ``west debug`` will
109 Regardless of your choice in debug probe, we will use the OpenSDA
/Zephyr-latest/boards/nxp/frdm_ke17z/doc/
Dindex.rst108 Linkserver is the default for this board, ``west flash`` and ``west debug`` will
134 Regardless of your choice in debug probe, we will use the OpenSDA
/Zephyr-latest/soc/intel/intel_adsp/ace/
Dace-link.ld33 * These macros will set up a segment start address correctly,
167 * page-aligned or it will throw an error, not sure why since all
579 * appear directly in the image, but rimage will parse and repack
582 * otherwise rimage will complain about the size being wrong (which

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