| /Zephyr-latest/arch/x86/core/ia32/ |
| D | coredump.c | 14 uint32_t vector; member
53 arch_blk.vector = z_x86_exception_vector; in arch_coredump_info_dump()
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| /Zephyr-latest/arch/arm/core/cortex_m/ |
| D | CMakeLists.txt | 44 # Using 0x0 prefix will result in placing the relay vector table section
46 # required for CPUs without VTOR, which need to have the exception vector
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| /Zephyr-latest/samples/modules/tflite-micro/tflm_ethosu/src/ |
| D | inference_process.cpp | 69 const vector<DataPtr> &_input, const vector<DataPtr> &_output, in InferenceJob()
70 const vector<DataPtr> &_expectedOutput) in InferenceJob()
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| D | main.cpp | 83 const vector<DataPtr> &_input, const vector<DataPtr> &_output, in xInferenceJob()
84 const vector<DataPtr> &_expectedOutput, k_queue *_queue) in xInferenceJob()
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| /Zephyr-latest/soc/st/stm32/stm32f0x/ |
| D | CMakeLists.txt | 3 # The vector table must be placed at the start of SRAM
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| /Zephyr-latest/soc/renesas/ra/ra4m1/ |
| D | ram_sections.ld | 9 /* If DTC is used, put the DTC vector table at the start of SRAM.
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| /Zephyr-latest/soc/nxp/lpc/lpc51u68/ |
| D | linker.ld | 8 * so we create an alias for the symbol to Zephyr's vector table
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| /Zephyr-latest/soc/renesas/ra/ra2a1/ |
| D | ram_sections.ld | 9 /* If DTC is used, put the DTC vector table at the start of SRAM.
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| /Zephyr-latest/soc/litex/litex_vexriscv/ |
| D | CMakeLists.txt | 9 ${ZEPHYR_BASE}/soc/common/riscv-privileged/vector.S
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| /Zephyr-latest/include/zephyr/arch/x86/intel64/ |
| D | exception.h | 47 unsigned long vector; member
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| /Zephyr-latest/soc/renesas/ra/ra6m1/ |
| D | sections.ld | 9 /* If DTC is used, put the DTC vector table at the start of SRAM.
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| /Zephyr-latest/soc/renesas/ra/ra6m2/ |
| D | sections.ld | 9 /* If DTC is used, put the DTC vector table at the start of SRAM.
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| /Zephyr-latest/soc/renesas/ra/ra6m3/ |
| D | sections.ld | 9 /* If DTC is used, put the DTC vector table at the start of SRAM.
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| /Zephyr-latest/drivers/pcie/host/ |
| D | msi.c | 55 __weak bool arch_pcie_msi_vector_connect(msi_vector_t *vector, in arch_pcie_msi_vector_connect() argument
60 ARG_UNUSED(vector); in arch_pcie_msi_vector_connect()
178 msi_vector_t *vector, in pcie_msi_vector_connect() argument
190 return arch_pcie_msi_vector_connect(vector, routine, parameter, flags); in pcie_msi_vector_connect()
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| /Zephyr-latest/modules/thrift/src/thrift/server/ |
| D | TFDServer.h | 46 std::vector<std::shared_ptr<TTransport>> children;
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| /Zephyr-latest/include/zephyr/arch/nios2/ |
| D | linker.ld | 28 * _EXC_VECTOR General exception vector
36 * 1. Non-XIP systems where the reset vector is at the beginning of RAM
37 * with the exception vector 0x20 bytes after it.
38 * 2. XIP systems where the reset vector is at the beginning of ROM and
39 * the exception vector is in RAM
57 ASSERT(_RESET_VECTOR == _ROM_ADDR, "Reset vector not at beginning of ROM!")
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| /Zephyr-latest/subsys/lorawan/services/ |
| D | frag_decoder_lowmem.c | 204 struct sys_bitarray *vector, size_t len) in frag_dec_write_vector() argument
207 if (bit_get(vector, i)) { in frag_dec_write_vector()
216 struct sys_bitarray *vector, size_t len) in frag_dec_read_vector() argument
220 bit_set(vector, i); in frag_dec_read_vector()
222 bit_clear(vector, i); in frag_dec_read_vector()
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| /Zephyr-latest/arch/x86/core/ |
| D | fatal.c | 285 static void log_exception(uintptr_t vector, uintptr_t code) in log_exception() argument
287 switch (vector) { in log_exception()
417 FUNC_NORETURN void z_x86_unhandled_cpu_exception(uintptr_t vector, in z_x86_unhandled_cpu_exception() argument
421 log_exception(vector, esf_get_code(esf)); in z_x86_unhandled_cpu_exception()
423 ARG_UNUSED(vector); in z_x86_unhandled_cpu_exception()
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| /Zephyr-latest/tests/modules/thrift/ThriftTest/src/ |
| D | server.hpp | 157 void testList(vector<int32_t> &out, const vector<int32_t> &thing) override in testList()
159 vector<int32_t>::const_iterator l_iter; in testList()
239 vector<Xtruct> xtructs = i2_iter->second.xtructs; in testInsanity()
240 vector<Xtruct>::const_iterator x; in testInsanity()
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| /Zephyr-latest/soc/renesas/ra/ra4w1/ |
| D | sections.ld | 17 /* If DTC is used, put the DTC vector table at the start of SRAM.
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| /Zephyr-latest/soc/wch/ch32v/ |
| D | Kconfig | 19 vectors in the vector table.
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| /Zephyr-latest/soc/renesas/smartbond/da1469x/ |
| D | intvect_reserved.ld | 10 * access to interrupt vector which is located at 0x0 where flash is remapped.
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| /Zephyr-latest/soc/nxp/lpc/lpc55xxx/ |
| D | linker.ld | 15 * so we create an alias for the symbol to Zephyr's vector table
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| /Zephyr-latest/soc/nxp/lpc/lpc54xxx/ |
| D | linker.ld | 15 * so we create an alias for the symbol to Zephyr's vector table
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| /Zephyr-latest/include/zephyr/arch/x86/ia32/ |
| D | gdbstub.h | 47 uint32_t vector; member
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