1/*
2 * Copyright (c) 2024 Renesas Electronics Corporation
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7.code_in_ram :
8{
9	. = ALIGN(4);
10	__Code_In_RAM_Start = .;
11	KEEP(*(.code_in_ram*))
12	__Code_In_RAM_End = .;
13} > RAMABLE_REGION
14
15SECTION_DATA_PROLOGUE(.fsp_dtc_vector_table,(NOLOAD),)
16{
17	/* If DTC is used, put the DTC vector table at the start of SRAM.
18		This avoids memory holes due to 1K alignment required by it. */
19	*(.fsp_dtc_vector_table)
20} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
21
22SECTION_PROLOGUE(.id_code,,)
23{
24    KEEP(*(.id_code*))
25} GROUP_LINK_IN(ID_CODE)
26