Searched refs:shift (Results 151 – 170 of 170) sorted by relevance
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91 -icount shift=${CONFIG_QEMU_ICOUNT_SHIFT},align=off,sleep=on95 -icount shift=${CONFIG_QEMU_ICOUNT_SHIFT},align=off,sleep=off
93 -Wno-shift-overflow
76 int "QEMU icount shift value"
107 reg-shift = <2>;
113 reg-shift = <0>;123 reg-shift = <0>;
164 calibrating the frequency shift of the PLL. Enabling this
201 The bit shift number for the virtual address for Xtensa
929 int8_t shift; member
48 * which also introduces some shift.
228 * Fix for undefined shift behavior (CID 211523)1201 * :github:`27319` - [Coverity CID :211523] Bad bit shift operation in arch/arc/core/mpu/arc_mpu_v2_…1423 * :github:`26266` - Cast and shift operator priority issue may lead to wrong memory size result in …1543 * :github:`25713` - Miss shift i2c slave address in i2c_sifive
189 reg-shift = <0>;
482 * :github:`20964` - [Coverity CID :206020] Bad bit shift operation in drivers/ipm/ipm\_nrfx\_ipc.c
809 * :github:`22649` - [Coverity CID :208200] Bad bit shift operation in drivers/interrupt_controller/…
1601 * :github:`29014` - [Coverity CID :214872] Bad bit shift operation in drivers/ethernet/eth_w5500.c
1332 * :dtcompatible:`ns16550`: ``reg-shift`` is now required.
600 - Avoid undefined and implementation defined behavior with shift operator
1421 shoft||shift
726 length of the bit masks and shift to apply when generating interrupt values, when checking the
836 .rst-versions.shift-up {
583 …- The right hand operand of a shift operator shall lie in the range zero to one less than the wid…
