Searched refs:shared (Results 76 – 100 of 290) sorted by relevance
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60 spi-data-irq-shared;
37 gpio-map-pass-thru = <0 0x3f>; /* shared */
89 int "Host I/O peripheral port size for shared memory in MEC172X series"94 the shared memory region to return the ACPI response data.102 the shared memory region to return the host command parameter data.
86 /* Include default shared RAM configuration file */
60 /* Include default shared RAM configuration file */
39 bool "Use shared multi heap for video buffer"
20 * Note that shared memory must have specific MPU attributes set.
23 * Note that shared memory must have specific MPU attributes set.
11 no cross-dependencies or shared resources.
17 COMMAND ${CMAKE_COMMAND} -E echo "--- own pre-shared key. ---"
25 int "Buffer size in bytes for TX buffer shared by all EC host commands"38 int "Buffer size in bytes for RX buffer shared by all EC host commands"
20 While cache coherence can be a concern for data shared between SMP cores, Zephyr27 When dealing with memory shared between a processor core and other bus masters,139 region back to shared memory. Flush the cache associated with a buffer after the147 shared memory. While this solves the cache coherence problem for CPU writes,
129 shared-memory = <&ipmmem0>;130 shared-memory-size = <0x400>;141 shared-memory = <&ipmmem0>;142 shared-memory-size = <0x400>;
52 pre-shared key.
92 /* We re-use the IPC shared buffer definition from the real HW. But note the start address of the
44 # ELF shared libraries do not support init sections
7 Data transferred over this backend travels in dynamically allocated buffers on shared memory.17 The shared memory is divided into two parts.43 * If at least one of the cores uses data cache on shared memory, set the ``dcache-alignment`` value.45 You can skip it if none of the communication sides is using data cache on shared memory.98 The ICBMsg protocol transfers messages using dynamically allocated blocks of shared memory.104 The ICBMsg uses two shared memory regions, ``rx-region`` for message receiving, and ``tx-region`` f…108 Each shared memory region is divided into following two parts:
15 the shared memory and triggers IPC task which results in the interrupt on the network17 from shared memory and local system tick updated by the offset. User can observe
41 the SYSCOUNTER, but can be shared by multiple processors in the system.
27 The mutually-shared encryption key created during host-device paring may get
108 /* Include default shared RAM configuration file */
236 interrupts = <0 1>; // shared interrupt line with rtc243 interrupts = <0 1>; // shared interrupt line with wdt0
