Searched refs:resets (Results 76 – 100 of 174) sorted by relevance
1234567
| /Zephyr-latest/dts/arm/st/u0/ |
| D | stm32u083.dtsi | 17 resets = <&rctl STM32_RESET(APB1L, 12U)>;
|
| /Zephyr-latest/dts/arm/st/h5/ |
| D | stm32h563.dtsi | 18 resets = <&rctl STM32_RESET(AHB4, 12U)>;
|
| D | stm32h5.dtsi | 255 resets = <&rctl STM32_RESET(APB2, 14U)>;
264 resets = <&rctl STM32_RESET(APB1L, 17U)>;
273 resets = <&rctl STM32_RESET(APB1L, 18U)>;
282 resets = <&rctl STM32_RESET(APB3, 6U)>;
341 resets = <&rctl STM32_RESET(APB2, 11U)>;
357 resets = <&rctl STM32_RESET(APB1L, 0U)>;
378 resets = <&rctl STM32_RESET(APB1L, 1U)>;
399 resets = <&rctl STM32_RESET(APB1L, 4U)>;
420 resets = <&rctl STM32_RESET(APB1L, 5U)>;
469 resets = <&rctl STM32_RESET(APB1L, 23U)>;
[all …]
|
| /Zephyr-latest/dts/arm/st/h7/ |
| D | stm32h730.dtsi | 17 resets = <&rctl STM32_RESET(AHB2, 4U)>;
|
| D | stm32h723.dtsi | 31 resets = <&rctl STM32_RESET(APB2, 6U)>;
40 resets = <&rctl STM32_RESET(APB2, 7U)>;
92 resets = <&rctl STM32_RESET(APB3, 3U)>;
143 resets = <&rctl STM32_RESET(APB1H, 24U)>;
165 resets = <&rctl STM32_RESET(APB1H, 25U)>;
|
| D | stm32h747.dtsi | 23 resets = <&rctl STM32_RESET(APB3, 4U)>;
|
| /Zephyr-latest/samples/subsys/ipc/openamp/boards/ |
| D | frdm_mcxn947_mcxn947_cpu0.overlay | 24 resets = <&reset NXP_SYSCON_RESET(0, 26)>;
|
| /Zephyr-latest/samples/subsys/ipc/openamp/remote/boards/ |
| D | frdm_mcxn947_mcxn947_cpu1.overlay | 24 resets = <&reset NXP_SYSCON_RESET(0, 26)>;
|
| /Zephyr-latest/dts/arm/st/l4/ |
| D | stm32l422.dtsi | 17 resets = <&rctl STM32_RESET(AHB2, 16U)>;
|
| D | stm32l4q5.dtsi | 17 resets = <&rctl STM32_RESET(AHB2, 16U)>;
|
| D | stm32l4a6.dtsi | 17 resets = <&rctl STM32_RESET(AHB2, 16U)>;
|
| D | stm32l462.dtsi | 17 resets = <&rctl STM32_RESET(AHB2, 16U)>;
|
| D | stm32l486.dtsi | 17 resets = <&rctl STM32_RESET(AHB2, 16U)>;
|
| D | stm32l4s5.dtsi | 17 resets = <&rctl STM32_RESET(AHB2, 16U)>;
|
| D | stm32l4r9.dtsi | 21 resets = <&rctl STM32_RESET(APB2, 26U)>;
|
| /Zephyr-latest/dts/arm/st/f4/ |
| D | stm32f415.dtsi | 17 resets = <&rctl STM32_RESET(AHB2, 4U)>;
|
| D | stm32f437.dtsi | 18 resets = <&rctl STM32_RESET(AHB2, 4U)>;
|
| /Zephyr-latest/dts/arm/st/c0/ |
| D | stm32c0.dtsi | 194 resets = <&rctl STM32_RESET(APB1H, 14U)>;
203 resets = <&rctl STM32_RESET(APB1L, 17U)>;
212 resets = <&rctl STM32_RESET(APB1H, 11U)>;
229 resets = <&rctl STM32_RESET(APB1L, 1U)>;
246 resets = <&rctl STM32_RESET(APB1H, 15U)>;
263 resets = <&rctl STM32_RESET(APB1H, 17U)>;
280 resets = <&rctl STM32_RESET(APB1H, 18U)>;
|
| /Zephyr-latest/dts/arm/st/f1/ |
| D | stm32f1.dtsi | 179 resets = <&rctl STM32_RESET(APB2, 14U)>;
188 resets = <&rctl STM32_RESET(APB1, 17U)>;
197 resets = <&rctl STM32_RESET(APB1, 18U)>;
254 resets = <&rctl STM32_RESET(APB2, 11U)>;
271 resets = <&rctl STM32_RESET(APB1, 0U)>;
293 resets = <&rctl STM32_RESET(APB1, 1U)>;
315 resets = <&rctl STM32_RESET(APB1, 2U)>;
|
| /Zephyr-latest/dts/arm/st/g0/ |
| D | stm32g0_crypt.dtsi | 17 resets = <&rctl STM32_RESET(AHB1, 16U)>;
|
| /Zephyr-latest/dts/arm/st/f7/ |
| D | stm32f746.dtsi | 20 resets = <&rctl STM32_RESET(APB2, 26U)>;
|
| D | stm32f767.dtsi | 21 resets = <&rctl STM32_RESET(APB2, 26U)>;
|
| /Zephyr-latest/drivers/mdio/ |
| D | mdio_dwcxgmac.c | 50 #if DT_ANY_INST_HAS_PROP_STATUS_OKAY(resets)
173 #if DT_ANY_INST_HAS_PROP_STATUS_OKAY(resets) in mdio_dwcxgmac_initialize()
220 IF_ENABLED(DT_INST_NODE_HAS_PROP(n, resets), \
|
| /Zephyr-latest/dts/arm/st/f0/ |
| D | stm32f0.dtsi | 177 resets = <&rctl STM32_RESET(APB2, 14U)>;
237 resets = <&rctl STM32_RESET(APB2, 11U)>;
254 resets = <&rctl STM32_RESET(APB1, 1U)>;
276 resets = <&rctl STM32_RESET(APB1, 8U)>;
298 resets = <&rctl STM32_RESET(APB2, 17U)>;
320 resets = <&rctl STM32_RESET(APB2, 18U)>;
|
| /Zephyr-latest/dts/arm/st/l0/ |
| D | stm32l031.dtsi | 17 resets = <&rctl STM32_RESET(APB2, 5U)>;
|
1234567
