| /Zephyr-latest/drivers/video/ |
| D | ov2640.c | 529 const struct ov2640_reg *regs, uint16_t reg_num) in ov2640_write_all() argument
537 err = ov2640_write_reg(&cfg->i2c, regs[i].addr, regs[i].value); in ov2640_write_all()
561 int max_level, int cols, const uint8_t regs[][cols]) in ov2640_set_level()
574 for (int i = 0; i < (ARRAY_SIZE(regs[0]) / sizeof(regs[0][0])); i++) { in ov2640_set_level()
575 ret |= ov2640_write_reg(&cfg->i2c, regs[0][i], regs[level][i]); in ov2640_set_level()
|
| D | gc2145.c | 763 static int gc2145_write_all(const struct device *dev, const struct gc2145_reg *regs, in gc2145_write_all() argument
771 ret = gc2145_write_reg(&cfg->i2c, regs[i].addr, regs[i].value); in gc2145_write_all()
|
| /Zephyr-latest/drivers/display/ |
| D | display_ili9xxx.h | 77 const void *regs; member
|
| /Zephyr-latest/dts/arm/st/f3/ |
| D | stm32f303Xe.dtsi | 40 st,backup-regs = <16>;
|
| D | stm32f303Xb.dtsi | 40 st,backup-regs = <16>;
|
| D | stm32f303X8.dtsi | 39 st,backup-regs = <5>;
|
| D | stm32f334.dtsi | 50 st,backup-regs = <5>;
|
| /Zephyr-latest/arch/x86/core/ |
| D | pcie.c | 76 volatile uint32_t *regs in pcie_mm_conf() local
80 regs[reg] = *data; in pcie_mm_conf()
82 *data = regs[reg]; in pcie_mm_conf()
|
| /Zephyr-latest/drivers/pinctrl/ |
| D | pinctrl_sam0.c | 34 soc_pin.regs = (PortGroup *) sam_port_addrs[port_idx]; in pinctrl_configure_pin()
|
| /Zephyr-latest/drivers/ethernet/ |
| D | eth_sam_gmac.c | 1342 Gmac *gmac = cfg->regs; in eth_rx()
1406 Gmac *gmac = cfg->regs; in eth_tx()
1579 Gmac *gmac = cfg->regs; in queue0_isr()
1630 Gmac *gmac = cfg->regs; in priority_queue_isr()
1783 link_configure(cfg->regs, in phy_link_state_changed()
1833 result = gmac_init(cfg->regs, gmac_ncfgr_val); in eth0_iface_init()
1847 mac_addr_set(cfg->regs, 0, dev_data->mac_addr); in eth0_iface_init()
1856 result = queue_init(cfg->regs, &dev_data->queue_list[i]); in eth0_iface_init()
1866 cfg->regs->GMAC_ST1RPQ[i] = in eth0_iface_init()
1876 cfg->regs->GMAC_ST1RPQ[i] = in eth0_iface_init()
[all …]
|
| D | eth_gecko_priv.h | 77 ETH_TypeDef *regs; member
|
| /Zephyr-latest/soc/atmel/sam0/common/ |
| D | soc_port.h | 76 PortGroup *regs; /** pointer to registers of the I/O Pin Controller */ member
|
| D | soc_port.c | 37 PortGroup *pg = pin->regs; in soc_port_configure()
|
| /Zephyr-latest/soc/intel/intel_adsp/common/include/ |
| D | intel_adsp_ipc.h | 13 volatile struct intel_adsp_ipc *regs; member
|
| /Zephyr-latest/drivers/gpio/ |
| D | gpio_renesas_ra.c | 65 mem_addr_t regs; member
115 return sys_read32(config->regs + offset); in reg_read()
122 sys_write32(value, config->regs + offset); in reg_write()
425 .regs = DT_INST_REG_ADDR(idx), \
|
| D | gpio_pca_series.c | 146 const uint8_t *regs; /* pointer to register map */ member
210 return cfg->part_cfg->regs[reg_type]; in gpio_pca_series_reg_get_addr()
745 uint8_t reg = cfg->part_cfg->regs[reg_type]; in gpio_pca_series_debug_dump()
1953 .regs = gpio_pca_series_reg_pca9538,
1975 .regs = gpio_pca_series_reg_pca9538,
2017 .regs = gpio_pca_series_reg_pca9539,
2039 .regs = gpio_pca_series_reg_pca9539,
2132 .regs = gpio_pca_series_reg_pcal6524,
2174 .regs = gpio_pca_series_reg_pcal6534,
|
| /Zephyr-latest/drivers/serial/ |
| D | uart_renesas_ra.c | 29 mem_addr_t regs; member
190 return sys_read8(config->regs + offs); in uart_ra_read_8()
197 sys_write8(value, config->regs + offs); in uart_ra_write_8()
204 return sys_read16(config->regs + offs); in uart_ra_read_16()
211 sys_write16(value, config->regs + offs); in uart_ra_write_16()
661 .regs = DT_REG_ADDR(DT_INST_PARENT(n)), \
|
| /Zephyr-latest/dts/arm/st/l1/ |
| D | stm32l151Xc.dtsi | 56 st,backup-regs = <32>;
|
| D | stm32l152Xc.dtsi | 56 st,backup-regs = <32>;
|
| D | stm32l152Xe.dtsi | 56 st,backup-regs = <32>;
|
| /Zephyr-latest/soc/mediatek/mt8xxx/ |
| D | mtk_adsp_load.py | 62 regs = struct.unpack(f">{2 * len(rnames)}Q", readfile(path + "reg"))
63 maps = {n: (regs[2 * i], regs[2 * i + 1]) for i, n in enumerate(rnames)}
|
| /Zephyr-latest/dts/arm/st/f0/ |
| D | stm32f031.dtsi | 38 st,backup-regs = <5>;
|
| /Zephyr-latest/drivers/sensor/ti/bq274xx/ |
| D | bq274xx.h | 88 const struct bq274xx_regs *regs; member
|
| /Zephyr-latest/drivers/disk/nvme/ |
| D | nvme_cmd.c | 471 mm_reg_t regs = DEVICE_MMIO_GET(qpair->ctrlr->dev); in nvme_cmd_qpair_process_completion() local
473 sys_write32(qpair->cq_head, regs + qpair->cq_hdbl_off); in nvme_cmd_qpair_process_completion()
640 mm_reg_t regs = DEVICE_MMIO_GET(qpair->ctrlr->dev); in nvme_cmd_qpair_submit_request() local
664 sys_write32(qpair->sq_tail, regs + qpair->sq_tdbl_off); in nvme_cmd_qpair_submit_request()
|
| /Zephyr-latest/drivers/can/ |
| D | can_mcp251xfd.c | 162 uint32_t *regs; in mcp251xfd_fifo_write() local
170 regs = mcp251xfd_read_crc(dev, MCP251XFD_REG_TXQSTA, MCP251XFD_REG_SIZE * 2); in mcp251xfd_fifo_write()
171 if (!regs) { in mcp251xfd_fifo_write()
177 if (!(regs[0] & MCP251XFD_REG_TXQSTA_TXQNIF)) { in mcp251xfd_fifo_write()
181 address = MCP251XFD_RAM_START_ADDR + regs[1]; in mcp251xfd_fifo_write()
742 uint32_t *regs, fifosta, ua; in mcp251xfd_handle_fifo_read() local
754 regs = mcp251xfd_read_crc(dev, MCP251XFD_REG_FIFOCON_TO_STA(fifo->reg_fifocon_addr), in mcp251xfd_handle_fifo_read()
756 if (!regs) { in mcp251xfd_handle_fifo_read()
760 fifosta = sys_le32_to_cpu(regs[0]); in mcp251xfd_handle_fifo_read()
761 ua = sys_le32_to_cpu(regs[1]); in mcp251xfd_handle_fifo_read()
|
