1 /* 2 * Copyright (c) 2017 Jan Van Winkel <jan.van_winkel@dxplore.eu> 3 * Copyright (c) 2019 Nordic Semiconductor ASA 4 * Copyright (c) 2020 Teslabs Engineering S.L. 5 * Copyright (c) 2021 Krivorot Oleg <krivorot.oleg@gmail.com> 6 * 7 * SPDX-License-Identifier: Apache-2.0 8 */ 9 #ifndef ZEPHYR_DRIVERS_DISPLAY_DISPLAY_ILI9XXX_H_ 10 #define ZEPHYR_DRIVERS_DISPLAY_DISPLAY_ILI9XXX_H_ 11 12 #include <zephyr/drivers/mipi_dbi.h> 13 #include <zephyr/sys/util.h> 14 15 /* Commands/registers. */ 16 #define ILI9XXX_SWRESET 0x01 17 #define ILI9XXX_SLPOUT 0x11 18 #define ILI9XXX_DINVON 0x21 19 #define ILI9XXX_GAMSET 0x26 20 #define ILI9XXX_DISPOFF 0x28 21 #define ILI9XXX_DISPON 0x29 22 #define ILI9XXX_CASET 0x2a 23 #define ILI9XXX_PASET 0x2b 24 #define ILI9XXX_RAMWR 0x2c 25 #define ILI9XXX_RGBSET 0x2d 26 #define ILI9XXX_RAMRD 0x2e 27 #define ILI9XXX_MADCTL 0x36 28 #define ILI9XXX_PIXSET 0x3A 29 #define ILI9XXX_RAMRD_CONT 0x3e 30 31 /* MADCTL register fields. */ 32 #define ILI9XXX_MADCTL_MY BIT(7U) 33 #define ILI9XXX_MADCTL_MX BIT(6U) 34 #define ILI9XXX_MADCTL_MV BIT(5U) 35 #define ILI9XXX_MADCTL_ML BIT(4U) 36 #define ILI9XXX_MADCTL_BGR BIT(3U) 37 #define ILI9XXX_MADCTL_MH BIT(2U) 38 39 /* PIXSET register fields. */ 40 #define ILI9XXX_PIXSET_RGB_18_BIT 0x60 41 #define ILI9XXX_PIXSET_RGB_16_BIT 0x50 42 #define ILI9XXX_PIXSET_MCU_18_BIT 0x06 43 #define ILI9XXX_PIXSET_MCU_16_BIT 0x05 44 45 /** Command/data GPIO level for commands. */ 46 #define ILI9XXX_CMD 1U 47 /** Command/data GPIO level for data. */ 48 #define ILI9XXX_DATA 0U 49 50 /** Sleep out time (ms), ref. 8.2.12 of ILI9XXX manual. */ 51 #define ILI9XXX_SLEEP_OUT_TIME 120 52 53 /** Reset pulse time (ms), ref 15.4 of ILI9XXX manual. */ 54 #define ILI9XXX_RESET_PULSE_TIME 1 55 56 /** Reset wait time (ms), ref 15.4 of ILI9XXX manual. */ 57 #define ILI9XXX_RESET_WAIT_TIME 5 58 59 enum madctl_cmd_set { 60 CMD_SET_1, /* Default for most of ILI9xxx display controllers */ 61 CMD_SET_2, /* Used by ILI9342c */ 62 }; 63 64 struct ili9xxx_quirks { 65 enum madctl_cmd_set cmd_set; 66 }; 67 68 struct ili9xxx_config { 69 const struct ili9xxx_quirks *quirks; 70 const struct device *mipi_dev; 71 struct mipi_dbi_config dbi_config; 72 uint8_t pixel_format; 73 uint16_t rotation; 74 uint16_t x_resolution; 75 uint16_t y_resolution; 76 bool inversion; 77 const void *regs; 78 int (*regs_init_fn)(const struct device *dev); 79 }; 80 81 int ili9xxx_transmit(const struct device *dev, uint8_t cmd, 82 const void *tx_data, size_t tx_len); 83 84 #endif /* ZEPHYR_DRIVERS_DISPLAY_DISPLAY_ILI9XXX_H_ */ 85
