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Searched refs:phase (Results 51 – 75 of 116) sorted by relevance

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/Zephyr-latest/include/zephyr/bluetooth/mesh/
Dblob_cli.h85 enum bt_mesh_blob_xfer_phase phase; member
Dcfg_cli.h305 uint16_t net_idx, uint8_t phase);
557 uint8_t *phase);
576 uint8_t transition, uint8_t *status, uint8_t *phase);
/Zephyr-latest/boards/silabs/radio_boards/slwrb4180b/
Dslwrb4180b.dts87 dpll-lock = "phase";
/Zephyr-latest/doc/_extensions/zephyr/doxytooltip/static/tippy/
Dpopper.min.js7phase===n})))}),[])}((s=[].concat(o,f.options.modifiers),p=s.reduce((function(e,t){var n=e[t.name]…
/Zephyr-latest/subsys/usb/device_next/class/
DKconfig.dfu31 manifestation phase.
/Zephyr-latest/subsys/bluetooth/mesh/
Dcfg_cli.c178 uint8_t *phase; member
187 uint8_t status, phase; in krp_status() local
194 phase = net_buf_simple_pull_u8(buf); in krp_status()
206 if (param->phase) { in krp_status()
207 *param->phase = phase; in krp_status()
215 cli->cb->krp_status(cli, ctx->addr, status, net_idx, phase); in krp_status()
1183 uint8_t *phase) in bt_mesh_cfg_cli_krp_get() argument
1189 .phase = phase, in bt_mesh_cfg_cli_krp_get()
1202 return bt_mesh_msg_ackd_send(cli->model, &ctx, &msg, !status && !phase ? NULL : &rsp); in bt_mesh_cfg_cli_krp_get()
1206 uint8_t transition, uint8_t *status, uint8_t *phase) in bt_mesh_cfg_cli_krp_set() argument
[all …]
Dblob_cli.c1218 info.phase = net_buf_simple_pull_u8(buf); in handle_xfer_status()
1233 info.phase, bt_hex(&info.id, 8)); in handle_xfer_status()
1265 } else if (info.phase != expected_phase) { in handle_xfer_status()
1266 LOG_WRN("Wrong phase: %u != %u", expected_phase, info.phase); in handle_xfer_status()
1268 } else if (info.phase != BT_MESH_BLOB_XFER_PHASE_INACTIVE && in handle_xfer_status()
Dcfg_srv.c2165 uint8_t phase, uint8_t status) in send_krp_status() argument
2173 net_buf_simple_add_u8(&msg, phase); in send_krp_status()
2204 uint8_t phase, status; in krp_set() local
2208 phase = net_buf_simple_pull_u8(buf); in krp_set()
2215 status = bt_mesh_subnet_kr_phase_set(idx, &phase); in krp_set()
2217 LOG_ERR("Invalid kr phase transition 0x%02x", phase); in krp_set()
2221 return send_krp_status(model, ctx, idx, phase, status); in krp_set()
/Zephyr-latest/boards/silabs/radio_boards/slwrb4180a/
Dslwrb4180a.dts86 dpll-lock = "phase";
/Zephyr-latest/boards/sparkfun/thing_plus_matter_mgm240p/
Dsparkfun_thing_plus_matter_mgm240p.dts64 dpll-lock = "phase";
/Zephyr-latest/boards/silabs/dev_kits/xg24_ek2703a/
Dxg24_ek2703a.dts85 dpll-lock = "phase";
/Zephyr-latest/include/zephyr/linker/
Dcommon-ram.ld68 * via iteration before the POST_KERNEL phase.
/Zephyr-latest/tests/drivers/can/host/
DREADME.rst26 bitrates are 125 kbits/s for the arbitration phase/CAN classic and 1 Mbit/s for the CAN FD data
27 phase when using bitrate switching (BRS).
/Zephyr-latest/doc/hardware/peripherals/can/
Dcontroller.rst65 Start Of Frame bit. After that, the identifiers follow. This phase is called the
66 arbitration phase. During the arbitration phase, write collisions are allowed.
295 A similar API exists for calculating and setting the timing for the data phase for CAN FD capable
Dshell.rst31 timing for the CAN FD data phase).
110 The classic CAN bitrate/CAN FD arbitration phase bitrate can be configured using the ``can bitrate``
118 If :kconfig:option:`CONFIG_CAN_FD_MODE` is enabled, the data phase bitrate can be configured using
/Zephyr-latest/boards/silabs/radio_boards/xg29_rb4412a/
Dxg29_rb4412a.dts96 dpll-lock = "phase";
/Zephyr-latest/dts/riscv/
Driscv32-litex-vexriscv.dtsi336 litex,clock-phase = <0>;
349 litex,clock-phase = <0>;
/Zephyr-latest/subsys/net/l2/ppp/
Dppp_internal.h106 const char *ppp_phase_str(enum ppp_phase phase);
Dlcp.c165 if (ctx->phase != PPP_DEAD) { in lcp_close()
/Zephyr-latest/doc/develop/test/
Dztest.rst201 /* Only suites that use a predicate checking for phase == PWR_PHASE_0 will run. */
202 state.phase = PWR_PHASE_0;
205 /* Only suites that use a predicate checking for phase == PWR_PHASE_1 will run. */
206 state.phase = PWR_PHASE_1;
209 /* Only suites that use a predicate checking for phase == PWR_PHASE_2 will run. */
210 state.phase = PWR_PHASE_2;
/Zephyr-latest/boards/silabs/dev_kits/xg24_dk2601b/
Dxg24_dk2601b.dts96 dpll-lock = "phase";
/Zephyr-latest/boards/silabs/radio_boards/xg23_rb4210a/
Dxg23_rb4210a.dts96 dpll-lock = "phase";
/Zephyr-latest/include/zephyr/net/
Dppp.h506 enum ppp_phase phase; member
/Zephyr-latest/boards/silabs/radio_boards/xg24_rb4187c/
Dxg24_rb4187c.dts98 dpll-lock = "phase";
/Zephyr-latest/cmake/linker_script/common/
Dcommon-ram.cmake35 # via iteration before the POST_KERNEL phase.

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