1/* 2 * Copyright (c) 2024 Yishai Jaffe 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7/dts-v1/; 8#include <silabs/efr32zg23b020f512im48.dtsi> 9#include <zephyr/dt-bindings/input/input-event-codes.h> 10#include <zephyr/dt-bindings/regulator/silabs_dcdc.h> 11#include "xg23_rb4210a-pinctrl.dtsi" 12 13/ { 14 model = "Silicon Labs BRD4210A"; 15 compatible = "silabs,xg23_rb4210a", "silabs,efr32zg23"; 16 17 chosen { 18 zephyr,console = &usart0; 19 zephyr,shell-uart = &usart0; 20 zephyr,uart-pipe = &usart0; 21 zephyr,sram = &sram0; 22 zephyr,flash = &flash0; 23 zephyr,code-partition = &slot0_partition; 24 }; 25 26 aliases { 27 led0 = &led0; 28 led1 = &led1; 29 sw0 = &button0; 30 sw1 = &button1; 31 watchdog0 = &wdog0; 32 }; 33 34 leds { 35 compatible = "gpio-leds"; 36 led0: led_0 { 37 gpios = <&gpiob 2 GPIO_ACTIVE_HIGH>; 38 label = "LED 0"; 39 }; 40 led1: led_1 { 41 gpios = <&gpiod 3 GPIO_ACTIVE_HIGH>; 42 label = "LED 1"; 43 }; 44 }; 45 46 buttons { 47 compatible = "gpio-keys"; 48 button0: button_0 { 49 gpios = <&gpiob 1 GPIO_ACTIVE_LOW>; 50 label = "User Push Button 0"; 51 zephyr,code = <INPUT_KEY_0>; 52 }; 53 button1: button_1 { 54 gpios = <&gpiob 3 GPIO_ACTIVE_LOW>; 55 label = "User Push Button 1"; 56 zephyr,code = <INPUT_KEY_1>; 57 }; 58 }; 59 60}; 61 62&cpu0 { 63 clock-frequency = <78000000>; 64}; 65 66&pstate_em3 { 67 status = "disabled"; 68}; 69 70&hfxo { 71 status = "okay"; 72 ctune = <106>; 73 precision = <50>; 74}; 75 76&lfxo { 77 status = "okay"; 78 ctune = <38>; 79 precision = <50>; 80}; 81 82&hfrcodpll { 83 clock-frequency = <DT_FREQ_M(78)>; 84 clocks = <&hfxo>; 85 dpll-n = <3839>; 86 dpll-m = <1919>; 87 dpll-edge = "fall"; 88 dpll-lock = "phase"; 89 dpll-autorecover; 90}; 91 92&em23grpaclk { 93 clocks = <&lfxo>; 94}; 95 96&em4grpaclk { 97 clocks = <&lfxo>; 98}; 99 100&sysrtcclk { 101 clocks = <&lfxo>; 102}; 103 104&wdog0clk { 105 clocks = <&lfxo>; 106}; 107 108&wdog1clk { 109 clocks = <&lfxo>; 110}; 111 112&usart0 { 113 current-speed = <115200>; 114 pinctrl-0 = <&usart0_default>; 115 pinctrl-names = "default"; 116 status = "okay"; 117}; 118 119&gpio { 120 status = "okay"; 121}; 122 123&gpioa { 124 status = "okay"; 125}; 126 127&gpiob { 128 status = "okay"; 129 130 board-controller-enable { 131 gpio-hog; 132 gpios = <0 GPIO_ACTIVE_HIGH>; 133 output-high; 134 }; 135}; 136 137&gpioc { 138 status = "okay"; 139}; 140 141&gpiod { 142 status = "okay"; 143}; 144 145&wdog0 { 146 status = "okay"; 147}; 148 149&sysrtc0 { 150 status = "okay"; 151}; 152 153&se { 154 status = "okay"; 155}; 156 157&dcdc { 158 status = "okay"; 159 regulator-boot-on; 160 regulator-initial-mode = <SILABS_DCDC_MODE_BUCK>; 161 silabs,pfmx-peak-current-milliamp = <80>; 162}; 163 164&flash0 { 165 partitions { 166 compatible = "fixed-partitions"; 167 #address-cells = <1>; 168 #size-cells = <1>; 169 170 /* Reserve 48 kB for the bootloader */ 171 boot_partition: partition@0 { 172 label = "mcuboot"; 173 reg = <0x0 DT_SIZE_K(48)>; 174 read-only; 175 }; 176 177 /* Reserve 208 kB for the application in slot 0 */ 178 slot0_partition: partition@c000 { 179 label = "image-0"; 180 reg = <0x0000c000 DT_SIZE_K(208)>; 181 }; 182 183 /* Reserve 208 kB for the application in slot 1 */ 184 slot1_partition: partition@40000 { 185 label = "image-1"; 186 reg = <0x00040000 DT_SIZE_K(208)>; 187 }; 188 189 /* Reserve 32 kB for the scratch partition */ 190 scratch_partition: partition@74000 { 191 label = "image-scratch"; 192 reg = <0x00074000 DT_SIZE_K(32)>; 193 }; 194 195 /* Set 16 kB of storage at the end of the 1536 kB of flash */ 196 storage_partition: partition@7c000 { 197 label = "storage"; 198 reg = <0x0007c000 DT_SIZE_K(16)>; 199 }; 200 }; 201}; 202