| /Zephyr-latest/drivers/serial/ |
| D | uart_renesas_ra.c | 509 const uint8_t mask = REG_MASK(SSR_TEND) & REG_MASK(SSR_TDRE); in uart_ra_irq_tx_ready() local
511 return (reg_val & mask) == mask; in uart_ra_irq_tx_ready()
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| D | uart_ifx_cat1.c | 320 uint32_t mask = Cy_SCB_GetTxInterruptStatusMasked(data->obj.base); in ifx_cat1_uart_irq_tx_ready() local
322 return (((mask & (CY_SCB_UART_TX_NOT_FULL | SCB_INTR_TX_EMPTY_Msk)) != 0u) ? 1 : 0); in ifx_cat1_uart_irq_tx_ready()
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| /Zephyr-latest/drivers/sensor/ti/fdc2x1x/ |
| D | fdc2x1x.c | 144 uint16_t mask, in fdc2x1x_reg_write_mask() argument
155 LOG_DBG("mask: 0x%x", mask); in fdc2x1x_reg_write_mask()
157 tmp &= ~mask; in fdc2x1x_reg_write_mask()
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| D | fdc2x1x.h | 212 uint16_t mask, uint16_t data);
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| /Zephyr-latest/drivers/interrupt_controller/ |
| D | intc_esp32.c | 729 uint32_t mask = (1 << vd->intno); in esp_intr_set_in_iram() local
733 non_iram_int_mask[vd->cpu] &= ~mask; in esp_intr_set_in_iram()
736 non_iram_int_mask[vd->cpu] |= mask; in esp_intr_set_in_iram()
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| /Zephyr-latest/drivers/can/ |
| D | can_mcp251xfd.c | 244 uint32_t mask = MCP251XFD_UINT32_FLAG_TO_BYTE_MASK(MCP251XFD_REG_CON_OPMOD_MASK); in mcp251xfd_get_mode_internal() local
251 *mode = FIELD_GET(mask, *reg_byte); in mcp251xfd_get_mode_internal()
257 uint32_t value, uint32_t mask, in mcp251xfd_reg_check_value_wtimeout() argument
271 if ((*reg & mask) == value) { in mcp251xfd_reg_check_value_wtimeout()
589 tmp = FIELD_PREP(MCP251XFD_REG_MASK_MSID_MASK, filter->mask >> 18); in mcp251xfd_add_rx_filter()
590 tmp |= FIELD_PREP(MCP251XFD_REG_MASK_MEID_MASK, filter->mask); in mcp251xfd_add_rx_filter()
592 tmp = FIELD_PREP(MCP251XFD_REG_MASK_MSID_MASK, filter->mask); in mcp251xfd_add_rx_filter()
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| /Zephyr-latest/drivers/spi/ |
| D | spi_ambiq_bleif.c | 204 sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
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| /Zephyr-latest/drivers/gnss/gnss_u_blox_protocol/ |
| D | gnss_u_blox_protocol.h | 161 uint16_t mask; member
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| /Zephyr-latest/boards/renesas/da1469x_dk_pro/ |
| D | da1469x_dk_pro.dts | 49 gpio-map-mask = <0xffffffff 0xffffffc0>;
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| /Zephyr-latest/boards/panasonic/pan1781_evb/ |
| D | pan1781_evb.dts | 64 gpio-map-mask = <0xffffffff 0xffffffc0>;
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| /Zephyr-latest/boards/nxp/frdm_mcxn236/ |
| D | frdm_mcxn236.dtsi | 56 gpio-map-mask = <0xffffffff 0xffffffc0>;
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| /Zephyr-latest/boards/openisa/rv32m1_vega/ |
| D | rv32m1_vega_openisa_rv32m1.dtsi | 92 gpio-map-mask = <0xffffffff 0xffffffc0>;
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| /Zephyr-latest/drivers/gpio/ |
| D | gpio_pca_series.c | 1139 gpio_port_pins_t mask, gpio_port_value_t value, gpio_port_value_t toggle) in gpio_pca_series_port_write() argument
1152 dev->name, (uint32_t)mask, (uint32_t)value, (uint32_t)toggle); in gpio_pca_series_port_write()
1168 out = ((out_old & ~mask) | (value & mask)) ^ toggle; in gpio_pca_series_port_write()
1185 static int gpio_pca_series_port_set_masked(const struct device *dev, gpio_port_pins_t mask, in gpio_pca_series_port_set_masked() argument
1188 return gpio_pca_series_port_write(dev, mask, value, 0); in gpio_pca_series_port_set_masked()
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| /Zephyr-latest/drivers/ethernet/ |
| D | eth_adin2111.c | 93 uint32_t mask, uint32_t data) in eth_adin2111_reg_update() argument
103 val &= ~mask; in eth_adin2111_reg_update()
104 val |= mask & data; in eth_adin2111_reg_update()
959 uint8_t *addr, uint8_t *mask, in adin2111_write_filter_address() argument
983 sys_get_be16(&mask[0])); in adin2111_write_filter_address()
989 sys_get_be32(&mask[2])); in adin2111_write_filter_address()
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| /Zephyr-latest/dts/arm/nordic/ |
| D | nrf5340_cpunet.dtsi | 186 tx-mask = <0x0000ffff>;
187 rx-mask = <0x0000ffff>;
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| /Zephyr-latest/dts/arm/renesas/ra/ra4/ |
| D | r7fa4m3ax.dtsi | 108 channel-available-mask = <0x33ff>;
113 channel-available-mask = <0x7f0007>;
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| /Zephyr-latest/doc/hardware/peripherals/can/ |
| D | controller.rst | 77 As an example, a mask with 11 bits set for standard or 29 bits set for extended
79 Bits that are set to zero in the mask are ignored when matching an identifier.
208 .mask = CAN_STD_ID_MASK
231 .mask = CAN_EXT_ID_MASK
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| /Zephyr-latest/drivers/flash/ |
| D | flash_cadence_qspi_nor_ll.c | 581 int cad_qspi_int_disable(struct cad_qspi_params *cad_params, uint32_t mask) in cad_qspi_int_disable() argument
592 if ((CAD_QSPI_INT_STATUS_ALL & mask) == 0) { in cad_qspi_int_disable()
596 sys_write32(mask, cad_params->reg_base + CAD_QSPI_IRQMSK); in cad_qspi_int_disable()
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| /Zephyr-latest/drivers/sensor/bosch/bmi08x/ |
| D | bmi08x_accel.c | 256 uint8_t mask, uint8_t val) in bmi08x_accel_reg_field_update() argument
266 return bmi08x_accel_byte_write(dev, reg_addr, (old_val & ~mask) | ((val << pos) & mask)); in bmi08x_accel_reg_field_update()
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| /Zephyr-latest/boards/wiznet/w5500_evb_pico/ |
| D | w5500_evb_pico.dts | 31 gpio-map-mask = <0xffffffff 0xffffffc0>;
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| /Zephyr-latest/boards/sparkfun/thing_plus/ |
| D | sparkfun_thing_plus_nrf9160_common.dtsi | 68 gpio-map-mask = <0xffffffff 0xffffffc0>;
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| /Zephyr-latest/boards/st/nucleo_h563zi/ |
| D | st_morpho_connector.dtsi | 13 gpio-map-mask = <ST_MORPHO_PIN_MASK 0x0>;
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| /Zephyr-latest/boards/phytec/reel_board/dts/ |
| D | reel_board.dtsi | 58 gpio-map-mask = <0xffffffff 0xffffffc0>;
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| /Zephyr-latest/boards/adi/apard32690/ |
| D | apard32690_max32690_m4.dts | 60 gpio-map-mask = <0xffffffff 0xffffffc0>;
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| /Zephyr-latest/boards/circuitdojo/feather/ |
| D | circuitdojo_feather_nrf9160_common.dtsi | 60 gpio-map-mask = <0xffffffff 0xffffffc0>;
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