| /Zephyr-latest/boards/st/stm32h747i_disco/ |
| D | pmod_connector.dtsi | 11 gpio-map-mask = <0xffffffff 0xffffffc0>;
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| /Zephyr-latest/tests/drivers/can/shell/src/ |
| D | main.c | 45 zassert_equal(f1->mask, f2->mask, "mask mismatch"); in assert_can_filter_equal()
494 .mask = CAN_STD_ID_MASK, in ZTEST()
505 .mask = 0x020, in ZTEST()
516 .mask = CAN_EXT_ID_MASK, in ZTEST()
527 .mask = 0x2048, in ZTEST()
538 .mask = 0x4096, in ZTEST()
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| /Zephyr-latest/drivers/serial/ |
| D | uart_mcux_lpuart.c | 266 uint32_t mask = kLPUART_TxDataRegEmptyInterruptEnable; in mcux_lpuart_irq_tx_enable() local
282 LPUART_EnableInterrupts(config->base, mask); in mcux_lpuart_irq_tx_enable()
291 uint32_t mask = kLPUART_TxDataRegEmptyInterruptEnable; in mcux_lpuart_irq_tx_disable() local
299 LPUART_DisableInterrupts(config->base, mask); in mcux_lpuart_irq_tx_disable()
322 uint32_t mask = kLPUART_TxDataRegEmptyInterruptEnable; in mcux_lpuart_irq_tx_ready() local
325 return (LPUART_GetEnabledInterrupts(config->base) & mask) in mcux_lpuart_irq_tx_ready()
332 uint32_t mask = kLPUART_RxDataRegFullInterruptEnable; in mcux_lpuart_irq_rx_enable() local
334 LPUART_EnableInterrupts(config->base, mask); in mcux_lpuart_irq_rx_enable()
340 uint32_t mask = kLPUART_RxDataRegFullInterruptEnable; in mcux_lpuart_irq_rx_disable() local
342 LPUART_DisableInterrupts(config->base, mask); in mcux_lpuart_irq_rx_disable()
[all …]
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| /Zephyr-latest/drivers/gpio/ |
| D | gpio_ads114s0x.c | 80 static int gpio_ads114s0x_port_set_masked_raw(const struct device *dev, gpio_port_pins_t mask, in gpio_ads114s0x_port_set_masked_raw() argument
85 return ads114s0x_gpio_port_set_masked_raw(config->parent, mask, value); in gpio_ads114s0x_port_set_masked_raw()
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| D | gpio_adp5585.c | 214 static int gpio_adp5585_port_write(const struct device *dev, gpio_port_pins_t mask, in gpio_adp5585_port_write() argument
236 out = ((orig_out & ~mask) | (value & mask)) ^ toggle; in gpio_adp5585_port_write()
251 LOG_DBG("write %x msk %08x val %08x => %x: %d", orig_out, mask, value, out, ret); in gpio_adp5585_port_write()
255 static int gpio_adp5585_port_set_masked(const struct device *dev, gpio_port_pins_t mask, in gpio_adp5585_port_set_masked() argument
258 return gpio_adp5585_port_write(dev, mask, value, 0); in gpio_adp5585_port_set_masked()
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| D | gpio_lpc11u6x.c | 43 volatile uint32_t mask[3]; member
199 gpio_port_pins_t mask, in gpio_lpc11u6x_port_set_masked_raw() argument
208 orig_mask = gpio_regs->mask[port_num]; in gpio_lpc11u6x_port_set_masked_raw()
210 gpio_regs->mask[port_num] = ~mask; in gpio_lpc11u6x_port_set_masked_raw()
216 gpio_regs->mask[port_num] = orig_mask; in gpio_lpc11u6x_port_set_masked_raw()
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| D | gpio_lmp90xxx.c | 93 gpio_port_pins_t mask, in gpio_lmp90xxx_port_set_masked_raw() argument
98 return lmp90xxx_gpio_port_set_masked_raw(config->parent, mask, value); in gpio_lmp90xxx_port_set_masked_raw()
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| /Zephyr-latest/include/zephyr/drivers/firmware/scmi/ |
| D | util.h | 264 #define SCMI_FIELD_MAKE(x, mask, shift)\ argument
265 (((uint32_t)(x) & (mask)) << (shift))
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| /Zephyr-latest/include/zephyr/dt-bindings/clock/ |
| D | stm32l4_clock.h | 62 #define STM32_DOMAIN_CLOCK(val, mask, shift, reg) \ argument
65 (((mask) & STM32_CLOCK_MASK_MASK) << STM32_CLOCK_MASK_SHIFT) | \
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| /Zephyr-latest/drivers/spi/ |
| D | spi_mchp_mss.c | 159 uint32_t mask = MSS_SPI_CONTROL_RX_DATA_INT | MSS_SPI_CONTROL_TX_DATA_INT | in mss_spi_enable_ints() local
163 control |= mask; in mss_spi_enable_ints()
170 uint32_t mask = MSS_SPI_CONTROL_RX_DATA_INT | MSS_SPI_CONTROL_TX_DATA_INT | in mss_spi_disable_ints() local
173 mask = ~mask; in mss_spi_disable_ints()
175 control &= ~mask; in mss_spi_disable_ints()
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| /Zephyr-latest/drivers/adc/ |
| D | adc_numaker.c | 92 uint32_t mask; in m_adc_numaker_validate_buffer_size() local
95 for (mask = BIT(cfg->channel_cnt - 1); mask != 0; mask >>= 1) { in m_adc_numaker_validate_buffer_size()
96 if (mask & sequence->channels) { in m_adc_numaker_validate_buffer_size()
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| /Zephyr-latest/subsys/net/lib/config/ |
| D | init.c | 313 uint32_t mask = NET_EVENT_IPV6_DAD_SUCCEED; in setup_ipv6() local
323 mask |= NET_EVENT_IPV6_ADDR_ADD; in setup_ipv6()
327 mask |= NET_EVENT_IPV6_ROUTER_ADD; in setup_ipv6()
330 net_mgmt_init_event_callback(&mgmt6_cb, ipv6_event_handler, mask); in setup_ipv6()
339 if ((mask & NET_EVENT_IPV6_CMD_ADDR_ADD) == in setup_ipv6()
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| /Zephyr-latest/include/zephyr/drivers/ethernet/ |
| D | eth_adin2111.h | 88 uint32_t mask, uint32_t data);
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| /Zephyr-latest/include/zephyr/drivers/adc/ |
| D | lmp90xxx.h | 30 gpio_port_pins_t mask,
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| /Zephyr-latest/tests/subsys/edac/ibecc/src/ |
| D | ibecc.c | 166 static void test_inject(const struct device *dev, uint64_t addr, uint64_t mask, in test_inject() argument
189 ret = edac_inject_set_param2(dev, mask); in test_inject()
287 static void ibecc_error_inject_test(uint64_t addr, uint64_t mask, uint64_t type) in ibecc_error_inject_test() argument
299 test_inject(dev, addr, mask, type); in ibecc_error_inject_test()
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| /Zephyr-latest/boards/seeed/xiao_esp32c3/ |
| D | seeed_xiao_connector.dtsi | 11 gpio-map-mask = <0xffffffff 0xffffffc0>;
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| /Zephyr-latest/boards/seeed/xiao_esp32c6/ |
| D | seeed_xiao_connector.dtsi | 11 gpio-map-mask = <0xffffffff 0xffffffc0>;
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| /Zephyr-latest/boards/seeed/xiao_esp32s3/ |
| D | seeed_xiao_connector.dtsi | 11 gpio-map-mask = <0xffffffff 0xffffffc0>;
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| /Zephyr-latest/boards/seeed/xiao_rp2040/ |
| D | seeed_xiao_connector.dtsi | 11 gpio-map-mask = <0xffffffff 0xffffffc0>;
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| /Zephyr-latest/boards/adafruit/qt_py_esp32s3/ |
| D | seeed_xiao_connector.dtsi | 11 gpio-map-mask = <0xffffffff 0xffffffc0>;
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| /Zephyr-latest/boards/adafruit/qt_py_rp2040/ |
| D | seeed_xiao_connector.dtsi | 11 gpio-map-mask = <0xffffffff 0xffffffc0>;
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| /Zephyr-latest/boards/96boards/wistrio/ |
| D | 96b_lscon.dtsi | 11 gpio-map-mask = <0xffffffff 0xffffffc0>;
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| /Zephyr-latest/drivers/input/ |
| D | Kconfig.kbd_matrix | 32 bool "Allow runtime changes to the actual key mask"
34 If enabled, the actual-key-mask devicetree property data is stored in
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| /Zephyr-latest/drivers/dma/ |
| D | Kconfig.dw_common | 36 int "memory space mask"
39 Some instances of the DesignWare DMAC require a mask applied to source/destination
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| /Zephyr-latest/drivers/flash/ |
| D | flash_stm32f7x.c | 162 int flash_stm32_option_bytes_write(const struct device *dev, uint32_t mask, in flash_stm32_option_bytes_write() argument
172 if ((regs->OPTCR & mask) == value) { in flash_stm32_option_bytes_write()
181 regs->OPTCR = (regs->OPTCR & ~mask) | value; in flash_stm32_option_bytes_write()
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